diff options
author | Frieder Schrempf <frieder.schrempf@kontron.de> | 2022-08-24 15:59:15 +0200 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2022-10-20 17:35:51 +0200 |
commit | dfbdc69c5d8c8b7ddd467191317d19c8bc038676 (patch) | |
tree | c9f358c90bc66ce8d956da3bb55b96e4eb2f4174 /arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi | |
parent | 3b846df8ab46d1c40514747b9de6aef97460467d (diff) |
imx: kontron-sl-mx8mm: Adjust devicetree names, compatibles and model strings
This adjusts the names of the boards and SoMs to the official naming
used by Kontron marketing. These changes also affect devicetree
names and compatibles. The same changes have been submitted to the
Linux kernel.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi')
-rw-r--r-- | arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi | 144 |
1 files changed, 144 insertions, 0 deletions
diff --git a/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi new file mode 100644 index 00000000000..2c62f05cec1 --- /dev/null +++ b/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Kontron Electronics GmbH + */ + +#include "imx8mm-u-boot.dtsi" + +/ { + aliases { + usb0 = &usbotg1; + usb1 = &usbotg2; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + u-boot,dm-spl; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; +}; + +&crypto { + u-boot,dm-spl; +}; + +&sec_jr0 { + u-boot,dm-spl; +}; + +&sec_jr1 { + u-boot,dm-spl; +}; + +&sec_jr2 { + u-boot,dm-spl; +}; + +&i2c1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&i2c2 { + status = "okay"; + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&pinctrl_ecspi1 { + u-boot,dm-spl; +}; + +&pinctrl_i2c1 { + u-boot,dm-spl; +}; + +&pinctrl_pmic { + u-boot,dm-spl; + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141 + /* Disable Pullup for SD_VSEL */ + MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x41 + >; +}; + +&pinctrl_uart3 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&pinctrl_usdhc1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc1_100mhz { + u-boot,dm-spl; +}; + +&pinctrl_usdhc1_200mhz { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; + +&pca9450 { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { + u-boot,dm-spl; +}; + +&ecspi1 { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&uart3 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&usdhc1 { + u-boot,dm-spl; +}; + +&usdhc2 { + u-boot,dm-spl; +}; + +&wdog1 { + u-boot,dm-spl; +}; + +&pinctrl_wdog { + u-boot,dm-spl; +}; |