diff options
| author | Ye Li <ye.li@nxp.com> | 2017-03-16 11:25:35 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-04-27 02:30:50 -0700 |
| commit | b4698ce0e5b6952a88702075ce905a059da277d9 (patch) | |
| tree | 66c8b542195adccd4449ee8046affe0283d2ee66 /arch/arm/dts/imx7ulp-evk-qspi.dts | |
| parent | ed4a4a9d1c695f8fafd31e92059b9d3e8e696708 (diff) | |
MLK-14445-2 mx7ulp_evk: Add QSPI flash support
Porting the QSPI flash board support from v2016.03, and convert to use
DM QSPI driver.
Since we need to support QSPI at default in u-boot, change the default
DTS file to qspi enabled DTS.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 41895cd598be6c4a64fc4fec521120e4962abc28)
Diffstat (limited to 'arch/arm/dts/imx7ulp-evk-qspi.dts')
| -rw-r--r-- | arch/arm/dts/imx7ulp-evk-qspi.dts | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/dts/imx7ulp-evk-qspi.dts b/arch/arm/dts/imx7ulp-evk-qspi.dts new file mode 100644 index 0000000000..450ea0e7d3 --- /dev/null +++ b/arch/arm/dts/imx7ulp-evk-qspi.dts @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx7ulp-evk.dts" + +&qspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi1_1>; + status = "okay"; + + flash0: mx25r6435f@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "macronix,mx25r6435f"; + spi-max-frequency = <29000000>; + }; +}; + +&iomuxc { + status = "okay"; +}; + +&iomuxc { + imx7ulp-evk { + pinctrl_qspi1_1: qspi1grp_1 { + fsl,pins = < + ULP1_PAD_PTB7_LLWU0_P11__QSPIA_SS1_B 0x43 /* SS1 */ + ULP1_PAD_PTB8__QSPIA_SS0_B 0x43 /* SS0 */ + ULP1_PAD_PTB15__QSPIA_SCLK 0x43 /* SCLK */ + ULP1_PAD_PTB9_LLWU0_P12__QSPIA_DQS 0x43 /* DQS */ + ULP1_PAD_PTB16_LLWU0_P14__QSPIA_DATA3 0x43 /* D3 */ + ULP1_PAD_PTB17__QSPIA_DATA2 0x43 /* D2 */ + ULP1_PAD_PTB18__QSPIA_DATA1 0x43 /* D1 */ + ULP1_PAD_PTB19_LLWU0_P15__QSPIA_DATA0 0x43 /* D0 */ + >; + }; + }; +}; + |