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authorMarc Ferland <ferlandm@amotus.ca>2020-12-22 14:24:12 -0500
committerStefano Babic <sbabic@denx.de>2020-12-26 14:56:09 +0100
commit37648b600cd16848e689e341b20da71356e24212 (patch)
tree3d180989d5ef6409b2e1f9d396a2177a43bcb9bf /arch/arm/dts/imx6ull-dart-6ul.dtsi
parentd4d7b663b8cae5ef4209aaef21a2435a7d5d4dd7 (diff)
arm: dart6ul: read and print SoM info from eeprom on startup
The dart6ul has an i2c eeprom at 0x50 which contains, among other things, the manufacturing/revision/options info of the SoM. This patch replaces the current checkboard() implementation with a more exhaustive one based on the content of the eeprom. Since this code uses the new driver model, some changes were also required in the DTS to make the nodes related to i2c available before relocation. This code was inspired from the supported u-boot code from Variscite which can be found here: https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02 New output example: Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17 Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G Signed-off-by: Marc Ferland <ferlandm@amotus.ca> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Diffstat (limited to 'arch/arm/dts/imx6ull-dart-6ul.dtsi')
-rw-r--r--arch/arm/dts/imx6ull-dart-6ul.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6ull-dart-6ul.dtsi b/arch/arm/dts/imx6ull-dart-6ul.dtsi
index fed40b0109..805a382da9 100644
--- a/arch/arm/dts/imx6ull-dart-6ul.dtsi
+++ b/arch/arm/dts/imx6ull-dart-6ul.dtsi
@@ -56,6 +56,10 @@
};
};
+&gpio1 {
+ u-boot,dm-pre-reloc;
+};
+
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
@@ -100,8 +104,10 @@
scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
status = "okay";
+ u-boot,dm-pre-reloc;
eeprom_som: eeprom@50 {
+ u-boot,dm-pre-reloc;
compatible = "atmel,24c04";
reg = <0x50>;
status = "okay";
@@ -210,6 +216,7 @@
};
pinctrl_i2c2: i2cgrp {
+ u-boot,dm-pre-reloc;
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
@@ -217,6 +224,7 @@
};
pinctrl_i2c2_gpio: i2c2grp_gpio {
+ u-boot,dm-pre-reloc;
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0
MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0