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authorJörg Krause <joerg.krause@embedded.rocks>2018-02-25 18:12:47 +0100
committerStefano Babic <sbabic@denx.de>2018-03-29 17:28:55 +0200
commite73edcf18c6751ef5e4809615d37520376d9a06e (patch)
tree3739d333df3036210a6c47aa7d8b03ae5259fbc6 /arch/arm/dts/imx6ul.dtsi
parentd8b3ec4d1a2c08ee325da8b61bcc4a3f804be2b4 (diff)
ARM: dts: imx6ul: add wdog3
The i.MX6UL has a WDOG3 located at start address 0x021E0000 in the AIPS-2 memory region [1]. [1] i.MX 6UltraLite Applications Processor Reference Manual, Rev. 1, 04/2016, Table-2-3 AIPS-2 memory map, p. 166 Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Diffstat (limited to 'arch/arm/dts/imx6ul.dtsi')
-rw-r--r--arch/arm/dts/imx6ul.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi
index 7affab866f..b63f5a53ac 100644
--- a/arch/arm/dts/imx6ul.dtsi
+++ b/arch/arm/dts/imx6ul.dtsi
@@ -881,6 +881,14 @@
status = "disabled";
};
+ wdog3: wdog@021e4000 {
+ compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
+ reg = <0x021e4000 0x4000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_WDOG3>;
+ status = "disabled";
+ };
+
uart2: serial@021e8000 {
compatible = "fsl,imx6ul-uart",
"fsl,imx6q-uart";