summaryrefslogtreecommitdiff
path: root/arch/arm/dts/imx6q-ba16.dtsi
diff options
context:
space:
mode:
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2022-07-21 15:27:26 +0200
committerStefano Babic <sbabic@denx.de>2022-07-25 16:12:00 +0200
commitd0399a46e7cda63c07e3eb8558bef84cfb068028 (patch)
tree109f7d723e2c5fecc52355e6fcb39b7107c12b16 /arch/arm/dts/imx6q-ba16.dtsi
parent50b229523bbc5511e1bace34df779f84950bf872 (diff)
imx6dl/imx6qdl: synchronise device trees with linux
Synchronise device trees with linux-next next-20220708. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm/dts/imx6q-ba16.dtsi')
-rw-r--r--arch/arm/dts/imx6q-ba16.dtsi18
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/dts/imx6q-ba16.dtsi b/arch/arm/dts/imx6q-ba16.dtsi
index 9da2bb6e869..f266f1b7e0c 100644
--- a/arch/arm/dts/imx6q-ba16.dtsi
+++ b/arch/arm/dts/imx6q-ba16.dtsi
@@ -1,4 +1,3 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Support for imx6 based Advantech DMS-BA16 Qseven module
*
@@ -125,6 +124,9 @@
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ pinctrl-0 = <&pinctrl_usbotg_vbus>;
+ gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
};
};
@@ -135,12 +137,12 @@
};
&ecspi1 {
- cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
- flash: n25q032@0 {
+ flash: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
@@ -173,8 +175,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
- status = "okay";
+ phy-supply = <&reg_3p3v>;
phy-handle = <&phy0>;
+ status = "okay";
mdio {
#address-cells = <1>;
@@ -346,6 +349,7 @@
};
&pwm1 {
+ #pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
@@ -586,6 +590,12 @@
>;
};
+ pinctrl_usbotg_vbus: usbotgvbusgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
+ >;
+ };
+
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059