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authorWasim Khan <wasim.khan@nxp.com>2020-09-28 16:26:09 +0530
committerPriyanka Jain <priyanka.jain@nxp.com>2020-12-10 13:56:39 +0530
commit7dfc20ab1dc996ec89d564fb2fb031da499a0920 (patch)
treea999d2df4c09176c75bb29b9934e1b7561add2c0 /arch/arm/dts/fsl-ls1088a.dtsi
parentba45dd21f3bcaeec1fb90c9f52428252ea2ba911 (diff)
arm: dts: ls1088a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/dts/fsl-ls1088a.dtsi')
-rw-r--r--arch/arm/dts/fsl-ls1088a.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 6653794d1c..7b4ac6d3de 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -2,7 +2,7 @@
/*
* NXP ls1088a SOC common device tree source
*
- * Copyright 2017 NXP
+ * Copyright 2017, 2020 NXP
*/
/ {
@@ -135,7 +135,7 @@
dr_mode = "host";
};
- pcie@3400000 {
+ pcie1: pcie@3400000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */
0x00 0x03480000 0x0 0x80000 /* lut registers */
@@ -151,7 +151,7 @@
0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
- pcie@3500000 {
+ pcie2: pcie@3500000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03500000 0x0 0x80000 /* dbi registers */
0x00 0x03580000 0x0 0x80000 /* lut registers */
@@ -167,7 +167,7 @@
0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
- pcie@3600000 {
+ pcie3: pcie@3600000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03600000 0x0 0x80000 /* dbi registers */
0x00 0x03680000 0x0 0x80000 /* lut registers */