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authorVignesh R <vigneshr@ti.com>2016-07-06 10:26:03 +0530
committerJagan Teki <jteki@openedev.com>2016-07-09 20:16:33 +0530
commite835a74159798723592e3c45d06793cd6acaf7ff (patch)
tree710f5d7ea4336350a6f0ee4239472a1c77a65326 /arch/arm/dts/dra7-evm.dts
parent988fb5ce610bbd2cc5a839cce737bba307e94db7 (diff)
ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'arch/arm/dts/dra7-evm.dts')
-rw-r--r--arch/arm/dts/dra7-evm.dts6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 08ef04e177..429b9edc1b 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -491,15 +491,13 @@
pinctrl-names = "default";
pinctrl-0 = <&qspi1_pins>;
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
m25p80@0 {
compatible = "s25fl256s1","spi-flash";
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
- spi-cpol;
- spi-cpha;
#address-cells = <1>;
#size-cells = <1>;