diff options
| author | Konstantin Porotchkin <kostap@marvell.com> | 2021-05-11 08:11:24 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2021-05-16 06:48:45 +0200 |
| commit | f29eaadeb5bc9cd07c810fe6053991f71f9683c9 (patch) | |
| tree | eefa76194a59386c44898e30550c05f125b90308 /arch/arm/dts/cn9130-db-A.dts | |
| parent | 961ab07df65efd54a062960081b22d769b7699b2 (diff) | |
arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN913x DB
This patch adds the dtsi/dts files needed to support the Marvell
Octeon TX2 CN913x DB. This is only the base port with not all
interfaces supported fully.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/dts/cn9130-db-A.dts')
| -rw-r--r-- | arch/arm/dts/cn9130-db-A.dts | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/dts/cn9130-db-A.dts b/arch/arm/dts/cn9130-db-A.dts new file mode 100644 index 0000000000..90d6e4a26f --- /dev/null +++ b/arch/arm/dts/cn9130-db-A.dts @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018-2021 Marvell International Ltd. + */ + +#include "cn9130-db.dtsi" + +/ { + model = "Marvell CN9130 development board (CP NOR) setup(A)"; + + aliases { + spi0 = &cp0_spi1; + }; +}; + +/* + * CP related configuration + */ +&cp0_pinctl { + /* MPP Bus: + * [0-11] RGMII1 + * [12] GPIO GE-IN + * [13-16] SPI1 + * [17-27] NAND + * [28] MSS_GPIO[5] XXX:(mode nr from a3900) + * [29-30] SATA + * [31] MSS_GPIO[4] XXX:(mode nr from a3900) + * [32,34] SMI + * [33] SDIO + * [35-36] I2C1 + * [37-38] I2C0 + * [39-43] SDIOctrl + * [44-55] RGMII2 + * [56-62] SDIO + */ + + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 3 3 3 3 3 3 3 3 3 3 + 3 3 0 3 3 3 3 1 1 1 + 1 1 1 1 1 1 1 1 3 9 + 9 3 7 6 7 2 2 2 2 1 + 1 1 1 1 1 1 1 1 1 1 + 1 1 1 1 1 1 0xe 0xe 0xe 0xe + 0xe 0xe 0xe>; +}; + +/* U54 */ +&cp0_nand { + status = "disabled"; +}; + +/* U55 */ +&cp0_spi1 { + status = "okay"; +}; |