summaryrefslogtreecommitdiff
path: root/arch/arm/dts/ast2600-evb.dts
diff options
context:
space:
mode:
authorDylan Hung <dylan_hung@aspeedtech.com>2021-12-09 10:12:26 +0800
committerTom Rini <trini@konsulko.com>2022-01-18 12:48:17 -0500
commitabc75897caee34f150a710109107236e76c5d8a3 (patch)
tree7d47da4ee87ad4d19196232652887c378482c97e /arch/arm/dts/ast2600-evb.dts
parentac4fda7bc2764af45dd9269c3c8d3375000d330e (diff)
ARM: dts: ast2600: Add MDIO devices
There are 4 MDIO bus controllers in AST2600 SOC. Each of them can connect to one or more PHY chips and is flexible to work with the 4 MAC devices in AST2600. On AST2600 EVB, MDIO 0,1,2,3 connect to the PHY chips used by MAC 0,1,2,3 respectively. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Diffstat (limited to 'arch/arm/dts/ast2600-evb.dts')
-rw-r--r--arch/arm/dts/ast2600-evb.dts68
1 files changed, 68 insertions, 0 deletions
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index 05362d19bd..c17988ec3c 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -163,6 +163,74 @@
pinctrl-0 = <&pinctrl_i2c9_default>;
};
+&mdio0 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mdio1 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy1: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mdio2 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy2: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mdio3 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy3: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mac0 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&ethphy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default>;
+};
+
+&mac1 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&ethphy1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default>;
+};
+
+&mac2 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&ethphy2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii3_default>;
+};
+
+&mac3 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&ethphy3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii4_default>;
+};
+
&scu {
mac0-clk-delay = <0x1d 0x1c
0x10 0x17