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authorBaruch Siach <baruch@tkos.co.il>2017-11-13 07:04:31 +0200
committerStefan Roese <sr@denx.de>2017-11-16 11:45:20 +0100
commit8c1ce928f498774a3e2c3aa03534b6e6ca6d4759 (patch)
treea4a225e921ab510f0a84180225f3139cb382cdbc /arch/arm/dts/armada-388-clearfog.dts
parent962b8fef91fbfa58c1045bee4d9a73c72b46c829 (diff)
arm: mvebu: clearfog: update SPI flash DT description
All current ClearFog SOMs have the SPI flash populated. Enable SPI flash in the device tree. Add an alias to the SPI bus so that the 'sf' command can probe the flash on bus 1. Add the "spi-flash" compatible string to make the standard SPI flash driver probe the device. Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/dts/armada-388-clearfog.dts')
-rw-r--r--arch/arm/dts/armada-388-clearfog.dts10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts
index b2dfd56435..bc52bc0167 100644
--- a/arch/arm/dts/armada-388-clearfog.dts
+++ b/arch/arm/dts/armada-388-clearfog.dts
@@ -61,6 +61,7 @@
ethernet1 = &eth0;
ethernet2 = &eth1;
ethernet3 = &eth2;
+ spi1 = &spi1;
};
chosen {
@@ -330,11 +331,9 @@
status = "okay";
};
- spi@10680 {
+ spi1: spi@10680 {
/*
- * We don't seem to have the W25Q32 on the
- * A1 Rev 2.0 boards, so disable SPI.
- * CS0: W25Q32 (doesn't appear to be present)
+ * CS0: W25Q32
* CS1:
* CS2: mikrobus
*/
@@ -345,10 +344,9 @@
spi-flash@0 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "w25q32", "jedec,spi-nor";
+ compatible = "w25q32", "jedec,spi-nor", "spi-flash";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <3000000>;
- status = "disabled";
};
};