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authorTom Rini <trini@konsulko.com>2020-10-05 13:05:46 -0400
committerTom Rini <trini@konsulko.com>2020-10-05 14:10:59 -0400
commitb7e7831e5d5be047f421ddc1f308afc22764a893 (patch)
tree7d5f27c82b260278ed0b3ea96bce592b0505b898 /arch/arm/cpu
parent050acee119b3757fee3bd128f55d720fdd9bb890 (diff)
parentcaebff09efe8c061b4d99b82262c67fb2db9bbcf (diff)
Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch prior to release. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c2
-rw-r--r--arch/arm/cpu/armv8/start.S23
2 files changed, 22 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 87fb321c635..ba42c185c47 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -56,7 +56,7 @@ int ls_gic_rd_tables_init(void *blob)
lpi_base.start = addr;
lpi_base.end = addr + size - 1;
- ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL);
+ ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL, false);
if (ret) {
debug("%s: failed to add reserved memory\n", __func__);
return ret;
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 002698b501c..e5c2856cf57 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -59,6 +59,23 @@ reset:
save_boot_params_ret:
#if CONFIG_POSITION_INDEPENDENT
+ /* Verify that we're 4K aligned. */
+ adr x0, _start
+ ands x0, x0, #0xfff
+ b.eq 1f
+0:
+ /*
+ * FATAL, can't continue.
+ * U-Boot needs to be loaded at a 4K aligned address.
+ *
+ * We use ADRP and ADD to load some symbol addresses during startup.
+ * The ADD uses an absolute (non pc-relative) lo12 relocation
+ * thus requiring 4K alignment.
+ */
+ wfi
+ b 0b
+1:
+
/*
* Fix .rela.dyn relocations. This allows U-Boot to be loaded to and
* executed at a different address than it was linked at.
@@ -67,8 +84,10 @@ pie_fixup:
adr x0, _start /* x0 <- Runtime value of _start */
ldr x1, _TEXT_BASE /* x1 <- Linked value of _start */
sub x9, x0, x1 /* x9 <- Run-vs-link offset */
- adr x2, __rel_dyn_start /* x2 <- Runtime &__rel_dyn_start */
- adr x3, __rel_dyn_end /* x3 <- Runtime &__rel_dyn_end */
+ adrp x2, __rel_dyn_start /* x2 <- Runtime &__rel_dyn_start */
+ add x2, x2, #:lo12:__rel_dyn_start
+ adrp x3, __rel_dyn_end /* x3 <- Runtime &__rel_dyn_end */
+ add x3, x3, #:lo12:__rel_dyn_end
pie_fix_loop:
ldp x0, x1, [x2], #16 /* (x0, x1) <- (Link location, fixup) */
ldr x4, [x2], #8 /* x4 <- addend */