diff options
| author | Michael Walle <michael@walle.cc> | 2021-10-15 15:15:19 +0200 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2021-11-09 17:18:23 +0530 |
| commit | f53e102e12c0e1bdda035be1aa5ec59c9787a21a (patch) | |
| tree | 8bfdf4d251cf782faf7feef0be419da92018e0a9 /arch/arm/cpu | |
| parent | bce039acf2661b1484aeee3704100b645a3d2198 (diff) | |
armv8: fsl-layerscape: rework the dwc3 snooping enable code
Instead of looking at all USB (host) devices, just search all DWC3
device tree nodes. This will (1) fix a panic if of_match is zero and (2)
also apply the fixup if the controller is in peripheral mode. Both
happen when the DWC3 USB controller driver is used.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 28 |
1 files changed, 13 insertions, 15 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index a08ed3f544..d3a5cfaac1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -929,25 +929,23 @@ __weak int fsl_board_late_init(void) #define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \ << DWC3_GSBUSCFG0_CACHETYPE_SHIFT) -void enable_dwc3_snooping(void) +static void enable_dwc3_snooping(void) { - int ret; - u32 val; - struct udevice *bus; - struct uclass *uc; + static const char * const compatibles[] = { + "fsl,layerscape-dwc3", + "fsl,ls1028a-dwc3", + }; fdt_addr_t dwc3_base; + ofnode node; + u32 val; + int i; - ret = uclass_get(UCLASS_USB, &uc); - if (ret) - return; - - uclass_foreach_dev(bus, uc) { - if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) { - dwc3_base = devfdt_get_addr(bus); - if (dwc3_base == FDT_ADDR_T_NONE) { - dev_err(bus, "dwc3 regs missing\n"); + for (i = 0; i < ARRAY_SIZE(compatibles); i++) { + ofnode_for_each_compatible_node(node, compatibles[i]) { + dwc3_base = ofnode_get_addr(node); + if (dwc3_base == FDT_ADDR_T_NONE) continue; - } + val = in_le32(dwc3_base + DWC3_GSBUSCFG0); val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0); val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222); |