diff options
| author | Tom Rini <trini@ti.com> | 2013-12-10 17:15:18 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-12-10 17:15:18 -0500 |
| commit | 4b210ad34282bfd9fc982a8e3c9a9126f4094cdb (patch) | |
| tree | f91ebdc46ede952728602d5ecc18e64ad0e52682 /arch/arm/cpu/armv7/zynq/cpu.c | |
| parent | 65b7fe28a12bbaccc7a0c076f5f9f213150030e7 (diff) | |
| parent | f15ea6e1d67782a1626d4a4922b6c20e380085e5 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
board/samsung/trats2/trats2.c
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/zynq/cpu.c')
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/cpu.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c index 2bb38438ae..9af340e75e 100644 --- a/arch/arm/cpu/armv7/zynq/cpu.c +++ b/arch/arm/cpu/armv7/zynq/cpu.c @@ -16,23 +16,24 @@ void lowlevel_init(void) int arch_cpu_init(void) { zynq_slcr_unlock(); - /* remap DDR to zero, FILTERSTART */ - writel(0, &scu_base->filter_start); /* Device config APB, unlock the PCAP */ writel(0x757BDF0D, &devcfg_base->unlock); writel(0xFFFFFFFF, &devcfg_base->rom_shadow); +#if (CONFIG_SYS_SDRAM_BASE == 0) + /* remap DDR to zero, FILTERSTART */ + writel(0, &scu_base->filter_start); + /* OCM_CFG, Mask out the ROM, map ram into upper addresses */ writel(0x1F, &slcr_base->ocm_cfg); /* FPGA_RST_CTRL, clear resets on AXI fabric ports */ writel(0x0, &slcr_base->fpga_rst_ctrl); - /* TZ_DDR_RAM, Set DDR trust zone non-secure */ - writel(0xFFFFFFFF, &slcr_base->trust_zone); /* Set urgent bits with register */ writel(0x0, &slcr_base->ddr_urgent_sel); /* Urgent write, ports S2/S3 */ writel(0xC, &slcr_base->ddr_urgent); +#endif zynq_slcr_lock(); |