diff options
author | Siarhei Siamashka <siarhei.siamashka@gmail.com> | 2015-02-16 10:23:59 +0200 |
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committer | Hans de Goede <hdegoede@redhat.com> | 2015-02-16 20:23:52 +0100 |
commit | 840fe95c3bcff7692c51b90ebc0d350792597ff0 (patch) | |
tree | e1356e133b4e7dfb3f583d5ec0031e2483fe6670 /arch/arm/cpu/armv7/sunxi/fel_utils.S | |
parent | 942cb0b6a29f74507adeb0bce7ff7f23f69faf84 (diff) |
sunxi: Support the FEL boot mode in the regular u-boot build
So that the CONFIG_SPL_FEL option is not needed anymore. And the regular
SPL binary, generated by the default u-boot build, is now also bootable
over USB in the FEL mode. The SPL still can boot from the SD card too.
A bunch of system registers need to be saved/restored in order to ensure
that the IRQ handler still works in the BROM FEL code after getting
control back from the SPL. This is done in the sunxi code instead of
abusing ifdefs in 'start.S'.
The decision whether to load the main u-boot binary from the SD card or
return to the FEL code in the BROM is done at runtime.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
[hdegoede@redhat.com: Since we now restore various regs before returning to
the FEL BROM code we can drop the sunxi specific #ifdefs in start.S]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi/fel_utils.S')
-rw-r--r-- | arch/arm/cpu/armv7/sunxi/fel_utils.S | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S index 0c1de52df8..bf0033552d 100644 --- a/arch/arm/cpu/armv7/sunxi/fel_utils.S +++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S @@ -15,11 +15,28 @@ ENTRY(save_boot_params) ldr r0, =fel_stash str sp, [r0, #0] str lr, [r0, #4] + mrs lr, cpsr @ Read CPSR + str lr, [r0, #8] + mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register + str lr, [r0, #12] + mrc p15, 0, lr, c12, c0, 0 @ Read VBAR + str lr, [r0, #16] + mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register + str lr, [r0, #20] b save_boot_params_ret ENDPROC(save_boot_params) ENTRY(return_to_fel) mov sp, r0 mov lr, r1 + ldr r0, =fel_stash + ldr r1, [r0, #20] + mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register + ldr r1, [r0, #16] + mcr p15, 0, r1, c12, c0, 0 @ Write VBAR + ldr r1, [r0, #12] + mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register + ldr r1, [r0, #8] + msr cpsr, r1 @ Write CPSR bx lr ENDPROC(return_to_fel) |