diff options
author | Tom Rini <trini@ti.com> | 2013-11-07 11:42:57 -0500 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2013-12-04 08:11:45 -0500 |
commit | 39245c8699c68f85a5aaa3153d954370920d09c0 (patch) | |
tree | f402a009ddf3ddbbe9b7732b1a6b8f87e7bb478d /arch/arm/cpu/armv7/am33xx | |
parent | 340e6c830053846d48ba97a73adfac3f5cadfd7e (diff) |
am33xx: Stop modifying certain EMIF4D registers
Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.
[1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Matt Porter <matt.porter@linaro.org>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx')
-rw-r--r-- | arch/arm/cpu/armv7/am33xx/ddr.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index fa697c74abf..5b0454c3eab 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -89,15 +89,12 @@ void config_ddr_phy(const struct emif_regs *regs, int nr) void config_cmd_ctrl(const struct cmd_control *cmd, int nr) { writel(cmd->cmd0csratio, &ddr_cmd_reg[nr]->cm0csratio); - writel(cmd->cmd0dldiff, &ddr_cmd_reg[nr]->cm0dldiff); writel(cmd->cmd0iclkout, &ddr_cmd_reg[nr]->cm0iclkout); writel(cmd->cmd1csratio, &ddr_cmd_reg[nr]->cm1csratio); - writel(cmd->cmd1dldiff, &ddr_cmd_reg[nr]->cm1dldiff); writel(cmd->cmd1iclkout, &ddr_cmd_reg[nr]->cm1iclkout); writel(cmd->cmd2csratio, &ddr_cmd_reg[nr]->cm2csratio); - writel(cmd->cmd2dldiff, &ddr_cmd_reg[nr]->cm2dldiff); writel(cmd->cmd2iclkout, &ddr_cmd_reg[nr]->cm2iclkout); } @@ -121,10 +118,6 @@ void config_ddr_data(const struct ddr_data *data, int nr) &(ddr_data_reg[nr]+i)->dt0fwsratio0); writel(data->datawrsratio0, &(ddr_data_reg[nr]+i)->dt0wrsratio0); - writel(data->datauserank0delay, - &(ddr_data_reg[nr]+i)->dt0rdelays0); - writel(data->datadldiff0, - &(ddr_data_reg[nr]+i)->dt0dldiff0); } } |