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authorIcenowy Zheng <icenowy@aosc.io>2022-01-29 10:23:02 -0500
committerAndre Przywara <andre.przywara@arm.com>2022-02-04 00:09:57 +0000
commit88998f7775311bb20f41c7ba9341be5162423a1c (patch)
tree1aaec617f8042d8e55e58f955219261f90880924 /arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds
parent0d4377fc921710cde36270a6a9a56803bfe545c4 (diff)
arm: arm926ej-s: Add sunxi code
Some Allwinner SoCs use ARM926EJ-S core. Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds')
-rw-r--r--arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds
new file mode 100644
index 00000000000..9a000ac5d38
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018
+ * Icenowy Zheng <icenowy@aosc.io>
+ *
+ * Based on arch/arm/cpu/armv7/sunxi/u-boot-spl.lds:
+ */
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
+ LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+ LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ __start = .;
+ *(.vectors)
+ *(.text*)
+ } > .sram
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
+
+ . = ALIGN(4);
+ .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ } > .sram
+
+ . = ALIGN(4);
+ __image_copy_end = .;
+ _end = .;
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_end = .;
+ } > .sdram
+}