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authorWolfgang Denk <wd@denx.de>2011-08-04 23:05:07 +0200
committerWolfgang Denk <wd@denx.de>2011-08-04 23:05:07 +0200
commitfb6440ee9b110b759ef61fd80bbd0df1bbf0f37b (patch)
treedbde38784fb8b48c7f9b14e70a947fab3a1f3bab /arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S
parent01b0f50060923e89693bf155c677e4f665916b3f (diff)
parentb608b95753873a5073f550cca002c4bebf1a18f5 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: drivers/rtc: add Marvell Integrated RTC Armada100: Add Board Support for Marvell GuruPlug-Display Armada100: MFP macro naming correction arm: auto gen asm-offsets.h for mb86r0x spear: fix build errors for spear3xx/spear600 platforms cosmetic: arm: lib/board.c: Coding Style cleanup ARM: versatile: fix board support SMDKV310: Enable device tree support SMDKV310: MMC_SPL: Fix building when using "make O=" arm: a320: enable tagged list support arm: a320: fix multiline comment style ARMv7: u8500_href: Add missing header to fix compiler warning Removed unused define, CONFIG_ARMV7. avr32: add grasshopper (ICnova AP7000) board AT91/SPI: fix atmel_dataflash_spi.c to allow building without warnings MAKEALL: remove AT91 boards that are in boards.cfg AT91: Makes AT91SAM9263-EK build correctly against u-boot-atmel/master AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master AT91: Board fix for AT91SAM9261-EK AT91: SoC fix at91sam9261_matrix.h AT91: Makes AT91SAM9RL-EK build correctly against u-boot-atmel/master AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master AT91: change common at91sam9261 files to compile with new scheme AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init) a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART README: fix arm920t/at91 path net/eth.c: drop obsolete at91rm9200 support README.at91-soc: remove AT91(RM9200) joining notice a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning MAKEALL: remove obsolete at91rm9200 soc ARM: remove obsolete at91rm9200 omap4: clock init support for omap4460 omap4: support TPS programming omap: reuse omap3 gpio support in omap4 omap4: sdram init changes for omap4460 omap4: add omap4460 revision detection mkimage: Add OMAP boot image support omap: add MMC and FAT support to SPL omap: add basic SPL support armv7: start.S: fixes and enhancements for SPL omap4: automatic sdram detection omap4: calculate EMIF register values omap4: add sdram init support omap4: add clock support omap4: add OMAP4430 revision check omap4: cleanup pin mux data omap4: utility function to identify the context of hw init DA8xx: fix LPSC constants DA8xx: switch an enum to defines for consistency DA8xx: add MMC/SD controller addresses DaVinci EMAC: declare function for all DA8xx CPUs DA8xx: add generic GPIO driver DaVinci: rename gpio_defs.h to gpio.h omap3evm: eth: Include functions only when necessary omap3evm: Update ethernet reset sequence for Rev.G board omap3evm: eth: split function setup_net_chip omap3: Include array definition only when it is used omap730p2: fix build breaks omap2420h4: fix build breaks omap1610inn: fix build breaks omap1510inn: fix build breaks omap5912osk: fix build breaks omap1610h2: fix build breaks
Diffstat (limited to 'arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S')
-rw-r--r--arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S169
1 files changed, 0 insertions, 169 deletions
diff --git a/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S b/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S
deleted file mode 100644
index 2e7160f675..0000000000
--- a/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * Modified for the at91rm9200dk board by
- * (C) Copyright 2004
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-/*
- * some parameters for the board
- *
- * This is based on rm9200dk.cfg for the BDI2000 from ABATRON which in
- * turn is based on the boot.bin code from ATMEL
- *
- */
-#include <asm/arch/AT91RM9200.h>
-
-_MTEXT_BASE:
-#undef START_FROM_MEM
-#ifdef START_FROM_MEM
- .word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
-#else
- .word CONFIG_SYS_TEXT_BASE
-#endif
-
-.globl lowlevel_init
-lowlevel_init:
- /* Get the CKGR Base Address */
- ldr r1, =AT91C_BASE_CKGR
- /* Main oscillator Enable register */
-#ifdef CONFIG_SYS_USE_MAIN_OSCILLATOR
- ldr r0, =0x0000FF01 /* Enable main oscillator, OSCOUNT = 0xFF */
-#else
- ldr r0, =0x0000FF00 /* Disable main oscillator, OSCOUNT = 0xFF */
-#endif
- str r0, [r1, #AT91C_CKGR_MOR]
- /* Add loop to compensate Main Oscillator startup time */
- ldr r0, =0x00000010
-LoopOsc:
- subs r0, r0, #1
- bhi LoopOsc
-
- /* memory control configuration */
- /* this isn't very elegant, but what the heck */
- ldr r0, =SMRDATA
- ldr r1, _MTEXT_BASE
- sub r0, r0, r1
- add r2, r0, #80
-0:
- /* the address */
- ldr r1, [r0], #4
- /* the value */
- ldr r3, [r0], #4
- str r3, [r1]
- cmp r2, r0
- bne 0b
- /* delay - this is all done by guess */
- ldr r0, =0x00010000
- /* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
-1:
- subs r0, r0, #1
- bhi 1b
- ldr r0, =SMRDATA1
- ldr r1, _MTEXT_BASE
- sub r0, r0, r1
- add r2, r0, #176
-2:
- /* the address */
- ldr r1, [r0], #4
- /* the value */
- ldr r3, [r0], #4
- str r3, [r1]
- cmp r2, r0
- bne 2b
-
- /* switch from FastBus to Asynchronous clock mode */
- mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #0xC0000000 @ set bit 31 (iA) and 30 (nF)
- mcr p15, 0, r0, c1, c0, 0
-
- /* everything is fine now */
- mov pc, lr
-
- .ltorg
-
-SMRDATA:
- .word AT91C_EBI_CFGR
- .word CONFIG_SYS_EBI_CFGR_VAL
- .word AT91C_SMC_CSR0
- .word CONFIG_SYS_SMC_CSR0_VAL
- .word AT91C_PLLAR
- .word CONFIG_SYS_PLLAR_VAL
- .word AT91C_PLLBR
- .word CONFIG_SYS_PLLBR_VAL
- .word AT91C_MCKR
- .word CONFIG_SYS_MCKR_VAL
- /* here there's a delay */
-SMRDATA1:
- .word AT91C_PIOC_ASR
- .word CONFIG_SYS_PIOC_ASR_VAL
- .word AT91C_PIOC_BSR
- .word CONFIG_SYS_PIOC_BSR_VAL
- .word AT91C_PIOC_PDR
- .word CONFIG_SYS_PIOC_PDR_VAL
- .word AT91C_EBI_CSA
- .word CONFIG_SYS_EBI_CSA_VAL
- .word AT91C_SDRC_CR
- .word CONFIG_SYS_SDRC_CR_VAL
- .word AT91C_SDRC_MR
- .word CONFIG_SYS_SDRC_MR_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word AT91C_SDRC_MR
- .word CONFIG_SYS_SDRC_MR_VAL1
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word AT91C_SDRC_MR
- .word CONFIG_SYS_SDRC_MR_VAL2
- .word CONFIG_SYS_SDRAM1
- .word CONFIG_SYS_SDRAM_VAL
- .word AT91C_SDRC_TR
- .word CONFIG_SYS_SDRC_TR_VAL
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- .word AT91C_SDRC_MR
- .word CONFIG_SYS_SDRC_MR_VAL3
- .word CONFIG_SYS_SDRAM
- .word CONFIG_SYS_SDRAM_VAL
- /* SMRDATA1 is 176 bytes long */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */