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authorTom Rini <trini@konsulko.com>2019-03-19 07:14:37 -0400
committerTom Rini <trini@konsulko.com>2019-04-12 08:05:55 -0400
commit9c4b0131d1d06dc87cecd08f065ec9b5c0f08b0f (patch)
tree2bc0d213b2173dccdc3356b7874672861da281cd /arch/arm/Kconfig
parent55f8b70fee856f7fc2ccf452e3533814e98a1ac6 (diff)
ti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common place
The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific notion but rather "where is our previous stage loaded in memory?" option. Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for our HS builds that are not using SPL anyhow. Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Andrew F. Davis <afd@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com?
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2567d7817b..398dbef1cb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1464,6 +1464,21 @@ config TI_SECURE_DEVICE
authenticated) and the code. See the doc/README.ti-secure
file for further details.
+if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
+config ISW_ENTRY_ADDR
+ hex "Address in memory or XIP address of bootloader entry point"
+ default 0x402F4000 if AM43XX
+ default 0x402F0400 if AM33XX
+ default 0x40301350 if OMAP54XX
+ help
+ After any reset, the boot ROM searches the boot media for a valid
+ boot image. For non-XIP devices, the ROM then copies the image into
+ internal memory. For all boot modes, after the ROM processes the
+ boot image it eventually computes the entry point address depending
+ on the device type (secure/non-secure), boot media (xip/non-xip) and
+ image headers.
+endif
+
source "arch/arm/mach-aspeed/Kconfig"
source "arch/arm/mach-at91/Kconfig"