diff options
author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2018-03-21 15:58:46 +0300 |
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committer | Alexey Brodkin <abrodkin@synopsys.com> | 2018-03-21 17:06:29 +0300 |
commit | 16aeee81d9baa403f80cb0ac9bea1141243ab97d (patch) | |
tree | aa46611eea314275453e22bb56da469913397c93 /arch/arc | |
parent | 71621525c3bf9ed2a73446ba505ad5b980b6b8bb (diff) |
ARC: Cache: Move I$ entire operation to a separate function
Move instruction cache entire operation to a separate function
because we are planing to use it in other places like
sync_icache_dcache_all().
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch/arc')
-rw-r--r-- | arch/arc/lib/cache.c | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index 04f1d9d59b5..26f0a1ff9bb 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -315,20 +315,27 @@ void icache_disable(void) IC_CTRL_CACHE_DISABLE); } -void invalidate_icache_all(void) +/* IC supports only invalidation */ +static inline void __ic_entire_invalidate(void) { + if (!icache_status()) + return; + /* Any write to IC_IVIC register triggers invalidation of entire I$ */ - if (icache_status()) { - write_aux_reg(ARC_AUX_IC_IVIC, 1); - /* - * As per ARC HS databook (see chapter 5.3.3.2) - * it is required to add 3 NOPs after each write to IC_IVIC. - */ - __builtin_arc_nop(); - __builtin_arc_nop(); - __builtin_arc_nop(); - read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */ - } + write_aux_reg(ARC_AUX_IC_IVIC, 1); + /* + * As per ARC HS databook (see chapter 5.3.3.2) + * it is required to add 3 NOPs after each write to IC_IVIC. + */ + __builtin_arc_nop(); + __builtin_arc_nop(); + __builtin_arc_nop(); + read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */ +} + +void invalidate_icache_all(void) +{ + __ic_entire_invalidate(); #ifdef CONFIG_ISA_ARCV2 if (slc_exists) |