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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2018-03-21 15:58:52 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2018-03-21 17:06:54 +0300
commit88ae27eda3d47ab1c7885745f28fe3cf6f0b9a5b (patch)
treea90c7b363f72dadee760feffc87e94c05d989fc5 /arch/arc/lib
parenta6f557c4e04a70df2815a44e22a1c2f6c25a0a1c (diff)
ARC: Move BCR encodings to separate header file
We're starting to use more and more BCRs and having their definitions in-lined in sources becomes a bit annoying so we move it all to a separate header. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch/arc/lib')
-rw-r--r--arch/arc/lib/cache.c67
1 files changed, 8 insertions, 59 deletions
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index af07a11724..e6e439aab8 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/log2.h>
#include <asm/arcregs.h>
+#include <asm/arc-bcr.h>
#include <asm/cache.h>
/*
@@ -129,24 +130,11 @@ void read_decode_mmu_bcr(void)
{
/* TODO: should we compare mmu version from BCR and from CONFIG? */
#if (CONFIG_ARC_MMU_VER >= 4)
- u32 tmp;
+ union bcr_mmu_4 mmu4;
- tmp = read_aux_reg(ARC_AUX_MMU_BCR);
+ mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR);
- struct bcr_mmu_4 {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
- n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
-#else
- /* DTLB ITLB JES JE JA */
- unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
- pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
-#endif /* CONFIG_CPU_BIG_ENDIAN */
- } *mmu4;
-
- mmu4 = (struct bcr_mmu_4 *)&tmp;
-
- pae_exists = !!mmu4->pae;
+ pae_exists = !!mmu4.fields.pae;
#endif /* (CONFIG_ARC_MMU_VER >= 4) */
}
@@ -264,27 +252,9 @@ static void arc_ioc_setup(void)
#ifdef CONFIG_ISA_ARCV2
static void read_decode_cache_bcr_arcv2(void)
{
- union {
- struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad:24, way:2, lsz:2, sz:4;
-#else
- unsigned int sz:4, lsz:2, way:2, pad:24;
-#endif
- } fields;
- unsigned int word;
- } slc_cfg;
-
- union {
- struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad:24, ver:8;
-#else
- unsigned int ver:8, pad:24;
-#endif
- } fields;
- unsigned int word;
- } sbcr;
+ union bcr_slc_cfg slc_cfg;
+ union bcr_clust_cfg cbcr;
+ union bcr_generic sbcr;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
if (sbcr.fields.ver) {
@@ -293,17 +263,6 @@ static void read_decode_cache_bcr_arcv2(void)
slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
}
- union {
- struct bcr_clust_cfg {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
-#else
- unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
-#endif
- } fields;
- unsigned int word;
- } cbcr;
-
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
if (cbcr.fields.c && ioc_enable)
ioc_exists = true;
@@ -313,17 +272,7 @@ static void read_decode_cache_bcr_arcv2(void)
void read_decode_cache_bcr(void)
{
int dc_line_sz = 0, ic_line_sz = 0;
-
- union {
- struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
-#else
- unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
-#endif
- } fields;
- unsigned int word;
- } ibcr, dbcr;
+ union bcr_di_cache ibcr, dbcr;
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
if (ibcr.fields.ver) {