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authorMacpaul Lin <macpaul@andestech.com>2011-04-11 20:45:32 +0000
committerWolfgang Denk <wd@denx.de>2011-04-30 21:04:25 +0200
commit0abddf82d54c704cf066524235b6414333e8d087 (patch)
tree3ae31f30d1d61056be409afe1ea98a21646262ac /README
parentdea6386b715827e080a9fa6e6d706f2bdf8a998e (diff)
cmd_ide: enhance new feature "CONFIG_IDE_AHB"
Although most IDE controller is designed to be connected to PCI bridge, there are still some IDE controller support AHB interface for SoC design. The driver implementation of these IDE-AHB controllers differ from other IDE-PCI controller, some additional registers and commands access is required during CMD/DATA I/O. Hence a configuration "CONFIG_IDE_AHB" in cmd_ide.c is required to be defined to support these kinds of SoC controllers. Such as Faraday's FTIDE020 series and Global Unichip's UINF-0301. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Diffstat (limited to 'README')
-rw-r--r--README8
1 files changed, 8 insertions, 0 deletions
diff --git a/README b/README
index d7e5b76295d..b74483e9fb0 100644
--- a/README
+++ b/README
@@ -2751,6 +2751,14 @@ Low Level (hardware related) configuration options:
source code. It is used to make hardware dependant
initializations.
+- CONFIG_IDE_AHB:
+ Most IDE controllers were designed to be connected with PCI
+ interface. Only few of them were designed for AHB interface.
+ When software is doing ATA command and data transfer to
+ IDE devices through IDE-AHB controller, some additional
+ registers accessing to these kind of IDE-AHB controller
+ is requierd.
+
- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx/82xx systems only]