MLK-17239 mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue

When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
the actual clock rate is just half of the expected clock.

This patch set the DDR_EN bit first for DDR mode, hardware divide
the usdhc clock automatically, then follow the original sdr clock
setting method.

This patch also remove the unused variable 'is_ddr'.

Acked-by: Li Ye <ye.li@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 2f1eed596782be19eb2c14e708e6db8596876346)

0 files changed, 0 insertions, 0 deletions