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| author | Aswath Govindraju <a-govindraju@ti.com> | 2023-05-16 16:23:38 +0530 |
|---|---|---|
| committer | Udit Kumar <u-kumar1@ti.com> | 2023-05-17 11:52:16 +0530 |
| commit | f523610c45bbed5df8fee911ae74a5ed58c3e371 (patch) | |
| tree | d36b78164703dd8011450561a4db4ac74515d64b /Licenses | |
| parent | c8065b6252c01b5fae85489d7eb1bdb1f1640359 (diff) | |
arm: dts: k3-j721s2-common-proc-board: Enable SERDES0
Configure first lane to PCIe, the second lane to USB and the last two lanes
to eDP. Also, add sub-nodes to SERDES0 DT node to represent SERDES0 is
connected to PCIe.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Diffstat (limited to 'Licenses')
0 files changed, 0 insertions, 0 deletions