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authorSimon Glass <sjg@chromium.org>2011-09-01 13:37:27 -0700
committerSimon Glass <sjg@chromium.org>2011-09-15 12:41:21 -0700
commite26a6be71dd36659af343b9f0ec14ea981d23692 (patch)
treeca930432571f968fd174b3cfaea6533d9ed62c60
parent0797d6dcb08ce12f7040a5252d304f6a862fa8b7 (diff)
tegra: Rename TEGRA2 to TEGRA
Some constants are actually better of with generic Tegra family names. This also cleans up a few addresses which were in drivers rather than in the tegra.h header file. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I1cabb5191a2b36648a37268069beb3b43c12d0e1 Reviewed-on: http://gerrit.chromium.org/gerrit/7128 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra.h14
-rw-r--r--arch/arm/include/asm/arch-tegra2/tegra.h1
-rw-r--r--arch/arm/include/asm/arch-tegra2/tegra2_spi.h2
-rw-r--r--common/serial.c2
-rw-r--r--drivers/i2c/tegra2_i2c.c8
-rwxr-xr-xdrivers/input/tegra-kbc.c10
-rw-r--r--drivers/spi/tegra2_spi.c8
-rw-r--r--drivers/spi/tegra2_spi_new.c8
-rw-r--r--include/configs/harmony.h2
-rw-r--r--include/configs/tegra2-common.h5
-rw-r--r--include/serial.h2
11 files changed, 31 insertions, 31 deletions
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index 0282b6b406..023e441f15 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -38,15 +38,17 @@
#define NV_PA_APB_UARTC_BASE (NV_PA_APB_MISC_BASE + 0x6200)
#define NV_PA_APB_UARTD_BASE (NV_PA_APB_MISC_BASE + 0x6300)
#define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400)
-#define TEGRA2_NAND_BASE 0x70008000
-#define TEGRA2_I2C1_BASE 0x7000C000
-#define TEGRA2_I2C2_BASE 0x7000C400
-#define TEGRA2_I2C3_BASE 0x7000C500
-#define TEGRA2_DVC_BASE 0x7000D000
+#define TEGRA_NAND_BASE 0x70008000
+#define TEGRA_I2C1_BASE 0x7000C000
+#define TEGRA_I2C2_BASE 0x7000C400
+#define TEGRA_I2C3_BASE 0x7000C500
+#define TEGRA_DVC_BASE 0x7000D000
+#define TEGRA_KBC_BASE 0x7000E200
#define NV_PA_PMC_BASE 0x7000E400
#define NV_PA_EMC_BASE 0x7000F400
#define NV_PA_FUSE_BASE 0x7000F800
#define NV_PA_CSITE_BASE 0x70040000
+
#define NV_PA_USB1_BASE 0xC5000000
#define NV_PA_USB3_BASE 0xC5008000
#define NV_PA_SDMMC1_BASE 0xC8000000
@@ -54,7 +56,7 @@
#define NV_PA_SDMMC3_BASE 0xC8000400
#define NV_PA_SDMMC4_BASE 0xC8000600
-#define TEGRA2_SDRC_CS0 NV_PA_SDRAM_BASE
+#define TEGRA_SDRC_CS0 NV_PA_SDRAM_BASE
#define LOW_LEVEL_SRAM_STACK 0x4000FFFC
#define EARLY_AVP_STACK (NV_PA_SDRAM_BASE + 0x20000)
#define EARLY_CPU_STACK (EARLY_AVP_STACK - 4096)
diff --git a/arch/arm/include/asm/arch-tegra2/tegra.h b/arch/arm/include/asm/arch-tegra2/tegra.h
index 5f829d5c45..2ef29374dd 100644
--- a/arch/arm/include/asm/arch-tegra2/tegra.h
+++ b/arch/arm/include/asm/arch-tegra2/tegra.h
@@ -25,6 +25,7 @@
#define _TEGRA2_H_
#define NV_PA_SDRAM_BASE 0x00000000
+#define TEGRA_SPI_BASE 0x7000C380
#include <asm/arch-tegra/tegra.h>
diff --git a/arch/arm/include/asm/arch-tegra2/tegra2_spi.h b/arch/arm/include/asm/arch-tegra2/tegra2_spi.h
index 1875a7a831..72dc868831 100644
--- a/arch/arm/include/asm/arch-tegra2/tegra2_spi.h
+++ b/arch/arm/include/asm/arch-tegra2/tegra2_spi.h
@@ -27,8 +27,6 @@
#include <asm/types.h>
-#define TEGRA2_SPI_BASE 0x7000C380
-
struct spi_tegra {
u32 command; /* SPI_COMMAND_0 register */
u32 status; /* SPI_STATUS_0 register */
diff --git a/common/serial.c b/common/serial.c
index a69ac4d212..89c7a0eb4a 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -47,7 +47,7 @@ struct serial_device *__default_serial_console (void)
|| defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) \
|| defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) \
|| defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) \
- || defined(CONFIG_TEGRA2) || defined(CONFIG_SYS_COREBOOT)
+ || defined(CONFIG_TEGRA) || defined(CONFIG_SYS_COREBOOT)
#if defined(CONFIG_CONS_INDEX) && defined(CONFIG_SYS_NS16550_SERIAL)
#if (CONFIG_CONS_INDEX==1)
return &eserial1_device;
diff --git a/drivers/i2c/tegra2_i2c.c b/drivers/i2c/tegra2_i2c.c
index 81455f8625..f069c4d437 100644
--- a/drivers/i2c/tegra2_i2c.c
+++ b/drivers/i2c/tegra2_i2c.c
@@ -393,10 +393,10 @@ static const enum periph_id i2c_periph_ids[CONFIG_SYS_MAX_I2C_BUS] = {
};
static const u32 *i2c_bus_base[CONFIG_SYS_MAX_I2C_BUS] = {
- (u32 *)TEGRA2_DVC_BASE,
- (u32 *)TEGRA2_I2C1_BASE,
- (u32 *)TEGRA2_I2C2_BASE,
- (u32 *)TEGRA2_I2C3_BASE
+ (u32 *)TEGRA_DVC_BASE,
+ (u32 *)TEGRA_I2C1_BASE,
+ (u32 *)TEGRA_I2C2_BASE,
+ (u32 *)TEGRA_I2C3_BASE
};
/* pinmux_configs based on the pinmux configuration */
diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c
index 0833fc42c3..961c7b8dba 100755
--- a/drivers/input/tegra-kbc.c
+++ b/drivers/input/tegra-kbc.c
@@ -41,8 +41,6 @@ enum {
#define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
-#define TEGRA2_KBC_BASE 0x7000E200
-
/* KBC row scan time and delay for beginning the row scan. */
#define KBC_ROW_SCAN_TIME 16
#define KBC_ROW_SCAN_DLY 5
@@ -139,7 +137,7 @@ static int is_ghost_key_config(int *rows_val, int *cols_val, int valid)
/* reads the keyboard fifo for current keypresses. */
static int tegra_kbc_find_keys(int *fifo)
{
- struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA2_KBC_BASE;
+ struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA_KBC_BASE;
int rows_val[KBC_MAX_KPENT], cols_val[KBC_MAX_KPENT];
u32 kp_ent_val[(KBC_MAX_KPENT + 3) / 4];
u32 *kp_ents = kp_ent_val;
@@ -246,7 +244,7 @@ static int tegra_kbc_get_single_char(u32 fifo_cnt)
/* manages keyboard hardware registers on keypresses and returns a key.*/
static unsigned char tegra_kbc_get_char(void)
{
- struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA2_KBC_BASE;
+ struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA_KBC_BASE;
u32 val, ctl;
char key = 0;
@@ -447,7 +445,7 @@ static int kbd_getc(void)
/* configures keyboard GPIO registers to use the rows and columns */
static void config_kbc(void)
{
- struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA2_KBC_BASE;
+ struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA_KBC_BASE;
int i;
for (i = 0; i < KBC_MAX_GPIO; i++) {
@@ -477,7 +475,7 @@ static void config_kbc(void)
static int tegra_kbc_open(void)
{
- struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA2_KBC_BASE;
+ struct kbc_tegra *kbc = (struct kbc_tegra *)TEGRA_KBC_BASE;
unsigned int scan_time_rows, debounce_cnt, rpt_cnt;
u32 val = 0;
diff --git a/drivers/spi/tegra2_spi.c b/drivers/spi/tegra2_spi.c
index 7885a347d7..3c00928177 100644
--- a/drivers/spi/tegra2_spi.c
+++ b/drivers/spi/tegra2_spi.c
@@ -76,7 +76,7 @@ void spi_free_slave(struct spi_slave *slave)
void spi_init(void)
{
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
u32 reg;
/* Change SPI clock to 48MHz, PLLP_OUT0 source */
@@ -131,7 +131,7 @@ void spi_release_bus(struct spi_slave *slave)
void spi_cs_activate(struct spi_slave *slave)
{
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
u32 val;
spi_enable();
@@ -143,7 +143,7 @@ void spi_cs_activate(struct spi_slave *slave)
void spi_cs_deactivate(struct spi_slave *slave)
{
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
u32 val;
/* CS is negated on Tegra, so drive a 0 to get a 1 */
@@ -154,7 +154,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
void *din, unsigned long flags)
{
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
unsigned int status;
int num_bytes = (bitlen + 7) / 8;
int i, ret, tm, bytes, bits, isRead = 0;
diff --git a/drivers/spi/tegra2_spi_new.c b/drivers/spi/tegra2_spi_new.c
index f4d8d1ca6f..191cef26d6 100644
--- a/drivers/spi/tegra2_spi_new.c
+++ b/drivers/spi/tegra2_spi_new.c
@@ -76,7 +76,7 @@ void spi_free_slave(struct spi_slave *slave)
void spi_init(void)
{
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
u32 reg;
/* Change SPI clock to 24MHz, PLLP_OUT0 source */
@@ -131,7 +131,7 @@ void spi_release_bus(struct spi_slave *slave)
void spi_cs_activate(struct spi_slave *slave)
{
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
u32 val;
spi_enable();
@@ -143,7 +143,7 @@ void spi_cs_activate(struct spi_slave *slave)
void spi_cs_deactivate(struct spi_slave *slave)
{
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
u32 val;
/* CS is negated on Tegra, so drive a 0 to get a 1 */
@@ -199,7 +199,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout, unsigned int bitsout,
{
int retval = 0;
char *delayed_msg = NULL;
- struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
+ struct spi_tegra *spi = (struct spi_tegra *)TEGRA_SPI_BASE;
uint32_t status;
uint32_t writecnt = (bitsout + 7) / 8;
uint32_t readcnt = (bitsin + 7) / 8;
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 391aad36d3..2fb0a0cf8b 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -124,7 +124,7 @@
#define CONFIG_NAND_WP_GPIO GPIO_PC7
/* physical address to access nand at CS0 */
-#define CONFIG_SYS_NAND_BASE TEGRA2_NAND_BASE
+#define CONFIG_SYS_NAND_BASE TEGRA_NAND_BASE
/* Max number of NAND devices */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index 3dd3b2e873..7885cd7243 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -47,6 +47,7 @@
*/
#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
#define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */
+#define CONFIG_TEGRA /* in the NVidia Tegra family */
#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
#define CONFIG_SYS_NO_L2CACHE /* No L2 cache */
#define CONFIG_BOOTSTAGE /* Record boot time */
@@ -436,7 +437,7 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-#define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000)
+#define CONFIG_SYS_MEMTEST_START (TEGRA_SDRC_CS0 + 0x600000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
#define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */
@@ -454,7 +455,7 @@
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM_1 TEGRA2_SDRC_CS0
+#define PHYS_SDRAM_1 TEGRA_SDRC_CS0
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
#define CONFIG_SYS_TEXT_BASE 0x00E08000
diff --git a/include/serial.h b/include/serial.h
index 3a1c888cf0..cbd88bcb84 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -28,7 +28,7 @@ extern struct serial_device * default_serial_console (void);
defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \
defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \
- defined(CONFIG_TEGRA2)
+ defined(CONFIG_TEGRA)
extern struct serial_device serial0_device;
extern struct serial_device serial1_device;
#if defined(CONFIG_SYS_NS16550_SERIAL)