diff options
| author | Ye Li <ye.li@nxp.com> | 2019-01-03 23:13:40 -0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2019-01-08 21:45:35 -0800 |
| commit | bb5ed5774d63031571e04a3061b8481139601257 (patch) | |
| tree | 86759f860e8789da2a0b3c4e7d390585320a5267 | |
| parent | 94b6e0f525ce3adb015e41659b240689dab304ec (diff) | |
MLK-20666-2 DTS: imx8mq: Enable i2c force idle
Add i2c gpio pinctrl settings and properties to enable i2c force idle.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/dts/fsl-imx8mq-ddr3l-arm2.dts | 23 | ||||
| -rw-r--r-- | arch/arm/dts/fsl-imx8mq-ddr4-arm2.dts | 23 | ||||
| -rw-r--r-- | arch/arm/dts/fsl-imx8mq-evk.dts | 23 |
3 files changed, 63 insertions, 6 deletions
diff --git a/arch/arm/dts/fsl-imx8mq-ddr3l-arm2.dts b/arch/arm/dts/fsl-imx8mq-ddr3l-arm2.dts index 1dfcfe429d..857494fdf8 100644 --- a/arch/arm/dts/fsl-imx8mq-ddr3l-arm2.dts +++ b/arch/arm/dts/fsl-imx8mq-ddr3l-arm2.dts @@ -116,6 +116,19 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp-gpio { + fsl,pins = < + MX8MQ_IOMUXC_I2C1_SCL_GPIO5_IO14 0x7f + MX8MQ_IOMUXC_I2C1_SDA_GPIO5_IO15 0x7f + >; + }; + + pinctrl_i2c2_gpio: i2c2grp-gpio { + fsl,pins = < + MX8MQ_IOMUXC_I2C2_SCL_GPIO5_IO16 0x7f + MX8MQ_IOMUXC_I2C2_SDA_GPIO5_IO17 0x7f + >; + }; pinctrl_pcie0: pcie0grp { fsl,pins = < @@ -301,8 +314,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -394,8 +410,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "disabled"; }; diff --git a/arch/arm/dts/fsl-imx8mq-ddr4-arm2.dts b/arch/arm/dts/fsl-imx8mq-ddr4-arm2.dts index ef1feef41e..1fb63091c3 100644 --- a/arch/arm/dts/fsl-imx8mq-ddr4-arm2.dts +++ b/arch/arm/dts/fsl-imx8mq-ddr4-arm2.dts @@ -121,6 +121,19 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp-gpio { + fsl,pins = < + MX8MQ_IOMUXC_I2C1_SCL_GPIO5_IO14 0x7f + MX8MQ_IOMUXC_I2C1_SDA_GPIO5_IO15 0x7f + >; + }; + + pinctrl_i2c2_gpio: i2c2grp-gpio { + fsl,pins = < + MX8MQ_IOMUXC_I2C2_SCL_GPIO5_IO16 0x7f + MX8MQ_IOMUXC_I2C2_SDA_GPIO5_IO17 0x7f + >; + }; pinctrl_pcie0: pcie0grp { fsl,pins = < @@ -276,8 +289,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -369,8 +385,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "disabled"; }; diff --git a/arch/arm/dts/fsl-imx8mq-evk.dts b/arch/arm/dts/fsl-imx8mq-evk.dts index 6e67596320..6b713f98c0 100644 --- a/arch/arm/dts/fsl-imx8mq-evk.dts +++ b/arch/arm/dts/fsl-imx8mq-evk.dts @@ -124,6 +124,19 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp-gpio { + fsl,pins = < + MX8MQ_IOMUXC_I2C1_SCL_GPIO5_IO14 0x7f + MX8MQ_IOMUXC_I2C1_SDA_GPIO5_IO15 0x7f + >; + }; + + pinctrl_i2c2_gpio: i2c2grp-gpio { + fsl,pins = < + MX8MQ_IOMUXC_I2C2_SCL_GPIO5_IO16 0x7f + MX8MQ_IOMUXC_I2C2_SDA_GPIO5_IO17 0x7f + >; + }; pinctrl_pcie0: pcie0grp { fsl,pins = < @@ -311,8 +324,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -419,8 +435,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "disabled"; }; |