summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2011-05-09 17:57:17 -0700
committerSimon Glass <sjg@chromium.org>2011-08-24 10:01:31 -0700
commitb285f261579d311b3b6c25799dc078b6ad352645 (patch)
tree8d294e417a8d82231e86ae4a50f9f3a4ccb308a8
parent1030fe7312fc80a8bf3ff40c0546cc73dc2d0be0 (diff)
fdt: add initial device tree files for Tegra2
These files are from the device tree mailing list. So far they are very basic. BUG=chromium-os:11623 TEST=(none, this just adds files) Change-Id: I201110f58bf63e4b2d0728355cdfceb68455f0f0 Reviewed-on: http://gerrit.chromium.org/gerrit/618 Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/cpu/armv7/tegra2/tegra250.dtsi99
-rw-r--r--board/nvidia/seaboard/tegra2-seaboard.dts55
-rw-r--r--dts/skeleton.dtsi13
3 files changed, 167 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/tegra250.dtsi b/arch/arm/cpu/armv7/tegra2/tegra250.dtsi
new file mode 100644
index 0000000000..1b6d5b6740
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra2/tegra250.dtsi
@@ -0,0 +1,99 @@
+/include/ "../../../../../dts/skeleton.dtsi"
+
+/ {
+ model = "NVIDIA Tegra 250";
+ compatible = "nvidia,tegra250";
+ interrupt-parent = <&intc>;
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc: interrupt-controller@50041000 {
+ compatible = "nvidia,tegra250-gic", "arm,gic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = < 0x50041000 0x1000 >,
+ < 0x50040100 0x0100 >;
+ };
+ };
+
+ gpio: gpio@6000d000 {
+ compatible = "nvidia,tegra250-gpio", "ns16550";
+ reg = < 0x6000d000 0x1000 >;
+ interrupts = < 64 65 66 67 87 119 121 >;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ serial@70006000 {
+ compatible = "nvidia,tegra250-uart", "ns16550";
+ reg = <0x70006000 0x40>;
+ reg-shift = <2>;
+ interrupts = < 68 >;
+ status = "disabled";
+ };
+
+ serial@70006040 {
+ compatible = "nvidia,tegra250-uart", "ns16550";
+ reg = <0x70006040 0x40>;
+ reg-shift = <2>;
+ interrupts = < 69 >;
+ status = "disabled";
+ };
+
+ serial@70006200 {
+ compatible = "nvidia,tegra250-uart", "ns16550";
+ reg = <0x70006200 0x100>;
+ reg-shift = <2>;
+ interrupts = < 78 >;
+ status = "disabled";
+ };
+
+ serial@70006300 {
+ compatible = "nvidia,tegra250-uart", "ns16550";
+ reg = <0x70006300 0x100>;
+ reg-shift = <2>;
+ interrupts = < 122 >;
+ status = "disabled";
+ };
+
+ serial@70006400 {
+ compatible = "nvidia,tegra250-uart", "ns16550";
+ reg = <0x70006400 0x100>;
+ reg-shift = <2>;
+ interrupts = < 123 >;
+ status = "disabled";
+ };
+
+ sdhci@c8000000 {
+ compatible = "nvidia,tegra250-sdhci";
+ reg = <0xc8000000 0x200>;
+ interrupts = < 46 >;
+ status = "disabled";
+ };
+
+ sdhci@c8000200 {
+ compatible = "nvidia,tegra250-sdhci";
+ reg = <0xc8000200 0x200>;
+ interrupts = < 47 >;
+ status = "disabled";
+ };
+
+ sdhci@c8000400 {
+ compatible = "nvidia,tegra250-sdhci";
+ reg = <0xc8000400 0x200>;
+ interrupts = < 51 >;
+ status = "disabled";
+ };
+
+ sdhci@c8000600 {
+ compatible = "nvidia,tegra250-sdhci";
+ reg = <0xc8000600 0x200>;
+ interrupts = < 63 >;
+ status = "disabled";
+ };
+};
+
diff --git a/board/nvidia/seaboard/tegra2-seaboard.dts b/board/nvidia/seaboard/tegra2-seaboard.dts
new file mode 100644
index 0000000000..0663da2886
--- /dev/null
+++ b/board/nvidia/seaboard/tegra2-seaboard.dts
@@ -0,0 +1,55 @@
+/dts-v1/;
+
+/memreserve/ 0x1c000000 0x04000000;
+/include/ "../../../arch/arm/cpu/armv7/tegra2/tegra250.dtsi"
+
+/ {
+ model = "NVIDIA Seaboard";
+ compatible = "nvidia,seaboard", "nvidia,tegra250";
+
+ aliases {
+ console = "/serial@70006300";
+
+ /*
+ * Number the serial ports so the U-Boot NS16550 driver can
+ * maintain an output buffer for each.
+ */
+ serial3 = "/serial@70006300";
+ };
+
+ chosen {
+ bootargs = "";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = < 0x00000000 0x40000000 >;
+ };
+
+ serial@70006300 {
+ status = "ok";
+ clock-frequency = < 216000000 >;
+ };
+
+ /*
+ * Seaboard has a switch on GPIO67 which affects this UART. Until
+ * pinmux support is added it is not clear how to do this, so this
+ * is a stop-gap.
+ */
+ switch {
+ compatible = "nvidia,spi-uart-switch";
+ uart = "serial3";
+ gpios = <&gpio 67 0>; /* Port I = 8 bit = 3: 8 * 8 + 3 */
+ };
+
+ sdhci@c8000400 {
+ status = "ok";
+ gpios = <&gpio 69 0>, /* cd, gpio PI5 */
+ <&gpio 57 0>, /* wp, gpio PH1 */
+ <&gpio 70 0>; /* power, gpio PI6 */
+ };
+
+ sdhci@c8000600 {
+ status = "ok";
+ };
+};
diff --git a/dts/skeleton.dtsi b/dts/skeleton.dtsi
new file mode 100644
index 0000000000..b41d241de2
--- /dev/null
+++ b/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value. The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};