diff options
| author | Sean Anderson <seanga2@gmail.com> | 2020-10-25 21:46:56 -0400 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-10-26 10:01:28 +0800 |
| commit | 79b135f1f937296fbe40ffa8500b531a7e1a0e9d (patch) | |
| tree | b196ad1c9d28d1b4528752e10d1c7960436734bd | |
| parent | 963911e9e1c17b2f973ff49ddd51060d6c340c5f (diff) | |
riscv: Move Andes PLMT driver to drivers/timer
This is a regular timer driver, and should live with the other timer
drivers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
| -rw-r--r-- | MAINTAINERS | 1 | ||||
| -rw-r--r-- | arch/riscv/Kconfig | 7 | ||||
| -rw-r--r-- | arch/riscv/lib/Makefile | 1 | ||||
| -rw-r--r-- | drivers/timer/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/timer/Makefile | 1 | ||||
| -rw-r--r-- | drivers/timer/andes_plmt_timer.c (renamed from arch/riscv/lib/andes_plmt.c) | 0 |
6 files changed, 9 insertions, 8 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index fc4fad46eee..5d022352c43 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -938,6 +938,7 @@ S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-riscv.git F: arch/riscv/ F: cmd/riscv/ +F: drivers/timer/andes_plmt_timer.c F: tools/prelink-riscv.c RISC-V KENDRYTE diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 756047636d0..30b05408b14 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -170,13 +170,6 @@ config ANDES_PLIC The Andes PLIC block holds memory-mapped claim and pending registers associated with software interrupt. -config ANDES_PLMT - bool - depends on RISCV_MMODE || SPL_RISCV_MMODE - help - The Andes PLMT block holds memory-mapped mtime register - associated with timer tick. - config SYS_MALLOC_F_LEN default 0x1000 diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 10ac5b06d3c..12c14f20198 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -13,7 +13,6 @@ obj-y += cache.o ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y) obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o obj-$(CONFIG_ANDES_PLIC) += andes_plic.o -obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o else obj-$(CONFIG_SBI) += sbi.o obj-$(CONFIG_SBI_IPI) += sbi_ipi.o diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index f8fa4aa71f4..6b8e4c9dc01 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -53,6 +53,13 @@ config ALTERA_TIMER Select this to enable a timer for Altera devices. Please find details on the "Embedded Peripherals IP User Guide" of Altera. +config ANDES_PLMT + bool + depends on RISCV_MMODE || SPL_RISCV_MMODE + help + The Andes PLMT block holds memory-mapped mtime register + associated with timer tick. + config ARC_TIMER bool "ARC timer support" depends on TIMER && ARC && CLK diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index 3a4d74b996b..dd4f9cc1d40 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -5,6 +5,7 @@ obj-y += timer-uclass.o obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o +obj-$(CONFIG_ANDES_PLMT) += andes_plmt_timer.o obj-$(CONFIG_ARC_TIMER) += arc_timer.o obj-$(CONFIG_AST_TIMER) += ast_timer.o obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o diff --git a/arch/riscv/lib/andes_plmt.c b/drivers/timer/andes_plmt_timer.c index cec86718c7f..cec86718c7f 100644 --- a/arch/riscv/lib/andes_plmt.c +++ b/drivers/timer/andes_plmt_timer.c |