diff options
| author | Stefan Roese <sr@denx.de> | 2016-09-26 10:18:07 +0200 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-10-11 11:55:33 +0800 |
| commit | 5572367cc595d567361fc29298c099922ed65812 (patch) | |
| tree | 11c783d6d0fbd088f58c76e72f647f87cf551212 | |
| parent | df233e734fb70076c0434b242594476332208ee0 (diff) | |
x86: baytrail: Add 2nd eMMC controller to the PCI probe list
With this addition, the eMMC device available on the congatec and DFI
BayTrail SoM is detected correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | arch/x86/cpu/baytrail/valleyview.c | 5 | ||||
| -rw-r--r-- | include/pci_ids.h | 5 |
2 files changed, 6 insertions, 4 deletions
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c index b312d9f9fb..87ba849c1c 100644 --- a/arch/x86/cpu/baytrail/valleyview.c +++ b/arch/x86/cpu/baytrail/valleyview.c @@ -12,8 +12,9 @@ #include <asm/post.h> static struct pci_device_id mmc_supported[] = { - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO }, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 }, {}, }; diff --git a/include/pci_ids.h b/include/pci_ids.h index 17a01a0ff4..ab6aa58adb 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -2599,13 +2599,14 @@ #define PCI_DEVICE_ID_INTEL_I960 0x0960 #define PCI_DEVICE_ID_INTEL_I960RM 0x0962 #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB 0x0c60 -#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO 0x0f15 -#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD 0x0f16 +#define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 +#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC 0x0f1c #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE 0x0f20 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE_ALT 0x0f21 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA 0x0f22 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT 0x0f23 +#define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50 #define PCI_DEVICE_ID_INTEL_82541ER 0x1078 #define PCI_DEVICE_ID_INTEL_82541GI_LF 0x107c #define PCI_DEVICE_ID_INTEL_82542 0x1000 |