diff options
| author | Ran Wang <ran.wang_1@nxp.com> | 2018-09-26 13:46:30 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2018-09-27 10:01:28 -0700 |
| commit | 26cbc0d663555b8af7d40ecfd0d0fefe960d9686 (patch) | |
| tree | 9bf0ee61a71948f0a3d312ba3f3f42dcedb4f88d | |
| parent | 247058b9b4b60a9d67aefd3d3e930fcd3ba9c7c3 (diff) | |
armv7: ls102xa: Disable QE before enter deep sleep
Otherwise system will hang after executing wfi.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
| -rw-r--r-- | arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index af413f8622..bb169aaaf4 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -73,6 +73,7 @@ static void __secure ls1_deepsleep_irq_cfg(void) * read, that is why we don't read it from register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]); + out_be32(&rcpm->ippdexpcr1, ippdexpcr1); if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 | @@ -192,6 +193,9 @@ static void __secure ls1_deep_sleep(u32 entry_point) setbits_be32(&scfg->dpslpcr, SCFG_DPSLPCR_WDRR_EN); setbits_be32(&gur->crstsr, DCFG_CRSTSR_WDRFR); + /* Disable QE */ + setbits_be32(&gur->devdisr, CCSR_DEVDISR1_QE); + ls1_deepsleep_irq_cfg(); psci_v7_flush_dcache_all(); diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index d6ba298c5b..137cd61804 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -86,6 +86,8 @@ struct sys_info { unsigned long freq_localbus; }; +#define CCSR_DEVDISR1_QE 0x00000001 + /* Device Configuration and Pin Control */ struct ccsr_gur { u32 porsr1; /* POR status 1 */ |