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authorAxel Beierlein <belatronix@web.de>2008-08-16 00:30:48 +0200
committerWolfgang Denk <wd@denx.de>2008-08-21 01:39:24 +0200
commitbef92e215d945cc574399c1a1b00a3a76d35aa03 (patch)
tree3bb35fdf25c2a2dea08083ca2d48880f1935af6e
parent0800707b6d5041a840a65d556032c15c584b55f8 (diff)
Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 Boards
Tested with TQM5200S on STK52XX.200 Board Signed-off-by: Axel Beierlein <belatronix@web.de>
-rw-r--r--cpu/mpc5xxx/cpu.c20
-rw-r--r--include/configs/TQM5200.h1
-rw-r--r--include/mpc5xxx.h1
3 files changed, 22 insertions, 0 deletions
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index ace16535ff6..d87f42ca29e 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -135,3 +135,23 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#endif
}
#endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+ volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_CDM_BRDCRMB);
+
+ *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | a;
+}
+
+ulong bootcount_load (void)
+{
+ volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_CDM_BRDCRMB);
+
+ if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+ return 0;
+ else
+ return (*save_addr & 0x0000ffff);
+}
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 992439f3b33..0ba74558967 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -55,6 +55,7 @@
#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_BOOTCOUNT_LIMIT 1
#ifdef CONFIG_FO300
#define CFG_DEVICE_NULLDEV 1 /* enable null device */
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index 5d11ef0f480..0f5bee574ed 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -137,6 +137,7 @@
/* Clock Distribution Module */
#define MPC5XXX_CDM_JTAGID (MPC5XXX_CDM + 0x0000)
#define MPC5XXX_CDM_PORCFG (MPC5XXX_CDM + 0x0004)
+#define MPC5XXX_CDM_BRDCRMB (MPC5XXX_CDM + 0x0008)
#define MPC5XXX_CDM_CFG (MPC5XXX_CDM + 0x000c)
#define MPC5XXX_CDM_48_FDC (MPC5XXX_CDM + 0x0010)
#define MPC5XXX_CDM_SRESET (MPC5XXX_CDM + 0x0020)