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authorGabe Black <gabeblack@chromium.org>2011-08-09 01:00:46 -0700
committerSimon Glass <sjg@chromium.org>2011-08-29 10:59:25 -0700
commitbb396a124caaaf0e1a91900e67c883fd02bc2e54 (patch)
treede6d03172066b667743c00a3a73138a581868251
parentec3dd714cc12d8471b68d1cd2d7930a9b67f4c6b (diff)
Turn on the new spi_xfer interface on chromeos boards
This interface will allow writing an ICH7 driver on x86, and is turned on for tegra boards as well for consistency. BUG=chrome-os-partner:4722 TEST=Built x86-alex and tegra2_kaen with this option turned on. Change-Id: Ia14dbf9fe33a207c15d1847adc0e9e5246b879b8 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/5541 Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--include/configs/coreboot.h1
-rw-r--r--include/configs/seaboard.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index c8a9036141e..a79a910cebd 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -269,6 +269,7 @@
* FLASH configuration
*/
#define CONFIG_SPI_FLASH
+#define CONFIG_NEW_SPI_XFER
#define CONFIG_DUMMY_SPI
#define CONFIG_SYS_MAX_FLASH_SECT 1
#define CONFIG_SYS_MAX_FLASH_BANKS 1
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 95432a7218e..d51cd11f785 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -147,6 +147,7 @@
#define CONFIG_TEGRA2_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_NEW_SPI_XFER
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF