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authorSatyanarayana, Sandhya <sandhya.satyanarayana@ti.com>2012-11-28 17:32:10 +0530
committerTom Rini <trini@ti.com>2013-02-22 10:14:30 -0500
commitc074bfaa7fe78727c5b4723a46d3b7bd67f32b73 (patch)
treeba4b13b9f2379895b5f2c0b654c0a3e7a8a29936
parent5037e6a196b54d5b5006bc97ee2cf52deaf40596 (diff)
am335x: Enable DDR dynamic power down for DDR3 boards
This patch enables dynamically powering down the IO receiver when not performing a read. This optimizes both active and standby power consumption. This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB. Suggested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
-rw-r--r--arch/arm/include/asm/arch-am33xx/ddr_defs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 8e69fb67b14..e3a4cd41cb2 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -49,7 +49,7 @@
#define MT47H128M16RT25E_IOCTRL_VALUE 0x18B
/* Micron MT41J128M16JT-125 */
-#define MT41J128MJT125_EMIF_READ_LATENCY 0x06
+#define MT41J128MJT125_EMIF_READ_LATENCY 0x100006
#define MT41J128MJT125_EMIF_TIM1 0x0888A39B
#define MT41J128MJT125_EMIF_TIM2 0x26337FDA
#define MT41J128MJT125_EMIF_TIM3 0x501F830F