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author | Nikhil Badola <nikhil.badola@freescale.com> | 2015-06-26 17:01:50 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2015-08-03 12:06:39 -0700 |
commit | f7ff0e5e96d6741e93f97cbd1906669269b3b69e (patch) | |
tree | 4b17c38f35ae50b06ecedc29619159d1a94cfe58 | |
parent | ca7fb12cc18e80d14cca9570aec1d544f5d8c169 (diff) |
armv8/lsch3/config: Define USB XHCI controller base address for LS2085A
Define base address of both usb xhci controllers in lsch3 config
in the format (IMMR + offset) for LS2085A
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r-- | arch/arm/include/asm/arch-fsl-lsch3/config.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index 032cfd80ebb..a4576ddce1a 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -64,6 +64,9 @@ #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) #define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000) +#define CONFIG_SYS_LS2085A_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_LS2085A_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000) + /* TZ Protection Controller Definitions */ #define TZPC_BASE 0x02200000 #define TZPCR0SIZE_BASE (TZPC_BASE) |