arm: mach-k3: j722s: Enable QoS for DSS and MAIN-R5F

Enable Quality of Service blocks for Display Subsystem DSS0 and DSS1
and Main R5F core by servicing their traffic from RT queue.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>

5 files changed, 187 insertions, 0 deletions

diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h
index 90a65eeaff..f7f0100358 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -43,6 +43,7 @@
 
 #ifdef CONFIG_SOC_K3_J722S
 #include "j722s_hardware.h"
+#include "j722s_qos.h"
 #endif
 
 /* Assuming these addresses and definitions stay common across K3 devices */
@@ -152,4 +153,7 @@ struct k3_qos_data {
 extern struct k3_qos_data am62a_qos_data[];
 extern u32 am62a_qos_count;
 
+extern struct k3_qos_data j722s_qos_data[];
+extern u32 j722s_qos_count;
+
 #endif /* _ASM_ARCH_HARDWARE_H_ */
diff --git a/arch/arm/mach-k3/include/mach/j722s_qos.h b/arch/arm/mach-k3/include/mach/j722s_qos.h
new file mode 100644
index 0000000000..3c49c51fb9
--- /dev/null
+++ b/arch/arm/mach-k3/include/mach/j722s_qos.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Keystone3 Quality of service endpoint definitions
+ * Auto generated by K3 Resource Partitioning Tool
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#define QOS_0	(0 << 0)
+#define QOS_1	(1 << 0)
+#define QOS_2	(2 << 0)
+#define QOS_3	(3 << 0)
+#define QOS_4	(4 << 0)
+#define QOS_5	(5 << 0)
+#define QOS_6	(6 << 0)
+#define QOS_7	(7 << 0)
+
+#define ORDERID_0	(0 << 4)
+#define ORDERID_1	(1 << 4)
+#define ORDERID_2	(2 << 4)
+#define ORDERID_3	(3 << 4)
+#define ORDERID_4	(4 << 4)
+#define ORDERID_5	(5 << 4)
+#define ORDERID_6	(6 << 4)
+#define ORDERID_7	(7 << 4)
+#define ORDERID_8	(8 << 4)
+#define ORDERID_9	(9 << 4)
+#define ORDERID_10	(10 << 4)
+#define ORDERID_11	(11 << 4)
+#define ORDERID_12	(12 << 4)
+#define ORDERID_13	(13 << 4)
+#define ORDERID_14	(14 << 4)
+#define ORDERID_15	(15 << 4)
+
+#define ASEL_0	(0 << 8)
+#define ASEL_1	(1 << 8)
+#define ASEL_2	(2 << 8)
+#define ASEL_3	(3 << 8)
+#define ASEL_4	(4 << 8)
+#define ASEL_5	(5 << 8)
+#define ASEL_6	(6 << 8)
+#define ASEL_7	(7 << 8)
+#define ASEL_8	(8 << 8)
+#define ASEL_9	(9 << 8)
+#define ASEL_10	(10 << 8)
+#define ASEL_11	(11 << 8)
+#define ASEL_12	(12 << 8)
+#define ASEL_13	(13 << 8)
+#define ASEL_14	(14 << 8)
+#define ASEL_15	(15 << 8)
+
+#define EPRIORITY_0	(0 << 12)
+#define EPRIORITY_1	(1 << 12)
+#define EPRIORITY_2	(2 << 12)
+#define EPRIORITY_3	(3 << 12)
+#define EPRIORITY_4	(4 << 12)
+#define EPRIORITY_5	(5 << 12)
+#define EPRIORITY_6	(6 << 12)
+#define EPRIORITY_7	(7 << 12)
+
+#define VIRTID_0	(0 << 16)
+#define VIRTID_1	(1 << 16)
+#define VIRTID_2	(2 << 16)
+#define VIRTID_3	(3 << 16)
+#define VIRTID_4	(4 << 16)
+#define VIRTID_5	(5 << 16)
+#define VIRTID_6	(6 << 16)
+#define VIRTID_7	(7 << 16)
+#define VIRTID_8	(8 << 16)
+#define VIRTID_9	(9 << 16)
+#define VIRTID_10	(10 << 16)
+#define VIRTID_11	(11 << 16)
+#define VIRTID_12	(12 << 16)
+#define VIRTID_13	(13 << 16)
+#define VIRTID_14	(14 << 16)
+#define VIRTID_15	(15 << 16)
+
+#define ATYPE_0	(0 << 28)
+#define ATYPE_1	(1 << 28)
+#define ATYPE_2	(2 << 28)
+#define ATYPE_3	(3 << 28)
+
+#define PULSAR_UL_MAIN_0_CPU0_RMST      0x45D15000
+#define PULSAR_UL_MAIN_0_CPU0_WMST      0x45D15400
+#define PULSAR_UL_MAIN_0_CPU0_PMST      0x45D15800
+#define K3_DSS_UL_MAIN_0_VBUSM_DMA      0x45D30000
+#define K3_DSS_UL_MAIN_1_VBUSM_DMA      0x45D30400
diff --git a/arch/arm/mach-k3/j722s/Makefile b/arch/arm/mach-k3/j722s/Makefile
index 50b0df20a3..1aa540d0a2 100644
--- a/arch/arm/mach-k3/j722s/Makefile
+++ b/arch/arm/mach-k3/j722s/Makefile
@@ -4,3 +4,4 @@
 
 obj-y += clk-data.o
 obj-y += dev-data.o
+obj-y += j722s_qos_data.o
diff --git a/arch/arm/mach-k3/j722s/j722s_qos_data.c b/arch/arm/mach-k3/j722s/j722s_qos_data.c
new file mode 100644
index 0000000000..fb1b04f2f5
--- /dev/null
+++ b/arch/arm/mach-k3/j722s/j722s_qos_data.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * j722s Quality of Service (QoS) Configuration Data
+ * Auto generated from K3 Resource Partitioning tool
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include "common.h"
+
+struct k3_qos_data j722s_qos_data[] = {
+	/* modules_qosConfig0 - 1 endpoints, 4 channels */
+	{
+		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 0,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 1,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 2,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 3,
+		.val = ORDERID_15,
+	},
+
+	/* modules_qosConfig1 - 1 endpoints, 4 channels */
+	{
+		.reg = K3_DSS_UL_MAIN_1_VBUSM_DMA + 0x100 + 0x4 * 0,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = K3_DSS_UL_MAIN_1_VBUSM_DMA + 0x100 + 0x4 * 1,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = K3_DSS_UL_MAIN_1_VBUSM_DMA + 0x100 + 0x4 * 2,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = K3_DSS_UL_MAIN_1_VBUSM_DMA + 0x100 + 0x4 * 3,
+		.val = ORDERID_15,
+	},
+
+	/* modules_qosConfig2 - 3 endpoints, 1 channels */
+	{
+		.reg = PULSAR_UL_MAIN_0_CPU0_PMST + 0x100 + 0x4 * 0,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = PULSAR_UL_MAIN_0_CPU0_RMST + 0x100 + 0x4 * 0,
+		.val = ORDERID_15,
+	},
+	{
+		.reg = PULSAR_UL_MAIN_0_CPU0_WMST + 0x100 + 0x4 * 0,
+		.val = ORDERID_15,
+	},
+
+	/* Following registers set 1:1 mapping for orderID MAP1/MAP2
+	 * remap registers. orderID x is remapped to orderID x again
+	 * This is to ensure orderID from MAP register is unchanged
+	 */
+
+	/* K3_DSS_UL_MAIN_0_VBUSM_DMA - 0 groups */
+
+	/* K3_DSS_UL_MAIN_1_VBUSM_DMA - 0 groups */
+
+	/* PULSAR_UL_MAIN_0_CPU0_PMST - 0 groups */
+
+	/* PULSAR_UL_MAIN_0_CPU0_RMST - 0 groups */
+
+	/* PULSAR_UL_MAIN_0_CPU0_WMST - 0 groups */
+};
+
+uint32_t j722s_qos_count = sizeof(j722s_qos_data) / sizeof(j722s_qos_data[0]);
diff --git a/arch/arm/mach-k3/j722s_init.c b/arch/arm/mach-k3/j722s_init.c
index df7a1ce1b9..4708a3498c 100644
--- a/arch/arm/mach-k3/j722s_init.c
+++ b/arch/arm/mach-k3/j722s_init.c
@@ -66,6 +66,20 @@ static void ctrl_mmr_unlock(void)
 	mmr_unlock(PADCFG_MMR1_BASE, 1);
 }
 
+#if (IS_ENABLED(CONFIG_CPU_V7R))
+static void setup_qos(void)
+{
+	u32 i;
+
+	for (i = 0; i < j722s_qos_count; i++)
+		writel(j722s_qos_data[i].val, (uintptr_t)j722s_qos_data[i].reg);
+}
+#else
+static void setup_qos(void)
+{
+}
+#endif
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *dev;
@@ -152,6 +166,8 @@ void board_init_f(ulong dummy)
 			panic("DRAM init failed: %d\n", ret);
 	}
 
+	setup_qos();
+
 	debug("j722s_init: %s done\n", __func__);
 }