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authorMario Six <mario.six@gdsys.cc>2018-10-04 09:00:40 +0200
committerSimon Glass <sjg@chromium.org>2018-11-14 09:16:27 -0800
commit82744c20e6eaf45311b5dc92820c329de4a7219b (patch)
treee49f76979860962f2cacf6c3d04a074f3280cd5c
parent73fe41117d2c2838376802a5f15d6435c1dec8da (diff)
test: regmap: Increase size of syscon0 memory
The upcoming changes to the regmap interface will contain a proper check for plausibility when reading/writing from/to a register map. To still have the current tests pass, increase the size of the memory region for the syscon0 device, since one of the tests reads and writes beyond this range. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
-rw-r--r--arch/sandbox/dts/test.dts2
-rw-r--r--test/dm/regmap.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index ffc93d05ba1..71d1b390225 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -529,7 +529,7 @@
syscon@0 {
compatible = "sandbox,syscon0";
- reg = <0x10 4>;
+ reg = <0x10 16>;
};
syscon@1 {
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index d4b86b3b03c..b28d6a6cd11 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -25,7 +25,7 @@ static int dm_test_regmap_base(struct unit_test_state *uts)
ut_assertok_ptr(map);
ut_asserteq(1, map->range_count);
ut_asserteq(0x10, map->ranges[0].start);
- ut_asserteq(4, map->ranges[0].size);
+ ut_asserteq(16, map->ranges[0].size);
ut_asserteq(0x10, map_to_sysmem(regmap_get_range(map, 0)));
ut_assertok(uclass_get_device(UCLASS_SYSCON, 1, &dev));