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authorPeng Fan <peng.fan@nxp.com>2022-06-11 20:20:58 +0800
committerStefano Babic <sbabic@denx.de>2022-06-14 21:33:13 +0200
commit64d118b27f96aed81c2922e20d2b5db9e32a465f (patch)
tree092f801ad6254d7ce0a0a5f5c9b29dcfe207bfb6
parent4ebb9a589852841c65ae68e2f3f3d160df40d55e (diff)
imx: imx8m[m/p]_phycore: Enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
-rw-r--r--board/phytec/phycore_imx8mm/spl.c12
-rw-r--r--board/phytec/phycore_imx8mp/spl.c8
-rw-r--r--configs/phycore-imx8mm_defconfig1
-rw-r--r--configs/phycore-imx8mp_defconfig1
-rw-r--r--include/configs/phycore_imx8mm.h3
-rw-r--r--include/configs/phycore_imx8mp.h3
6 files changed, 4 insertions, 24 deletions
diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c
index d54145ef99..7f24a3affc 100644
--- a/board/phytec/phycore_imx8mm/spl.c
+++ b/board/phytec/phycore_imx8mm/spl.c
@@ -57,14 +57,8 @@ int board_fit_config_name_match(const char *name)
return 0;
}
-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE)
-static iomux_v3_cfg_t const uart_pads[] = {
- IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static iomux_v3_cfg_t const wdog_pads[] = {
IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
@@ -77,8 +71,6 @@ int board_early_init_f(void)
set_wdog_reset(wdog);
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
return 0;
}
@@ -92,8 +84,6 @@ void board_init_f(ulong dummy)
board_early_init_f();
- preloader_console_init();
-
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
@@ -103,6 +93,8 @@ void board_init_f(ulong dummy)
hang();
}
+ preloader_console_init();
+
enable_tzc380();
/* DDR initialization */
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index 19c486e551..38a581bef5 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -89,14 +89,8 @@ int board_fit_config_name_match(const char *name)
return 0;
}
-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-static iomux_v3_cfg_t const uart_pads[] = {
- MX8MP_PAD_UART1_RXD__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX8MP_PAD_UART1_TXD__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static iomux_v3_cfg_t const wdog_pads[] = {
MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
@@ -109,8 +103,6 @@ int board_early_init_f(void)
set_wdog_reset(wdog);
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
return 0;
}
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index b8cda9f64f..0316d45cae 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -120,6 +120,7 @@ CONFIG_PINCTRL_IMX8M=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index d10ab2a22c..2c53a5ff8c 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -111,6 +111,7 @@ CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_POWER_I2C=y
+CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index 1d01104cfe..a14a076172 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -72,7 +72,4 @@
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
-/* UART */
-#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
-
#endif /* __PHYCORE_IMX8MM_H */
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 75ddcf465f..9c7331a416 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -72,7 +72,4 @@
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000
-/* UART */
-#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
-
#endif /* __PHYCORE_IMX8MP_H */