diff options
| author | Bryan Brattlof <bb@ti.com> | 2024-02-21 14:07:05 -0600 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-03-21 14:26:33 +0000 |
| commit | 56a5758bc564650c8a5e0dabeb9677e96d30f625 (patch) | |
| tree | 7c5bc0f803327cc00f960366ef826e2f2f89bc0e | |
| parent | 0737aa808c22590f9cd78797aa83b974c6f8e071 (diff) | |
board: ti: common: remove debounce config from rtc
commit d36ad81d25a99 ("board: ti: common: add rtc setup to common folder")
I had mistakenly copied over the gpio debounce configuration into the
external 32k rtc crystal setup. Unfortunately this causing issues with
the DSP on the AM62Ax SoC family.
Because we have no need to configure debounce on our SK boards, let's
just rip this out for now.
Signed-off-by: Bryan Brattlof <bb@ti.com>
| -rw-r--r-- | board/ti/common/rtc.c | 16 | ||||
| -rw-r--r-- | board/ti/common/rtc.h | 8 |
2 files changed, 0 insertions, 24 deletions
diff --git a/board/ti/common/rtc.c b/board/ti/common/rtc.c index 65c1f75c89..44e0d989a3 100644 --- a/board/ti/common/rtc.c +++ b/board/ti/common/rtc.c @@ -23,20 +23,4 @@ void board_rtc_init(void) /* Make sure to mux up to take the SoC 32k from the crystal */ writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL, MCU_CTRL_DEVICE_CLKOUT_32K_CTRL); - - /* Setup debounce conf registers - arbitrary values. - * Times are approx - */ - /* 1.9ms debounce @ 32k */ - writel(WKUP_CTRLMMR_DBOUNCE_CFG1, 0x1); - /* 5ms debounce @ 32k */ - writel(WKUP_CTRLMMR_DBOUNCE_CFG2, 0x5); - /* 20ms debounce @ 32k */ - writel(WKUP_CTRLMMR_DBOUNCE_CFG3, 0x14); - /* 46ms debounce @ 32k */ - writel(WKUP_CTRLMMR_DBOUNCE_CFG4, 0x18); - /* 100ms debounce @ 32k */ - writel(WKUP_CTRLMMR_DBOUNCE_CFG5, 0x1c); - /* 156ms debounce @ 32k */ - writel(WKUP_CTRLMMR_DBOUNCE_CFG6, 0x1f); } diff --git a/board/ti/common/rtc.h b/board/ti/common/rtc.h index 57737829b6..fce45c4217 100644 --- a/board/ti/common/rtc.h +++ b/board/ti/common/rtc.h @@ -8,14 +8,6 @@ #ifndef __RTC_H #define __RTC_H -/* Debounce configuration register*/ -#define WKUP_CTRLMMR_DBOUNCE_CFG1 0x04504084 -#define WKUP_CTRLMMR_DBOUNCE_CFG2 0x04504088 -#define WKUP_CTRLMMR_DBOUNCE_CFG3 0x0450408c -#define WKUP_CTRLMMR_DBOUNCE_CFG4 0x04504090 -#define WKUP_CTRLMMR_DBOUNCE_CFG5 0x04504094 -#define WKUP_CTRLMMR_DBOUNCE_CFG6 0x04504098 - /** * board_rtc_init() - Enable the external 32k crystal and configure debounce * registers. |