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authorRick Chen <rick@andestech.com>2018-03-29 10:08:33 +0800
committerAndes <uboot@andestech.com>2018-03-30 13:13:56 +0800
commitd58717e42559189a226ea800173147399c8edef9 (patch)
treea94bffe91400f0486571454a3db56733899c4c7e
parent2bc5bea9e160c7efe5a268a55b440ac8cf848b48 (diff)
riscv: ae250: Support DT provided by the board at runtime
Enable CONFIG_OF_BOAD to support delivery dtb to u-boot at run time instead of embedded. There are two methods to delivery dtb. 1 Pass from loader: When u-boot boot from RAM, gdb or loader can pass dtb via a2 to u-boot dynamically. Of course gdb or loader shall be in charge of dtb delivery. 2 Configure CONFIG_SYS_FDT_BASE: It can be configured as RAM or ROM base statically, no mater u-boot boot from RAM or ROM. If it was configured as ROM base, dtb can be burned into ROM(spi flash) by spi driver. Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is useless in nx25-ae250 configuration. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
-rw-r--r--arch/riscv/cpu/nx25/start.S2
-rw-r--r--board/AndesTech/nx25-ae250/nx25-ae250.c9
-rw-r--r--configs/nx25-ae250_defconfig1
-rw-r--r--include/configs/nx25-ae250.h12
4 files changed, 15 insertions, 9 deletions
diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/nx25/start.S
index 6a076639d3..cd0a66360d 100644
--- a/arch/riscv/cpu/nx25/start.S
+++ b/arch/riscv/cpu/nx25/start.S
@@ -45,6 +45,8 @@ trap_vector:
.global trap_entry
handle_reset:
+ li t0, CONFIG_SYS_SDRAM_BASE
+ SREG a2, 0(t0)
la t0, trap_entry
csrw mtvec, t0
csrwi mstatus, 0
diff --git a/board/AndesTech/nx25-ae250/nx25-ae250.c b/board/AndesTech/nx25-ae250/nx25-ae250.c
index a965218f34..6e31be3505 100644
--- a/board/AndesTech/nx25-ae250/nx25-ae250.c
+++ b/board/AndesTech/nx25-ae250/nx25-ae250.c
@@ -64,3 +64,12 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
{
return 0;
}
+
+void *board_fdt_blob_setup(void)
+{
+ void **ptr = (void *)CONFIG_SYS_SDRAM_BASE;
+ if (fdt_magic(*ptr) == FDT_MAGIC)
+ return (void *)*ptr;
+
+ return (void *)CONFIG_SYS_FDT_BASE;
+}
diff --git a/configs/nx25-ae250_defconfig b/configs/nx25-ae250_defconfig
index eb41d71357..4f9bd58f75 100644
--- a/configs/nx25-ae250_defconfig
+++ b/configs/nx25-ae250_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
+CONFIG_OF_BOARD=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
diff --git a/include/configs/nx25-ae250.h b/include/configs/nx25-ae250.h
index 3c888fdd50..0e4c431cab 100644
--- a/include/configs/nx25-ae250.h
+++ b/include/configs/nx25-ae250.h
@@ -11,18 +11,9 @@
/*
* CPU and Board Configuration Options
*/
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_SERVERIP
-#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-#ifdef CONFIG_OF_CONTROL
-#undef CONFIG_OF_SEPARATE
-#define CONFIG_OF_EMBED
-#endif
-#endif
-
/*
* Miscellaneous configurable options
*/
@@ -50,6 +41,9 @@
*/
#define CONFIG_SYS_MALLOC_LEN (512 << 10)
+/* DT blob (fdt) address */
+#define CONFIG_SYS_FDT_BASE 0x000f0000
+
/*
* Physical Memory Map
*/