diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2023-05-04 18:11:19 +0200 |
---|---|---|
committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2023-05-08 14:59:10 +0200 |
commit | 82cdc8ade02ef48329c8143cc2489e90c9390686 (patch) | |
tree | 0bce5955b33136ab52f5759b95e4bfb00d57b7af | |
parent | 2054c94e3a2feefd827a9612e2ea493b77b4c85b (diff) |
arm64: dts: k3-am625-verdin-wifi-dev-u-boot: ethernet support
Integrate Ethernet support.
Note: Due to U-Boot not support pinctrls in the cpsw3g_midio node they
were all added to the cpsw3g node. And due to U-Boot currently not
supporting Ethernet PHY reset-gpios we just GPIO hog it.
Upstream-Status: Pending
Initial U-Boot to be used for bring-up and validation of the V1.0
design, we'll decide on the step forward to mainline this once the
bring-up and validation will be done.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r-- | arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi | 64 |
1 files changed, 63 insertions, 1 deletions
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi index 04b65ecc06..87de81d770 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi @@ -45,6 +45,12 @@ }; &cpsw3g { + /* U-Boot does not support pinctrls in the cpsw3g_midio node so we just add them all here */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth_clock + &pinctrl_mdio + &pinctrl_rgmii1 + &pinctrl_rgmii2>; reg = <0x0 0x8000000 0x0 0x200000>, <0x0 0x43000200 0x0 0x8>; reg-names = "cpsw_nuss", "mac_efuse"; @@ -59,6 +65,13 @@ }; &cpsw3g_phy0 { + /* U-Boot currently does not support reset-gpios so we just hog it */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth_int>; + u-boot,dm-spl; +}; + +&cpsw3g_phy1 { u-boot,dm-spl; }; @@ -67,7 +80,7 @@ }; &cpsw_port2 { - status = "disabled"; + u-boot,dm-spl; }; &dmsc { @@ -83,6 +96,10 @@ u-boot,dm-spl; }; +&fss { + u-boot,dm-spl; +}; + &k3_clks { u-boot,dm-spl; }; @@ -101,6 +118,15 @@ &main_gpio0 { u-boot,dm-spl; + + reset-ethphy { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; + line-name = "reset_ethphy"; + output-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth_reset>; + }; }; /* On-module I2C - PMIC_I2C */ @@ -141,6 +167,34 @@ u-boot,dm-spl; }; +&mcu_pmx0 { + u-boot,dm-spl; +}; + +&pinctrl_eth_clock { + u-boot,dm-spl; +}; + +&pinctrl_eth_int { + u-boot,dm-spl; +}; + +&pinctrl_eth_reset { + u-boot,dm-spl; +}; + +&pinctrl_eth2_rgmii_int { + u-boot,dm-spl; +}; + +&pinctrl_i2c0 { + u-boot,dm-spl; +}; + +&pinctrl_i2c1 { + u-boot,dm-spl; +}; + &pinctrl_mdio { u-boot,dm-spl; }; @@ -149,6 +203,10 @@ u-boot,dm-spl; }; +&pinctrl_rgmii2 { + u-boot,dm-spl; +}; + &pinctrl_sdhci1 { u-boot,dm-spl; }; @@ -191,3 +249,7 @@ &wkup_conf { u-boot,dm-spl; }; + +&wkup_uart0 { + u-boot,dm-spl; +}; |