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| author | Beniamino Galvani <b.galvani@gmail.com> | 2017-10-29 10:09:01 +0100 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2017-11-20 10:11:44 +0100 |
| commit | 456efb512728a4cd6fe66871932c5384bec9b7c1 (patch) | |
| tree | e41e6d897a9a269a3c528a9e126ae3365622c13d | |
| parent | f8d9ca18333c42040135c6605ee27668da1738af (diff) | |
odroid-c2: enable I2C
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
| -rw-r--r-- | arch/arm/include/asm/arch-meson/gxbb.h | 1 | ||||
| -rw-r--r-- | board/amlogic/odroid-c2/odroid-c2.c | 1 | ||||
| -rw-r--r-- | configs/odroid-c2_defconfig | 3 |
3 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h index 74d52903406..95a6fe6998e 100644 --- a/arch/arm/include/asm/arch-meson/gxbb.h +++ b/arch/arm/include/asm/arch-meson/gxbb.h @@ -47,6 +47,7 @@ #define GXBB_GCLK_MPEG_OTHER GXBB_HIU_ADDR(0x53) #define GXBB_GCLK_MPEG_AO GXBB_HIU_ADDR(0x54) +#define GXBB_GCLK_MPEG_0_I2C BIT(9) #define GXBB_GCLK_MPEG_1_ETH BIT(3) #endif /* __GXBB_H__ */ diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c index eac04d8178d..a5ea8dc5af2 100644 --- a/board/amlogic/odroid-c2/odroid-c2.c +++ b/board/amlogic/odroid-c2/odroid-c2.c @@ -35,6 +35,7 @@ int misc_init_r(void) GXBB_ETH_REG_0_CLK_EN); /* Enable power and clock gate */ + setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C); setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH); clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK); diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index f7f80166440..1afd2fc1113 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -11,12 +11,15 @@ CONFIG_DEBUG_UART=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y CONFIG_DM_ETH=y |