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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-27 23:47:03 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-29 17:24:30 +0900
commitefaa22e42686ce24fe0304d2e5f2cbb91c5558e9 (patch)
treec439314c27917505025b8cff69e8fc37a04712c2
parentb8909976ed384c26a3bc3bbdb9a39feb8a73d396 (diff)
ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h
This PHY might be used for other SoCs in the future. Avoid including the SoC name in the header name. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r--arch/arm/mach-uniphier/dram/ddruqphy-regs.h (renamed from arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h)6
-rw-r--r--arch/arm/mach-uniphier/dram/umc-ld20.c2
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h b/arch/arm/mach-uniphier/dram/ddruqphy-regs.h
index 268ba7f47e..e496af5ba8 100644
--- a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
+++ b/arch/arm/mach-uniphier/dram/ddruqphy-regs.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _DDRPHY_LD20_REGS_H
-#define _DDRPHY_LD20_REGS_H
+#ifndef _DDRUQPHY_REGS_H
+#define _DDRUQPHY_REGS_H
#include <linux/bitops.h>
@@ -76,4 +76,4 @@
#define PHY_VREF_TRAINING (0x72 << (PHY_REG_SHIFT))
#define PHY_SCL_GATE_TIMING (0x78 << (PHY_REG_SHIFT))
-#endif /* _DDRPHY_LD20_REGS_H */
+#endif /* _DDRUQPHY_REGS_H */
diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c
index ea933fec5a..b8c0f59e17 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld20.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld20.c
@@ -14,7 +14,7 @@
#include <asm/processor.h>
#include "../init.h"
-#include "ddrphy-ld20-regs.h"
+#include "ddruqphy-regs.h"
#include "umc64-regs.h"
#define DRAM_CH_NR 3