MLK-19960-1 imx8mm: Add support for variant parts

iMX8MM family has several variant parts below.
Add CPU type and relevant updates

i.MX 8M Mini Quad		Full featured, 4x A53
i.MX 8M Mini QuadLite		No VPU, 4x A53
i.MX 8M Mini Dual		Full featured, 2x A53
i.MX 8M Mini DualLite		No VPU, 2x A53
i.MX 8M Mini Solo		Full featured, 1x A53
i.MX 8M Mini SoloLite		No VPU, 1x A53

Signed-off-by: Ye Li <ye.li@nxp.com>

4 files changed, 50 insertions, 9 deletions

diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index a792d1197b..430e8dde46 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -31,6 +31,11 @@
 #define MXC_CPU_IMX8MD		0x83 /* dummy ID */
 #define MXC_CPU_IMX8MQL     0x84 /* dummy ID */
 #define MXC_CPU_IMX8MM		0x85 /* dummy ID */
+#define MXC_CPU_IMX8MML		0x86 /* dummy ID */
+#define MXC_CPU_IMX8MMD		0x87 /* dummy ID */
+#define MXC_CPU_IMX8MMDL	0x88 /* dummy ID */
+#define MXC_CPU_IMX8MMS		0x89 /* dummy ID */
+#define MXC_CPU_IMX8MMSL	0x8a /* dummy ID */
 #define MXC_CPU_IMX8QM		0x91 /* dummy ID */
 #define MXC_CPU_IMX8QXP		0x92 /* dummy ID */
 #define MXC_CPU_IMX8DX		0x93 /* dummy ID */
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 0c7908b8c7..e2ae595eeb 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -47,7 +47,14 @@
 #define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ) || is_cpu_type(MXC_CPU_IMX8MD) || is_cpu_type(MXC_CPU_IMX8MQL))
 #define is_imx8md() (is_cpu_type(MXC_CPU_IMX8MD))
 #define is_imx8mql() (is_cpu_type(MXC_CPU_IMX8MQL))
-#define is_imx8mm() (is_cpu_type(MXC_CPU_IMX8MM))
+#define is_imx8mm() (is_cpu_type(MXC_CPU_IMX8MM) || is_cpu_type(MXC_CPU_IMX8MML) ||\
+	is_cpu_type(MXC_CPU_IMX8MMD) || is_cpu_type(MXC_CPU_IMX8MMDL) || \
+	is_cpu_type(MXC_CPU_IMX8MMS) || is_cpu_type(MXC_CPU_IMX8MMSL))
+#define is_imx8mml() (is_cpu_type(MXC_CPU_IMX8MML))
+#define is_imx8mmd() (is_cpu_type(MXC_CPU_IMX8MMD))
+#define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL))
+#define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS))
+#define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL))
 #define is_imx8qm() (is_cpu_type(MXC_CPU_IMX8QM))
 #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
 #define is_imx8dx() (is_cpu_type(MXC_CPU_IMX8DX))
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index d5f51bf1b9..808a502b67 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -168,7 +168,17 @@ const char *get_imx_type(u32 imxtype)
 {
 	switch (imxtype) {
 	case MXC_CPU_IMX8MM:
-		return "8MM";	/* Quad-core version of the imx8mm */
+		return "8MMQ";	/* Quad-core version of the imx8mm */
+	case MXC_CPU_IMX8MML:
+		return "8MMQL";	/* Quad-core Lite version of the imx8mm */
+	case MXC_CPU_IMX8MMD:
+		return "8MMD";	/* Dual-core version of the imx8mm */
+	case MXC_CPU_IMX8MMDL:
+		return "8MMDL";	/* Dual-core Lite version of the imx8mm */
+	case MXC_CPU_IMX8MMS:
+		return "8MMS";	/* Single-core version of the imx8mm */
+	case MXC_CPU_IMX8MMSL:
+		return "8MMSL";	/* Single-core Lite version of the imx8mm */
 	case MXC_CPU_IMX8MQ:
 		return "8MQ";	/* Quad-core version of the imx8mq */
 	case MXC_CPU_IMX8MQL:
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index b4a399261d..0cfc0c3f09 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -146,18 +146,36 @@ struct mm_region *mem_map = imx8m_mem_map;
 
 static u32 get_cpu_variant_type(u32 type)
 {
-	if (type == MXC_CPU_IMX8MQ) {
-		struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
-		struct fuse_bank *bank = &ocotp->bank[1];
-		struct fuse_bank1_regs *fuse =
-			(struct fuse_bank1_regs *)bank->fuse_regs;
+	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+	struct fuse_bank *bank = &ocotp->bank[1];
+	struct fuse_bank1_regs *fuse =
+		(struct fuse_bank1_regs *)bank->fuse_regs;
 
-		u32 value = readl(&fuse->tester4);
+	u32 value = readl(&fuse->tester4);
 
+	if (type == MXC_CPU_IMX8MQ) {
 		if ((value & 0x3) == 0x2)
 			return MXC_CPU_IMX8MD;
 		else if (value & 0x200000)
 			return MXC_CPU_IMX8MQL;
+
+	} else if (type == MXC_CPU_IMX8MM) {
+		switch (value & 0x3) {
+		case 2:
+			if (value & 0x1c0000)
+				return MXC_CPU_IMX8MMDL;
+			else
+				return MXC_CPU_IMX8MMD;
+		case 3:
+			if (value & 0x1c0000)
+				return MXC_CPU_IMX8MMSL;
+			else
+				return MXC_CPU_IMX8MMS;
+		default:
+			if (value & 0x1c0000)
+				return MXC_CPU_IMX8MML;
+			break;
+		}
 	}
 
 	return type;
@@ -175,7 +193,8 @@ u32 get_cpu_rev(void)
 
 	/* iMX8MM */
 	 if (major_low == 0x41) {
-		return (MXC_CPU_IMX8MM << 12) | reg;
+		type = get_cpu_variant_type(MXC_CPU_IMX8MM);
+		return (type << 12) | reg;
 	} else {
 		/* iMX8MQ */
 		if (reg == CHIP_REV_1_0) {