diff options
| author | Peng Fan <peng.fan@nxp.com> | 2022-04-14 17:37:28 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2022-04-27 11:42:04 +0800 |
| commit | f1421596cd4a2303c43c606feda1730ae1504ff7 (patch) | |
| tree | dc014f8fb6ab19d87b139aaab570046c9a5636c3 | |
| parent | 3d54c8081b73acfc9253510227973cbcd3384655 (diff) | |
LFU-296 imx: imx8mq: fix tzasc swap id
i.MX8MQ also needs GPR_TZASC_ID_SWAP_BYPASS set to avoid secure DRAM
data leakage, since all i.MX8M has this bit, so we drop the condition
check. Also lock the bit.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 877967eb2d..7118a07e58 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -75,15 +75,13 @@ void enable_tzc380(void) * According to TRM, TZASC_ID_SWAP_BYPASS should be set in * order to avoid AXI Bus errors when GPU is in use */ - if (is_imx8mm() || is_imx8mn() || is_imx8mp()) - setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS); + setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS); /* - * imx8mn and imx8mp implements the lock bit for + * imx8m implements the lock bit for * TZASC_ID_SWAP_BYPASS, enable it to lock settings */ - if (is_imx8mn() || is_imx8mp()) - setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK); + setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK); /* * set Region 0 attribute to allow secure and non-secure |