MLK-25346: Add support for cockpit on i.MX8QM MEK board

This allows the u-boot to be built separately for different
clusters (A53 or A72) on i.MX8QM.

Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
Signed-off-by: Fabrice Goucem <fabrice.goucem@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
(cherry picked from commit edb54f88b014bdd0379370678d54de60e3962b38)
(cherry picked from commit e8ec7faa4cb53461da3c397ee3d95fc4a82a5d21)
(cherry picked from commit f0f26c2b9a13467879e31aadca9d9cd596d50dab)
(cherry picked from commit 8c7819c39f870648a40bce6dcda44c6065b508f0)

8 files changed, 144 insertions, 12 deletions

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fbb14f339c..dcba180698 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -933,6 +933,8 @@ dtb-$(CONFIG_ARCH_IMX8) += \
 	fsl-imx8qm-mek.dtb \
 	fsl-imx8qm-ddr4-val.dtb \
 	fsl-imx8qm-lpddr4-val.dtb \
+	fsl-imx8qm-mek-cockpit-a53.dtb \
+	fsl-imx8qm-mek-cockpit-a72.dtb \
 	imx8qm-cgtqmx8.dtb \
 	imx8qm-rom7720-a1.dtb \
 	fsl-imx8qxp-ai_ml.dtb \
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index 220fb68c65..47b8e3042b 100644
--- a/arch/arm/mach-imx/imx8/Kconfig
+++ b/arch/arm/mach-imx/imx8/Kconfig
@@ -113,6 +113,16 @@ config TARGET_IMX8QXP_MEK
 	select ARCH_MISC_INIT
 	select SPL_CRYPTO if SPL
 
+config TARGET_IMX8QM_MEK_A53_ONLY
+        bool "Support i.MX8QM MEK board, cluster A53 only"
+        select BOARD_LATE_INIT
+        select IMX8QM
+
+config TARGET_IMX8QM_MEK_A72_ONLY
+        bool "Support i.MX8QM MEK board, cluster A72 only"
+        select BOARD_LATE_INIT
+        select IMX8QM
+
 config TARGET_IMX8QXP_LPDDR4_VAL
 	bool "Support i.MX8QXP lpddr4 validation board"
 	select BOARD_LATE_INIT
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 7a55e00967..1a522830ad 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -85,12 +85,14 @@ int arch_cpu_init_dm(void)
 		}
 	}
 
+#if !defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY) && !defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
 	if (is_imx8qm()) {
 		ret = sc_pm_set_resource_power_mode(-1, SC_R_SMMU,
 						    SC_PM_PW_MODE_ON);
 		if (ret)
 			return ret;
 	}
+#endif
 
 	power_off_all_usb();
 
@@ -336,6 +338,11 @@ enum boot_device get_boot_device(void)
 
 	sc_rsrc_t dev_rsrc;
 
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
+	return MMC1_BOOT;
+#elif defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
+	return SD2_BOOT;
+#endif
 	sc_misc_get_boot_dev(-1, &dev_rsrc);
 
 	switch (dev_rsrc) {
@@ -415,7 +422,11 @@ int mmc_get_env_dev(void)
 	sc_rsrc_t dev_rsrc;
 	int devno;
 
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
+	dev_rsrc = SC_R_SDHC_0;
+#else
 	sc_misc_get_boot_dev(-1, &dev_rsrc);
+#endif
 
 	switch (dev_rsrc) {
 	case SC_R_SDHC_0:
diff --git a/board/freescale/imx8qm_mek/Kconfig b/board/freescale/imx8qm_mek/Kconfig
index aed6ab25ce..6dfdc3bd09 100644
--- a/board/freescale/imx8qm_mek/Kconfig
+++ b/board/freescale/imx8qm_mek/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_IMX8QM_MEK
+if TARGET_IMX8QM_MEK || TARGET_IMX8QM_MEK_A53_ONLY || TARGET_IMX8QM_MEK_A72_ONLY
 
 config SYS_BOARD
 	default "imx8qm_mek"
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c
index 8e65867104..848c758121 100644
--- a/board/freescale/imx8qm_mek/imx8qm_mek.c
+++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
@@ -38,14 +38,25 @@ DECLARE_GLOBAL_DATA_PTR;
 #define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
 						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
+static iomux_cfg_t uart2_pads[] = {
+	SC_P_UART0_RTS_B | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
+	SC_P_UART0_CTS_B | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+#else
 static iomux_cfg_t uart0_pads[] = {
 	SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
 	SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
+#endif
 
 static void setup_iomux_uart(void)
 {
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
+	imx8_iomux_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
+#else
 	imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
+#endif
 }
 
 int board_early_init_f(void)
@@ -59,10 +70,17 @@ int board_early_init_f(void)
 		return 0;
 	}
 
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
+	/* Set UART2 clock root to 80 MHz */
+	ret = sc_pm_setup_uart(SC_R_UART_2, rate);
+	if (ret)
+		return ret;
+#else
 	/* Set UART0 clock root to 80 MHz */
 	ret = sc_pm_setup_uart(SC_R_UART_0, rate);
 	if (ret)
 		return ret;
+#endif	/* CONFIG_TARGET_IMX8QM_MEK_A72_ONLY */
 
 	setup_iomux_uart();
 
@@ -169,6 +187,7 @@ int board_phy_config(struct phy_device *phydev)
 
 static void board_gpio_init(void)
 {
+#if defined(CONFIG_TARGET_IMX8QM_MEK) || defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
 	int ret;
 	struct gpio_desc desc;
 
@@ -243,6 +262,7 @@ static void board_gpio_init(void)
 	}
 
 	dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+#endif
 
 }
 int checkboard(void)
@@ -385,7 +405,13 @@ int board_init(void)
 void board_quiesce_devices(void)
 {
 	const char *power_on_devices[] = {
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
+		"dma_lpuart2",
+		"PD_UART2_TX",
+		"PD_UART2_RX",
+#else
 		"dma_lpuart0",
+#endif
 	};
 
 	if (IS_ENABLED(CONFIG_XEN)) {
@@ -415,7 +441,9 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 int board_late_init(void)
 {
 	char *fdt_file;
+#if !defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY) && !defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
 	bool m4_booted;
+#endif
 
 	build_info();
 
@@ -430,13 +458,19 @@ int board_late_init(void)
 #endif
 
 	fdt_file = env_get("fdt_file");
-	m4_booted = m4_parts_booted();
 
 	if (fdt_file && !strcmp(fdt_file, "undefined")) {
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
+		env_set("fdt_file", "imx8qm-mek-cockpit-ca53.dtb");
+#elif defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
+		env_set("fdt_file", "imx8qm-mek-cockpit-ca72.dtb");
+#else
+		m4_booted = m4_parts_booted();
 		if (m4_booted)
 			env_set("fdt_file", "imx8qm-mek-rpmsg.dtb");
 		else
 			env_set("fdt_file", "imx8qm-mek.dtb");
+#endif
 	}
 
 #ifdef CONFIG_ENV_IS_IN_MMC
diff --git a/drivers/power/domain/imx8-power-domain-legacy.c b/drivers/power/domain/imx8-power-domain-legacy.c
index e2fae2dbc8..a79a116687 100644
--- a/drivers/power/domain/imx8-power-domain-legacy.c
+++ b/drivers/power/domain/imx8-power-domain-legacy.c
@@ -128,8 +128,13 @@ static int imx8_power_domain_on(struct power_domain *power_domain)
 		return 0;
 
 	if (pdata->resource_id != SC_R_NONE) {
-		if (!sc_rm_is_resource_owned(-1, pdata->resource_id))
+		if (!sc_rm_is_resource_owned(-1, pdata->resource_id)) {
 			printf("%s [%d] not owned by curr partition\n", dev->name, pdata->resource_id);
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY) || defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
+			/* avoid failing probe, else some group of resources (gpios) may never work */
+			return 0;
+#endif
+		}
 
 		ret = sc_pm_set_resource_power_mode(-1, pdata->resource_id,
 						    SC_PM_PW_MODE_ON);
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index b13c2574be..69c12c3804 100644
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -27,9 +27,14 @@
 #define CONFIG_SPL_STACK		0x013fff0
 #define CONFIG_SPL_BSS_START_ADDR      0x00130000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x1000	/* 4 KB */
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
+#define CONFIG_SERIAL_LPUART_BASE	0x5a080000	/* use UART2 */
+#define CONFIG_SYS_SPL_MALLOC_START	0xC2200000
+#else
+#define CONFIG_SERIAL_LPUART_BASE	0x5a060000
 #define CONFIG_SYS_SPL_MALLOC_START	0x82200000
+#endif
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x80000	/* 512 KB */
-#define CONFIG_SERIAL_LPUART_BASE	0x5a060000
 #define CONFIG_MALLOC_F_ADDR		0x00138000
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
@@ -37,15 +42,23 @@
 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A53_ONLY
+#define IMX_HDMI_FIRMWARE_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_64M)
+#define IMX_HDMITX_FIRMWARE_SIZE 0x20000
+#define IMX_HDMIRX_FIRMWARE_SIZE 0x20000
+#endif
+
 #define CONFIG_CMD_READ
 
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define USDHC1_BASE_ADDR                0x5B010000
 #define USDHC2_BASE_ADDR                0x5B020000
 
+#ifndef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
 #define CONFIG_PCIE_IMX
 #define CONFIG_CMD_PCI
 #define CONFIG_PCI_SCAN_SHOW
+#endif
 
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define FEC_QUIRK_ENET_MAC
@@ -131,9 +144,18 @@
 #define MFG_NAND_PARTITION ""
 #endif
 
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
+#define HDP_LOAD_ENV
+#define INITRD_ADDR_ENV "initrd_addr=0xC3100000\0"
+#else
+#define HDP_LOAD_ENV \
+	"if run loadhdp; then; hdp load ${hdp_addr}; fi;"
+#define INITRD_ADDR_ENV "initrd_addr=0x83100000\0"
+#endif
+
 #define CONFIG_MFG_ENV_SETTINGS \
 	CONFIG_MFG_ENV_SETTINGS_DEFAULT \
-	"initrd_addr=0x83100000\0" \
+	INITRD_ADDR_ENV \
 	"initrd_high=0xffffffffffffffff\0" \
 	"emmc_dev=0\0" \
 	"sd_dev=1\0"
@@ -147,14 +169,14 @@
 	AHAB_ENV \
 	"script=boot.scr\0" \
 	"image=Image\0" \
-	"splashimage=0x9e000000\0" \
-	"console=ttyLP0\0" \
-	"fdt_addr=0x83000000\0"			\
+	SPLASH_IMAGE_ADDR \
+	CONFIG_CONSOLE \
+	FDT_ADDR \
 	"fdt_high=0xffffffffffffffff\0"		\
 	"cntr_addr=0x98000000\0"			\
 	"cntr_file=os_cntr_signed.bin\0" \
 	"boot_fdt=try\0" \
-	"fdt_file=undefined\0" \
+	FDT_FILE \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
 	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
@@ -176,7 +198,7 @@
 	"loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}\0" \
 	"auth_os=auth_cntr ${cntr_addr}\0" \
 	"mmcboot=echo Booting from mmc ...; " \
-		"if run loadhdp; then; hdp load ${hdp_addr}; fi;" \
+		HDP_LOAD_ENV \
 		"run mmcargs; " \
 		"if test ${sec_boot} = yes; then " \
 			"if run auth_os; then " \
@@ -228,18 +250,64 @@
 		"fi;\0"
 
 /* Link Definitions */
+#ifdef CONFIG_TARGET_IMX8QM_MEK_A72_ONLY
+	#define CONFIG_SYS_INIT_SP_ADDR		0xC0200000
+#else
+	#define CONFIG_SYS_INIT_SP_ADDR		0x80200000
+#endif
 
-#define CONFIG_SYS_INIT_SP_ADDR         0x80200000
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
+	#define FDT_ADDR	"fdt_addr=0xC3000000\0"
+	#define FDT_FILE	"fdt_file=imx8qm-mek-cockpit-a72.dtb\0"
+#elif defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
+	#define FDT_ADDR	"fdt_addr=0x83000000\0"
+	#define FDT_FILE	"fdt_file=imx8qm-mek-cockpit-a53.dtb\0"
+#else
+	#define FDT_ADDR	"fdt_addr=0x83000000\0"
+	#define FDT_FILE	"fdt_file=undefined\0"
+#endif
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
+	#define CONFIG_SYS_MMC_ENV_DEV		0  /* USDHC1 */
+	#define CONFIG_MMCROOT			"/dev/mmcblk0p2"  /* USDHC1 */
+#elif defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
+	#define CONFIG_SYS_MMC_ENV_DEV		1  /* USDHC2 */
+	#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
+#else
+	#define CONFIG_SYS_MMC_ENV_DEV		1  /* USDHC2 */
+	#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
+#endif
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
+#define CONFIG_CONSOLE "console=ttyLP2\0"
+#define SPLASH_IMAGE_ADDR	"splashimage=0xde000000\0"
+#else
+#define CONFIG_CONSOLE "console=ttyLP0\0"
+#define SPLASH_IMAGE_ADDR	"splashimage=0x9e000000\0"
+#endif
+
+#define CONFIG_NR_DRAM_BANKS		4
+#if defined(CONFIG_TARGET_IMX8QM_MEK_A53_ONLY)
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define PHYS_SDRAM_1			0x80000000
+#define PHYS_SDRAM_2			0x880000000
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1 GB */
+#define PHYS_SDRAM_2_SIZE		0x80000000	/* 2 GB */
+#elif defined(CONFIG_TARGET_IMX8QM_MEK_A72_ONLY)
+#define CONFIG_SYS_SDRAM_BASE		0xC0000000
+#define PHYS_SDRAM_1			0xC0000000
+#define PHYS_SDRAM_2			0x900000000
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1 GB */
+#define PHYS_SDRAM_2_SIZE		0x80000000	/* 2 GB */
+#else
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define PHYS_SDRAM_1			0x80000000
 #define PHYS_SDRAM_2			0x880000000
 #define PHYS_SDRAM_1_SIZE		0x80000000	/* 2 GB */
 #define PHYS_SDRAM_2_SIZE		0x100000000	/* 4 GB */
+#endif
 
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY		8000000	/* 8MHz */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b98577f3e7..f4b91462e8 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -91,6 +91,7 @@ CONFIG_CM_REMAP
 CONFIG_CM_SPD_DETECT
 CONFIG_CM_TCRAM
 CONFIG_COMMON_BOOT
+CONFIG_CONSOLE
 CONFIG_CONS_ON_SCC
 CONFIG_CONS_SCIF0
 CONFIG_CONS_SCIF1
@@ -140,6 +141,7 @@ CONFIG_DW_WDT_CLOCK_KHZ
 CONFIG_E1000_NO_NVM
 CONFIG_E300
 CONFIG_E5500
+CONFIG_EARLYCON
 CONFIG_EFLASH_PROTSECTORS
 CONFIG_EHCI_DESC_BIG_ENDIAN
 CONFIG_EHCI_HCD_INIT_AFTER_RESET