Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
	common/cmd_fpga.c
	drivers/usb/host/ohci-at91.c

305 files changed, 8271 insertions, 15424 deletions

diff --git a/.gitignore b/.gitignore
index c79d5770c04..771b860ee8e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -80,5 +80,11 @@ cscope.*
 /ctags
 /etags
 
+# gnu global files
+GPATH
+GRTAGS
+GSYMS
+GTAGS
+
 # spl ais files
 /spl/*.ais
diff --git a/MAINTAINERS b/MAINTAINERS
index 0e0f203f35a..14075afae48 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1086,9 +1086,19 @@ Unknown / orphaned boards:
 #	Board		CPU						#
 #########################################################################
 
-Graeme Russ <graeme.russ@gmail.com>
+Simon Glass <sjg@chromium.org>
 
-	eNET		AMD SC520
+	chromebook-x86	Coreboot runs first, then U-Boot
+			Supports Intel Sandy Bridge / Ivy Bridge so far
+
+			Chromebooks for x86, including:
+				Samsung Series 5 Chromebook
+				Acer AC700 Chromebook
+				Acer C7 Chromebook
+				Samsung Chromebook 550
+				HP Pavillion Chromebook
+				Acer C710 Chromebook
+				Chromebook Pixel
 
 #########################################################################
 # MIPS Systems:								#
@@ -1354,5 +1364,16 @@ Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
 	openrisc-generic	OpenRISC
 
 #########################################################################
+# Sandbox:								#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Simon Glass <sjg@chromium.org>
+
+	sandbox		sandbox
+
+#########################################################################
 # End of MAINTAINERS list						#
 #########################################################################
diff --git a/MAKEALL b/MAKEALL
index 2737eab234a..2e16e0d9ade 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -268,12 +268,6 @@ LIST_8xx="$(boards_by_cpu mpc8xx)"
 LIST_4xx="$(boards_by_cpu ppc4xx)"
 
 #########################################################################
-## MPC8220 Systems
-#########################################################################
-
-LIST_8220="$(boards_by_cpu mpc8220)"
-
-#########################################################################
 ## MPC824x Systems
 #########################################################################
 
@@ -324,7 +318,6 @@ LIST_powerpc="		\
 	${LIST_512x}	\
 	${LIST_5xxx}	\
 	${LIST_8xx}	\
-	${LIST_8220}	\
 	${LIST_824x}	\
 	${LIST_8260}	\
 	${LIST_83xx}	\
diff --git a/README b/README
index b72ab2fb822..b1b3e1788ec 100644
--- a/README
+++ b/README
@@ -201,7 +201,6 @@ Directory Hierarchy:
       /mpc5xx		Files specific to Freescale MPC5xx CPUs
       /mpc5xxx		Files specific to Freescale MPC5xxx CPUs
       /mpc8xx		Files specific to Freescale MPC8xx CPUs
-      /mpc8220		Files specific to Freescale MPC8220 CPUs
       /mpc824x		Files specific to Freescale MPC824x CPUs
       /mpc8260		Files specific to Freescale MPC8260 CPUs
       /mpc85xx		Files specific to Freescale MPC85xx CPUs
@@ -899,6 +898,7 @@ The following options need to be configured:
 		CONFIG_CMD_SF		* Read/write/erase SPI NOR flash
 		CONFIG_CMD_SHA1SUM	  print sha1 memory digest
 					  (requires CONFIG_CMD_MEMORY)
+		CONFIG_CMD_SOFTSWITCH	* Soft switch setting command for BF60x
 		CONFIG_CMD_SOURCE	  "source" command Support
 		CONFIG_CMD_SPI		* SPI serial bus support
 		CONFIG_CMD_TFTPSRV	* TFTP transfer in server mode
@@ -2997,6 +2997,12 @@ FIT uImage format:
 		use an arch-specific makefile fragment instead, for
 		example if more than one image needs to be produced.
 
+		CONFIG_FIT_SPL_PRINT
+		Printing information about a FIT image adds quite a bit of
+		code to SPL. So this is normally disabled in SPL. Use this
+		option to re-enable it. This will affect the output of the
+		bootm command when booting a FIT image.
+
 Modem Support:
 --------------
 
@@ -5062,7 +5068,7 @@ On some platforms, it's possible to boot Linux zImage. This is done
 using the "bootz" command. The syntax of "bootz" command is the same
 as the syntax of "bootm" command.
 
-Note, defining the CONFIG_SUPPORT_INITRD_RAW allows user to supply
+Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
 kernel with raw initrd images. The syntax is slightly different, the
 address of the initrd must be augmented by it's size, in the following
 format: "<initrd addres>:<initrd size>".
diff --git a/api/api_platform-powerpc.c b/api/api_platform-powerpc.c
index a3d981f9e38..ceb127103f5 100644
--- a/api/api_platform-powerpc.c
+++ b/api/api_platform-powerpc.c
@@ -55,8 +55,6 @@ int platform_sys_info(struct sys_info *si)
 #define bi_bar	bi_mbar_base
 #elif defined(CONFIG_MPC83xx)
 #define bi_bar	bi_immrbar
-#elif defined(CONFIG_MPC8220)
-#define bi_bar	bi_mbar_base
 #endif
 
 #if defined(bi_bar)
diff --git a/arch/arm/include/asm/bootm.h b/arch/arm/include/asm/bootm.h
index db2ff94c62e..2c4fa196e4a 100644
--- a/arch/arm/include/asm/bootm.h
+++ b/arch/arm/include/asm/bootm.h
@@ -1,4 +1,7 @@
-/* Copyright (C) 2011
+/*
+ * Copyright (c) 2013, Google Inc.
+ *
+ * Copyright (C) 2011
  * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -19,8 +22,55 @@
 #ifndef ARM_BOOTM_H
 #define ARM_BOOTM_H
 
-#ifdef CONFIG_USB_DEVICE
 extern void udc_disconnect(void);
+
+#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
+		defined(CONFIG_CMDLINE_TAG) || \
+		defined(CONFIG_INITRD_TAG) || \
+		defined(CONFIG_SERIAL_TAG) || \
+		defined(CONFIG_REVISION_TAG)
+# define BOOTM_ENABLE_TAGS		1
+#else
+# define BOOTM_ENABLE_TAGS		0
+#endif
+
+#ifdef CONFIG_SETUP_MEMORY_TAGS
+# define BOOTM_ENABLE_MEMORY_TAGS	1
+#else
+# define BOOTM_ENABLE_MEMORY_TAGS	0
+#endif
+
+#ifdef CONFIG_CMDLINE_TAG
+ #define BOOTM_ENABLE_CMDLINE_TAG	1
+#else
+ #define BOOTM_ENABLE_CMDLINE_TAG	0
+#endif
+
+#ifdef CONFIG_INITRD_TAG
+ #define BOOTM_ENABLE_INITRD_TAG	1
+#else
+ #define BOOTM_ENABLE_INITRD_TAG	0
+#endif
+
+#ifdef CONFIG_SERIAL_TAG
+ #define BOOTM_ENABLE_SERIAL_TAG	1
+void get_board_serial(struct tag_serialnr *serialnr);
+#else
+ #define BOOTM_ENABLE_SERIAL_TAG	0
+static inline void get_board_serial(struct tag_serialnr *serialnr)
+{
+}
+#endif
+
+#ifdef CONFIG_REVISION_TAG
+ #define BOOTM_ENABLE_REVISION_TAG	1
+u32 get_board_rev(void);
+#else
+ #define BOOTM_ENABLE_REVISION_TAG	0
+static inline u32 get_board_rev(void)
+{
+	return 0;
+}
 #endif
 
 #endif
diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index f16861ad2f7..c01eef3e6ff 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -54,8 +54,6 @@ int	arch_early_init_r(void);
 int	board_init(void);
 int	dram_init (void);
 void	dram_init_banksize (void);
-void	setup_serial_tag (struct tag **params);
-void	setup_revision_tag (struct tag **params);
 
 /* cpu/.../interrupt.c */
 int	arch_interrupt_init	(void);
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 6ae161a51dc..5b2cb61dc36 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -45,6 +45,7 @@ endif
 COBJS-y += bss.o
 
 COBJS-y	+= bootm.o
+COBJS-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
 COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
 SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o
 SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
diff --git a/board/sorcery/sorcery.c b/arch/arm/lib/bootm-fdt.c
index 90d4298020d..93888f8db89 100644
--- a/board/sorcery/sorcery.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -1,6 +1,16 @@
 /*
- * (C) Copyright 2004, Freescale Inc.
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com
+ * Copyright (c) 2013, Google Inc.
+ *
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *  - Added prep subcommand support
+ *  - Reorganized source - modeled after powerpc version
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Copyright (C) 2001  Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -22,47 +32,21 @@
  */
 
 #include <common.h>
-#include <mpc8220.h>
-#include <asm/processor.h>
-#include <asm/mmu.h>
-#include <pci.h>
-#include <netdev.h>
-
-phys_size_t initdram (int board_type)
-{
-	ulong size;
-
-	size = dramSetup ();
+#include <fdt_support.h>
 
-	return get_ram_size(CONFIG_SYS_SDRAM_BASE, size);
-}
+DECLARE_GLOBAL_DATA_PTR;
 
-int checkboard (void)
+int arch_fixup_memory_node(void *blob)
 {
-	puts ("Board: Sorcery-C MPC8220\n");
-
-	return 0;
-}
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI devices, report devices found.
- */
-static struct pci_controller hose;
+	bd_t *bd = gd->bd;
+	int bank;
+	u64 start[CONFIG_NR_DRAM_BANKS];
+	u64 size[CONFIG_NR_DRAM_BANKS];
 
-#endif /* CONFIG_PCI */
+	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+		start[bank] = bd->bi_dram[bank].start;
+		size[bank] = bd->bi_dram[bank].size;
+	}
 
-void pci_init_board (void)
-{
-#ifdef CONFIG_PCI
-	extern void pci_mpc8220_init (struct pci_controller *hose);
-	pci_mpc8220_init (&hose);
-#endif /* CONFIG_PCI */
-}
-
-int board_eth_init(bd_t *bis)
-{
-	/* Initialize built-in FEC first */
-	cpu_eth_init(bis);
-	return pci_eth_init(bis);
+	return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
 }
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index f3b30c57a37..1b6e0ace453 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -22,7 +22,6 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307	 USA
- *
  */
 
 #include <common.h>
@@ -37,13 +36,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
-	defined(CONFIG_CMDLINE_TAG) || \
-	defined(CONFIG_INITRD_TAG) || \
-	defined(CONFIG_SERIAL_TAG) || \
-	defined(CONFIG_REVISION_TAG)
 static struct tag *params;
-#endif
 
 static ulong get_sp(void)
 {
@@ -75,23 +68,6 @@ void arch_lmb_reserve(struct lmb *lmb)
 		    gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp);
 }
 
-#ifdef CONFIG_OF_LIBFDT
-static int fixup_memory_node(void *blob)
-{
-	bd_t	*bd = gd->bd;
-	int bank;
-	u64 start[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
-
-	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
-		start[bank] = bd->bi_dram[bank].start;
-		size[bank] = bd->bi_dram[bank].size;
-	}
-
-	return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
-}
-#endif
-
 static void announce_and_cleanup(void)
 {
 	printf("\nStarting kernel ...\n\n");
@@ -109,11 +85,6 @@ static void announce_and_cleanup(void)
 	cleanup_before_linux();
 }
 
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
-	defined(CONFIG_CMDLINE_TAG) || \
-	defined(CONFIG_INITRD_TAG) || \
-	defined(CONFIG_SERIAL_TAG) || \
-	defined(CONFIG_REVISION_TAG)
 static void setup_start_tag (bd_t *bd)
 {
 	params = (struct tag *)bd->bi_boot_params;
@@ -127,9 +98,7 @@ static void setup_start_tag (bd_t *bd)
 
 	params = tag_next (params);
 }
-#endif
 
-#ifdef CONFIG_SETUP_MEMORY_TAGS
 static void setup_memory_tags(bd_t *bd)
 {
 	int i;
@@ -144,9 +113,7 @@ static void setup_memory_tags(bd_t *bd)
 		params = tag_next (params);
 	}
 }
-#endif
 
-#ifdef CONFIG_CMDLINE_TAG
 static void setup_commandline_tag(bd_t *bd, char *commandline)
 {
 	char *p;
@@ -171,9 +138,7 @@ static void setup_commandline_tag(bd_t *bd, char *commandline)
 
 	params = tag_next (params);
 }
-#endif
 
-#ifdef CONFIG_INITRD_TAG
 static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end)
 {
 	/* an ATAG_INITRD node tells the kernel where the compressed
@@ -187,14 +152,11 @@ static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end)
 
 	params = tag_next (params);
 }
-#endif
 
-#ifdef CONFIG_SERIAL_TAG
-void setup_serial_tag(struct tag **tmp)
+static void setup_serial_tag(struct tag **tmp)
 {
 	struct tag *params = *tmp;
 	struct tag_serialnr serialnr;
-	void get_board_serial(struct tag_serialnr *serialnr);
 
 	get_board_serial(&serialnr);
 	params->hdr.tag = ATAG_SERIAL;
@@ -204,13 +166,10 @@ void setup_serial_tag(struct tag **tmp)
 	params = tag_next (params);
 	*tmp = params;
 }
-#endif
 
-#ifdef CONFIG_REVISION_TAG
-void setup_revision_tag(struct tag **in_params)
+static void setup_revision_tag(struct tag **in_params)
 {
 	u32 rev = 0;
-	u32 get_board_rev(void);
 
 	rev = get_board_rev();
 	params->hdr.tag = ATAG_REVISION;
@@ -218,106 +177,50 @@ void setup_revision_tag(struct tag **in_params)
 	params->u.revision.rev = rev;
 	params = tag_next (params);
 }
-#endif
 
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
-	defined(CONFIG_CMDLINE_TAG) || \
-	defined(CONFIG_INITRD_TAG) || \
-	defined(CONFIG_SERIAL_TAG) || \
-	defined(CONFIG_REVISION_TAG)
 static void setup_end_tag(bd_t *bd)
 {
 	params->hdr.tag = ATAG_NONE;
 	params->hdr.size = 0;
 }
-#endif
-
-#ifdef CONFIG_OF_LIBFDT
-static int create_fdt(bootm_headers_t *images)
-{
-	ulong of_size = images->ft_len;
-	char **of_flat_tree = &images->ft_addr;
-	ulong *initrd_start = &images->initrd_start;
-	ulong *initrd_end = &images->initrd_end;
-	struct lmb *lmb = &images->lmb;
-	ulong rd_len;
-	int ret;
-
-	debug("using: FDT\n");
-
-	boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree);
-
-	rd_len = images->rd_end - images->rd_start;
-	ret = boot_ramdisk_high(lmb, images->rd_start, rd_len,
-			initrd_start, initrd_end);
-	if (ret)
-		return ret;
-
-	ret = boot_relocate_fdt(lmb, of_flat_tree, &of_size);
-	if (ret)
-		return ret;
-
-	fdt_chosen(*of_flat_tree, 1);
-	fixup_memory_node(*of_flat_tree);
-	fdt_fixup_ethernet(*of_flat_tree);
-	fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1);
-#ifdef CONFIG_OF_BOARD_SETUP
-	ft_board_setup(*of_flat_tree, gd->bd);
-#endif
-
-	return 0;
-}
-#endif
 
 __weak void setup_board_tags(struct tag **in_params) {}
 
 /* Subcommand: PREP */
 static void boot_prep_linux(bootm_headers_t *images)
 {
-#ifdef CONFIG_CMDLINE_TAG
 	char *commandline = getenv("bootargs");
-#endif
 
+	if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
 #ifdef CONFIG_OF_LIBFDT
-	if (images->ft_len) {
 		debug("using: FDT\n");
-		if (create_fdt(images)) {
+		if (image_setup_linux(images)) {
 			printf("FDT creation failed! hanging...");
 			hang();
 		}
-	} else
 #endif
-	{
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
-	defined(CONFIG_CMDLINE_TAG) || \
-	defined(CONFIG_INITRD_TAG) || \
-	defined(CONFIG_SERIAL_TAG) || \
-	defined(CONFIG_REVISION_TAG)
+	} else if (BOOTM_ENABLE_TAGS) {
 		debug("using: ATAGS\n");
 		setup_start_tag(gd->bd);
-#ifdef CONFIG_SERIAL_TAG
-		setup_serial_tag(&params);
-#endif
-#ifdef CONFIG_CMDLINE_TAG
-		setup_commandline_tag(gd->bd, commandline);
-#endif
-#ifdef CONFIG_REVISION_TAG
-		setup_revision_tag(&params);
-#endif
-#ifdef CONFIG_SETUP_MEMORY_TAGS
-		setup_memory_tags(gd->bd);
-#endif
-#ifdef CONFIG_INITRD_TAG
-		if (images->rd_start && images->rd_end)
-			setup_initrd_tag(gd->bd, images->rd_start,
-			images->rd_end);
-#endif
+		if (BOOTM_ENABLE_SERIAL_TAG)
+			setup_serial_tag(&params);
+		if (BOOTM_ENABLE_CMDLINE_TAG)
+			setup_commandline_tag(gd->bd, commandline);
+		if (BOOTM_ENABLE_REVISION_TAG)
+			setup_revision_tag(&params);
+		if (BOOTM_ENABLE_MEMORY_TAGS)
+			setup_memory_tags(gd->bd);
+		if (BOOTM_ENABLE_INITRD_TAG) {
+			if (images->rd_start && images->rd_end) {
+				setup_initrd_tag(gd->bd, images->rd_start,
+						 images->rd_end);
+			}
+		}
 		setup_board_tags(&params);
 		setup_end_tag(gd->bd);
-#else /* all tags */
+	} else {
 		printf("FDT and ATAGS support not compiled in - hanging\n");
 		hang();
-#endif /* all tags */
 	}
 }
 
@@ -342,11 +245,9 @@ static void boot_jump_linux(bootm_headers_t *images)
 	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
 	announce_and_cleanup();
 
-#ifdef CONFIG_OF_LIBFDT
-	if (images->ft_len)
+	if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len)
 		r2 = (unsigned long)images->ft_addr;
 	else
-#endif
 		r2 = gd->bd->bi_boot_params;
 
 	kernel_entry(0, machid, r2);
diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c
index ccf862a7fbf..2e79e98eb0d 100644
--- a/arch/avr32/lib/board.c
+++ b/arch/avr32/lib/board.c
@@ -116,7 +116,7 @@ static int display_banner (void)
 	printf ("\n\n%s\n\n", version_string);
 	printf ("U-Boot code: %08lx -> %08lx  data: %08lx -> %08lx\n",
 		(unsigned long)_text, (unsigned long)_etext,
-		(unsigned long)_data, (unsigned long)__bss_end);
+		(unsigned long)_data, (unsigned long)(&__bss_end));
 	return 0;
 }
 
@@ -183,7 +183,7 @@ void board_init_f(ulong board_type)
 	 *  - stack
 	 */
 	addr = CONFIG_SYS_SDRAM_BASE + sdram_size;
-	monitor_len = (char *)__bss_end - _text;
+	monitor_len = (char *)(&__bss_end) - _text;
 
 	/*
 	 * Reserve memory for u-boot code, data and bss.
diff --git a/arch/blackfin/cpu/Makefile b/arch/blackfin/cpu/Makefile
index 0a72ec5df3c..1421cb2ca25 100644
--- a/arch/blackfin/cpu/Makefile
+++ b/arch/blackfin/cpu/Makefile
@@ -18,14 +18,12 @@ CEXTRA   := initcode.o
 SEXTRA   := start.o
 SOBJS    := interrupt.o cache.o
 COBJS-y  += cpu.o
-COBJS-y  += gpio.o
+COBJS-$(CONFIG_ADI_GPIO1) += gpio.o
 COBJS-y  += interrupts.o
 COBJS-$(CONFIG_JTAG_CONSOLE) += jtag-console.o
 COBJS-y  += os_log.o
 COBJS-y  += reset.o
-COBJS-y  += serial.o
 COBJS-y  += traps.o
-COBJS-$(CONFIG_HW_WATCHDOG)  += watchdog.o
 
 SRCS     := $(SEXTRA:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS     := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c
index 0be2e2b835b..218f57ed389 100644
--- a/arch/blackfin/cpu/cpu.c
+++ b/arch/blackfin/cpu/cpu.c
@@ -16,13 +16,39 @@
 #include <asm/mach-common/bits/core.h>
 #include <asm/mach-common/bits/ebiu.h>
 #include <asm/mach-common/bits/trace.h>
+#include <asm/serial.h>
 
 #include "cpu.h"
-#include "serial.h"
 #include "initcode.h"
 
 ulong bfin_poweron_retx;
 
+#if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START)
+void bfin_core1_start(void)
+{
+#ifdef BF561_FAMILY
+	/* Enable core 1 */
+	bfin_write_SYSCR(bfin_read_SYSCR() & ~0x0020);
+#else
+	/* Enable core 1 */
+	bfin_write32(RCU0_SVECT1, COREB_L1_CODE_START);
+	bfin_write32(RCU0_CRCTL, 0);
+
+	bfin_write32(RCU0_CRCTL, 0x2);
+
+	/* Check if core 1 starts */
+	while (!(bfin_read32(RCU0_CRSTAT) & 0x2))
+		continue;
+
+	bfin_write32(RCU0_CRCTL, 0);
+
+	/* flag to notify cces core 1 application */
+	bfin_write32(SDU0_MSG_SET, (1 << 19));
+#endif
+}
+#endif
+
+__attribute__ ((__noreturn__))
 void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
 {
 #ifndef CONFIG_BFIN_BOOTROM_USES_EVT1
@@ -72,6 +98,10 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
 # endif
 #endif
 
+#if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START)
+	bfin_core1_start();
+#endif
+
 	serial_early_puts("Board init flash\n");
 	board_init_f(bootflag);
 }
diff --git a/arch/blackfin/cpu/gpio.c b/arch/blackfin/cpu/gpio.c
index f684be531c4..f74a0b7c0e8 100644
--- a/arch/blackfin/cpu/gpio.c
+++ b/arch/blackfin/cpu/gpio.c
@@ -1,5 +1,6 @@
 /*
- * GPIO Abstraction Layer
+ * ADI GPIO1 Abstraction Layer
+ * Support BF50x, BF51x, BF52x, BF53x and BF561 only.
  *
  * Copyright 2006-2010 Analog Devices Inc.
  *
@@ -55,25 +56,6 @@ static struct gpio_port_t * const gpio_array[] = {
 	(struct gpio_port_t *) FIO0_FLAG_D,
 	(struct gpio_port_t *) FIO1_FLAG_D,
 	(struct gpio_port_t *) FIO2_FLAG_D,
-#elif defined(CONFIG_BF54x)
-	(struct gpio_port_t *)PORTA_FER,
-	(struct gpio_port_t *)PORTB_FER,
-	(struct gpio_port_t *)PORTC_FER,
-	(struct gpio_port_t *)PORTD_FER,
-	(struct gpio_port_t *)PORTE_FER,
-	(struct gpio_port_t *)PORTF_FER,
-	(struct gpio_port_t *)PORTG_FER,
-	(struct gpio_port_t *)PORTH_FER,
-	(struct gpio_port_t *)PORTI_FER,
-	(struct gpio_port_t *)PORTJ_FER,
-#elif defined(CONFIG_BF60x)
-	(struct gpio_port_t *)PORTA_FER,
-	(struct gpio_port_t *)PORTB_FER,
-	(struct gpio_port_t *)PORTC_FER,
-	(struct gpio_port_t *)PORTD_FER,
-	(struct gpio_port_t *)PORTE_FER,
-	(struct gpio_port_t *)PORTF_FER,
-	(struct gpio_port_t *)PORTG_FER,
 #else
 # error no gpio arrays defined
 #endif
@@ -174,12 +156,6 @@ DECLARE_RESERVED_MAP(peri, gpio_bank(MAX_RESOURCES));
 
 inline int check_gpio(unsigned gpio)
 {
-#if defined(CONFIG_BF54x)
-	if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
-	    || gpio == GPIO_PH14 || gpio == GPIO_PH15
-	    || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
-		return -EINVAL;
-#endif
 	if (gpio >= MAX_BLACKFIN_GPIOS)
 		return -EINVAL;
 	return 0;
@@ -218,18 +194,6 @@ static void port_setup(unsigned gpio, unsigned short usage)
 	else
 		*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
 	SSYNC();
-#elif defined(CONFIG_BF54x)
-	if (usage == GPIO_USAGE)
-		gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
-	else
-		gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
-	SSYNC();
-#elif defined(CONFIG_BF60x)
-	if (usage == GPIO_USAGE)
-		gpio_array[gpio_bank(gpio)]->port_fer_clear = gpio_bit(gpio);
-	else
-		gpio_array[gpio_bank(gpio)]->port_fer_set = gpio_bit(gpio);
-	SSYNC();
 #endif
 }
 
@@ -304,30 +268,6 @@ static void portmux_setup(unsigned short per)
 		}
 	}
 }
-#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
-inline void portmux_setup(unsigned short per)
-{
-	u32 pmux;
-	u16 ident = P_IDENT(per);
-	u16 function = P_FUNCT2MUX(per);
-
-	pmux = gpio_array[gpio_bank(ident)]->port_mux;
-
-	pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
-	pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
-
-	gpio_array[gpio_bank(ident)]->port_mux = pmux;
-}
-
-inline u16 get_portmux(unsigned short per)
-{
-	u32 pmux;
-	u16 ident = P_IDENT(per);
-
-	pmux = gpio_array[gpio_bank(ident)]->port_mux;
-
-	return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
-}
 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 inline void portmux_setup(unsigned short per)
 {
@@ -344,7 +284,6 @@ inline void portmux_setup(unsigned short per)
 # define portmux_setup(...)  do { } while (0)
 #endif
 
-#if !defined(CONFIG_BF54x) && !defined(CONFIG_BF60x)
 /***********************************************************
 *
 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
@@ -491,15 +430,6 @@ GET_GPIO_P(both)
 GET_GPIO_P(maska)
 GET_GPIO_P(maskb)
 
-#else /* CONFIG_BF54x */
-
-unsigned short get_gpio_dir(unsigned gpio)
-{
-	return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
-}
-
-#endif /* CONFIG_BF54x */
-
 /***********************************************************
 *
 * FUNCTIONS:	Blackfin Peripheral Resource Allocation
@@ -548,11 +478,7 @@ int peripheral_request(unsigned short per, const char *label)
 		 * be requested and used by several drivers
 		 */
 
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
-		if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
-#else
 		if (!(per & P_MAYSHARE)) {
-#endif
 			/*
 			 * Allow that the identical pin function can
 			 * be requested from the same driver twice
@@ -641,7 +567,7 @@ void peripheral_free_list(const unsigned short per[])
 * MODIFICATION HISTORY :
 **************************************************************/
 
-int bfin_gpio_request(unsigned gpio, const char *label)
+int gpio_request(unsigned gpio, const char *label)
 {
 	if (check_gpio(gpio) < 0)
 		return -EINVAL;
@@ -665,11 +591,9 @@ int bfin_gpio_request(unsigned gpio, const char *label)
 		       gpio, get_label(gpio));
 		return -EBUSY;
 	}
-#if !defined(CONFIG_BF54x) && !defined(CONFIG_BF60x)
 	else {	/* Reset POLAR setting when acquiring a gpio for the first time */
 		set_gpio_polar(gpio, 0);
 	}
-#endif
 
 	reserve(gpio, gpio);
 	set_label(gpio, label);
@@ -679,27 +603,27 @@ int bfin_gpio_request(unsigned gpio, const char *label)
 	return 0;
 }
 
-#ifdef CONFIG_BFIN_GPIO_TRACK
-void bfin_gpio_free(unsigned gpio)
+int gpio_free(unsigned gpio)
 {
 	if (check_gpio(gpio) < 0)
-		return;
+		return -1;
 
 	if (unlikely(!is_reserved(gpio, gpio, 0))) {
 		gpio_error(gpio);
-		return;
+		return -1;
 	}
 
 	unreserve(gpio, gpio);
 
 	set_label(gpio, "free");
+
+	return 0;
 }
-#endif
 
-#ifdef BFIN_SPECIAL_GPIO_BANKS
+#ifdef ADI_SPECIAL_GPIO_BANKS
 DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
 
-int bfin_special_gpio_request(unsigned gpio, const char *label)
+int special_gpio_request(unsigned gpio, const char *label)
 {
 	/*
 	 * Allow that the identical GPIO can
@@ -731,7 +655,7 @@ int bfin_special_gpio_request(unsigned gpio, const char *label)
 	return 0;
 }
 
-void bfin_special_gpio_free(unsigned gpio)
+void special_gpio_free(unsigned gpio)
 {
 	if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
 		gpio_error(gpio);
@@ -744,21 +668,13 @@ void bfin_special_gpio_free(unsigned gpio)
 }
 #endif
 
-static inline void __bfin_gpio_direction_input(unsigned gpio)
+static inline void __gpio_direction_input(unsigned gpio)
 {
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
-	gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
-#else
 	gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
-#endif
-#if defined(CONFIG_BF60x)
-	gpio_array[gpio_bank(gpio)]->inen_set = gpio_bit(gpio);
-#else
 	gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
-#endif
 }
 
-int bfin_gpio_direction_input(unsigned gpio)
+int gpio_direction_input(unsigned gpio)
 {
 	unsigned long flags;
 
@@ -768,31 +684,24 @@ int bfin_gpio_direction_input(unsigned gpio)
 	}
 
 	local_irq_save(flags);
-	__bfin_gpio_direction_input(gpio);
+	__gpio_direction_input(gpio);
 	AWA_DUMMY_READ(inen);
 	local_irq_restore(flags);
 
 	return 0;
 }
 
-void bfin_gpio_toggle_value(unsigned gpio)
-{
-#ifdef CONFIG_BF54x
-	gpio_set_value(gpio, !gpio_get_value(gpio));
-#else
-	gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
-#endif
-}
-
-void bfin_gpio_set_value(unsigned gpio, int arg)
+int gpio_set_value(unsigned gpio, int arg)
 {
 	if (arg)
 		gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
 	else
 		gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
+
+	return 0;
 }
 
-int bfin_gpio_direction_output(unsigned gpio, int value)
+int gpio_direction_output(unsigned gpio, int value)
 {
 	unsigned long flags;
 
@@ -803,17 +712,9 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
 
 	local_irq_save(flags);
 
-#if defined(CONFIG_BF60x)
-	gpio_array[gpio_bank(gpio)]->inen_clear = gpio_bit(gpio);
-#else
 	gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
-#endif
 	gpio_set_value(gpio, value);
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
-	gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
-#else
 	gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
-#endif
 
 	AWA_DUMMY_READ(dir);
 	local_irq_restore(flags);
@@ -821,11 +722,8 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
 	return 0;
 }
 
-int bfin_gpio_get_value(unsigned gpio)
+int gpio_get_value(unsigned gpio)
 {
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
-	return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
-#else
 	unsigned long flags;
 
 	if (unlikely(get_gpio_edge(gpio))) {
@@ -838,7 +736,6 @@ int bfin_gpio_get_value(unsigned gpio)
 		return ret;
 	} else
 		return get_gpio_data(gpio);
-#endif
 }
 
 /* If we are booting from SPI and our board lacks a strong enough pull up,
@@ -860,8 +757,7 @@ void bfin_reset_boot_spi_cs(unsigned short pin)
 	udelay(1);
 }
 
-#ifdef CONFIG_BFIN_GPIO_TRACK
-void bfin_gpio_labels(void)
+void gpio_labels(void)
 {
 	int c, gpio;
 
@@ -877,4 +773,3 @@ void bfin_gpio_labels(void)
 			continue;
 	}
 }
-#endif
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 1a066806d1f..ffaf1017d7b 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -13,12 +13,12 @@
 
 #include <config.h>
 #include <asm/blackfin.h>
+#include <asm/mach-common/bits/watchdog.h>
 #include <asm/mach-common/bits/bootrom.h>
 #include <asm/mach-common/bits/core.h>
+#include <asm/serial.h>
 
-#define BUG() while (1) { asm volatile("emuexcpt;"); }
-
-#include "serial.h"
+#define BUG() while (1) asm volatile("emuexcpt;");
 
 #ifndef __ADSPBF60x__
 #include <asm/mach-common/bits/ebiu.h>
@@ -193,17 +193,12 @@ static inline void serial_init(void)
 	}
 #endif
 
+#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS
 	if (BFIN_DEBUG_EARLY_SERIAL) {
-		int enabled = serial_early_enabled(uart_base);
-
 		serial_early_init(uart_base);
-
-		/* If the UART is off, that means we need to program
-		 * the baud rate ourselves initially.
-		 */
-		if (!enabled)
-			serial_early_set_baud(uart_base, CONFIG_BAUDRATE);
+		serial_early_set_baud(uart_base, CONFIG_BAUDRATE);
 	}
+#endif
 }
 
 __attribute__((always_inline))
@@ -262,7 +257,8 @@ program_nmi_handler(void)
 		"%1 = RETS;" /* Load addr of NMI handler */
 		"RETS = %0;" /* Restore RETS */
 		"[%2] = %1;" /* Write NMI handler */
-		: "=r"(tmp1), "=r"(tmp2) : "ab"(EVT2)
+		: "=d"(tmp1), "=d"(tmp2)
+		: "ab"(EVT2)
 	);
 }
 
@@ -462,19 +458,29 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint *divB, uint *vcoB)
 	if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
 		serial_putc('e');
 #ifdef __ADSPBF60x__
+		/* Reset system event controller */
 		bfin_write_SEC_GCTL(0x2);
+		bfin_write_SEC_CCTL(0x2);
 		SSYNC();
+
+		/* Enable fault event input and system reset action in fault
+		 * controller. Route watchdog timeout event to fault interface.
+		 */
 		bfin_write_SEC_FCTL(0xc1);
+		/* Enable watchdog interrupt source */
 		bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
-
-		bfin_write_SEC_CCTL(0x2);
 		SSYNC();
+
+		/* Enable system event controller */
 		bfin_write_SEC_GCTL(0x1);
 		bfin_write_SEC_CCTL(0x1);
+		SSYNC();
 #endif
+		bfin_write_WDOG_CTL(WDDIS);
+		SSYNC();
 		bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE));
 #if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART
-		bfin_write_WDOG_CTL(0);
+		bfin_write_WDOG_CTL(WDEN);
 #endif
 		serial_putc('f');
 	}
@@ -713,37 +719,32 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)
 __attribute__((always_inline)) static inline void
 update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB)
 {
-	serial_putc('a');
-
 	/* Since we've changed the SCLK above, we may need to update
 	 * the UART divisors (UART baud rates are based on SCLK).
 	 * Do the division by hand as there are no native instructions
 	 * for dividing which means we'd generate a libgcc reference.
 	 */
-	if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) {
-		unsigned int sdivR, vcoR;
-		int dividend = sdivB * divB * vcoR;
-		int divisor = vcoB * sdivR;
-		unsigned int quotient;
+	unsigned int sdivR, vcoR;
+	unsigned int dividend;
+	unsigned int divisor;
+	unsigned int quotient;
 
-		serial_putc('b');
+	serial_putc('a');
 
 #ifdef __ADSPBF60x__
-		sdivR = bfin_read_CGU_DIV();
-		sdivR = ((sdivR >> 8) & 0x1f) * ((sdivR >> 5) & 0x7);
-		vcoR = (bfin_read_CGU_CTL() >> 8) & 0x7f;
+	sdivR = bfin_read_CGU_DIV();
+	sdivR = ((sdivR >> 8) & 0x1f) * ((sdivR >> 5) & 0x7);
+	vcoR = (bfin_read_CGU_CTL() >> 8) & 0x7f;
 #else
-		sdivR = bfin_read_PLL_DIV() & 0xf;
-		vcoR = (bfin_read_PLL_CTL() >> 9) & 0x3f;
+	sdivR = bfin_read_PLL_DIV() & 0xf;
+	vcoR = (bfin_read_PLL_CTL() >> 9) & 0x3f;
 #endif
 
-		for (quotient = 0; dividend > 0; ++quotient)
-			dividend -= divisor;
-		serial_early_put_div(quotient - ANOMALY_05000230);
-		serial_putc('c');
-	}
-
-	serial_putc('d');
+	dividend = sdivB * divB * vcoR;
+	divisor = vcoB * sdivR;
+	quotient = early_division(dividend, divisor);
+	serial_early_put_div(quotient - ANOMALY_05000230);
+	serial_putc('c');
 }
 
 __attribute__((always_inline)) static inline void
diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S
index 7155fc858b7..da084a87c62 100644
--- a/arch/blackfin/cpu/start.S
+++ b/arch/blackfin/cpu/start.S
@@ -32,10 +32,10 @@
 
 #include <config.h>
 #include <asm/blackfin.h>
+#include <asm/mach-common/bits/watchdog.h>
 #include <asm/mach-common/bits/core.h>
 #include <asm/mach-common/bits/pll.h>
-
-#include "serial.h"
+#include <asm/serial.h>
 
 /* It may seem odd that we make calls to functions even though we haven't
  * relocated ourselves yet out of {flash,ram,wherever}.  This is OK because
@@ -65,20 +65,29 @@ ENTRY(_start)
 	p5.h = HI(COREMMR_BASE);
 
 #ifdef CONFIG_HW_WATCHDOG
-#ifndef __ADSPBF60x__
-# ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
-#  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
-# endif
-	/* Program the watchdog with an initial timeout of ~5 seconds.
+	/* Program the watchdog with default timeout of ~5 seconds.
 	 * That should be long enough to bootstrap ourselves up and
 	 * then the common u-boot code can take over.
 	 */
+	r1 = WDDIS;
+# ifdef __ADSPBF60x__
+	[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# else
+	W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# endif
+	SSYNC;
 	r0 = 0;
-	r0.h = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START));
+	r0.h = HI(MSEC_TO_SCLK(CONFIG_WATCHDOG_TIMEOUT_MSECS));
 	[p4 + (WDOG_CNT - SYSMMR_BASE)] = r0;
+	SSYNC;
+	r1 = WDEN;
 	/* fire up the watchdog - R0.L above needs to be 0x0000 */
-	W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
-#endif
+# ifdef __ADSPBF60x__
+	[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# else
+	W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# endif
+	SSYNC;
 #endif
 
 	/* Turn on the serial for debugging the init process */
diff --git a/arch/blackfin/include/asm/clock.h b/arch/blackfin/include/asm/clock.h
new file mode 100644
index 00000000000..f1fcd404993
--- /dev/null
+++ b/arch/blackfin/include/asm/clock.h
@@ -0,0 +1,78 @@
+
+/*
+ * Copyright (C) 2012 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __CLOCK_H__
+#define __CLOCK_H__
+
+#include <asm/blackfin.h>
+#ifdef PLL_CTL
+#include <asm/mach-common/bits/pll.h>
+# define pll_is_bypassed() (bfin_read_PLL_CTL() & BYPASS)
+#else
+#include <asm/mach-common/bits/cgu.h>
+# define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP)
+# define bfin_read_PLL_CTL() bfin_read_CGU_CTL()
+# define bfin_read_PLL_DIV() bfin_read_CGU_DIV()
+# define SSEL SYSSEL
+# define SSEL_P SYSSEL_P
+#endif
+
+__attribute__((always_inline))
+static inline uint32_t early_division(uint32_t dividend, uint32_t divisor)
+{
+	uint32_t quotient;
+	uint32_t i, j;
+
+	for (quotient = 1, i = 1; dividend > divisor; ++i) {
+		j = divisor << i;
+		if (j > dividend || (j & 0x80000000)) {
+			--i;
+			quotient += (1 << i);
+			dividend -= (divisor << i);
+			i = 0;
+		}
+	}
+
+	return quotient;
+}
+
+__attribute__((always_inline))
+static inline uint32_t early_get_uart_clk(void)
+{
+	uint32_t msel, pll_ctl, vco;
+	uint32_t div, ssel, sclk, uclk;
+
+	pll_ctl = bfin_read_PLL_CTL();
+	msel = (pll_ctl & MSEL) >> MSEL_P;
+	if (msel == 0)
+		msel = (MSEL >> MSEL_P) + 1;
+
+	vco = (CONFIG_CLKIN_HZ >> (pll_ctl & DF)) * msel;
+	sclk = vco;
+	if (!pll_is_bypassed()) {
+		div = bfin_read_PLL_DIV();
+		ssel = (div & SSEL) >> SSEL_P;
+#if CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS
+		sclk = vco/ssel;
+#else
+		sclk = early_division(vco, ssel);
+#endif
+	}
+	uclk = sclk;
+#ifdef CGU_DIV
+	ssel = (div & S0SEL) >> S0SEL_P;
+	uclk = early_division(sclk, ssel);
+#endif
+	return uclk;
+}
+
+#ifdef CGU_DIV
+# define get_uart_clk get_sclk0
+#else
+# define get_uart_clk get_sclk
+#endif
+
+#endif
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index ef1db6e99c5..8a7c07933eb 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -17,21 +17,21 @@
 
 struct dmasg_large {
 	void *next_desc_addr;
-	unsigned long start_addr;
-	unsigned short cfg;
-	unsigned short x_count;
-	short x_modify;
-	unsigned short y_count;
-	short y_modify;
+	u32 start_addr;
+	u16 cfg;
+	u16 x_count;
+	s16 x_modify;
+	u16 y_count;
+	s16 y_modify;
 } __attribute__((packed));
 
 struct dmasg {
-	unsigned long start_addr;
-	unsigned short cfg;
-	unsigned short x_count;
-	short x_modify;
-	unsigned short y_count;
-	short y_modify;
+	u32 start_addr;
+	u16 cfg;
+	u16 x_count;
+	s16 x_modify;
+	u16 y_count;
+	s16 y_modify;
 } __attribute__((packed));
 
 struct dma_register {
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 05131b5e8bc..58a61911077 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -7,6 +7,8 @@
 #ifndef __ARCH_BLACKFIN_GPIO_H__
 #define __ARCH_BLACKFIN_GPIO_H__
 
+#include <asm-generic/gpio.h>
+
 #define gpio_bank(x)	((x) >> 4)
 #define gpio_bit(x)	(1<<((x) & 0xF))
 #define gpio_sub_n(x)	((x) & 0xF)
@@ -65,10 +67,11 @@
 
 #define PERIPHERAL_USAGE 1
 #define GPIO_USAGE 0
+#define MAX_GPIOS MAX_BLACKFIN_GPIOS
 
 #ifndef __ASSEMBLY__
 
-#if !defined(CONFIG_BF54x) && !defined(CONFIG_BF60x)
+#ifdef CONFIG_ADI_GPIO1
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
@@ -140,61 +143,16 @@ struct gpio_port_t {
 };
 #endif
 
-#ifdef CONFIG_BFIN_GPIO_TRACK
-void bfin_gpio_labels(void);
-void bfin_gpio_free(unsigned gpio);
-#else
-#define bfin_gpio_labels()
-#define bfin_gpio_free(gpio)
-#define bfin_gpio_request(gpio, label) bfin_gpio_request(gpio)
-#define bfin_special_gpio_request(gpio, label) bfin_special_gpio_request(gpio)
-#endif
-
-#ifdef BFIN_SPECIAL_GPIO_BANKS
-void bfin_special_gpio_free(unsigned gpio);
-int bfin_special_gpio_request(unsigned gpio, const char *label);
+#ifdef ADI_SPECIAL_GPIO_BANKS
+void special_gpio_free(unsigned gpio);
+int special_gpio_request(unsigned gpio, const char *label);
 #endif
 
-int bfin_gpio_request(unsigned gpio, const char *label);
-int bfin_gpio_direction_input(unsigned gpio);
-int bfin_gpio_direction_output(unsigned gpio, int value);
-int bfin_gpio_get_value(unsigned gpio);
-void bfin_gpio_set_value(unsigned gpio, int value);
-void bfin_gpio_toggle_value(unsigned gpio);
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-	return bfin_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-	return bfin_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-	return bfin_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
-	return bfin_gpio_direction_output(gpio, value);
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
-	return bfin_gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-	return bfin_gpio_set_value(gpio, value);
-}
+void gpio_labels(void);
 
 static inline int gpio_is_valid(int number)
 {
-	return number >= 0 && number < MAX_BLACKFIN_GPIOS;
+	return number >= 0 && number < MAX_GPIOS;
 }
 
 #include <linux/ctype.h>
@@ -248,7 +206,7 @@ static inline int name_to_gpio(const char *name)
 }
 #define name_to_gpio(n) name_to_gpio(n)
 
-#define gpio_status() bfin_gpio_labels()
+#define gpio_status() gpio_labels()
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/blackfin/include/asm/mach-bf561/BF561_def.h b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
index a7ff5a3feba..8fd552f2a12 100644
--- a/arch/blackfin/include/asm/mach-bf561/BF561_def.h
+++ b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
@@ -714,4 +714,6 @@
 #define L1_INST_SRAM_SIZE (0xFFA03FFF - 0xFFA00000 + 1)
 #define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
 
+#define COREB_L1_CODE_START       0xFF600000
+
 #endif /* __BFIN_DEF_ADSP_BF561_proc__ */
diff --git a/arch/blackfin/include/asm/mach-bf609/BF609_def.h b/arch/blackfin/include/asm/mach-bf609/BF609_def.h
index 8c1dcd006e4..02b81d3fd11 100644
--- a/arch/blackfin/include/asm/mach-bf609/BF609_def.h
+++ b/arch/blackfin/include/asm/mach-bf609/BF609_def.h
@@ -128,6 +128,9 @@
 #define EMAC0_MACCFG      0xFFC20000 /* EMAC0 MAC Configuration Register */
 #define EMAC1_MACCFG      0xFFC22000 /* EMAC1 MAC Configuration Register */
 
+#define SPI0_REGBASE      0xFFC40400 /* SPI0 Base Address */
+#define SPI1_REGBASE      0xFFC40500 /* SPI1 Base Address */
+
 #define DMA10_DSCPTR_NXT  0xFFC05000 /* DMA10 Pointer to Next Initial Desc */
 #define DMA10_ADDRSTART   0xFFC05004 /* DMA10 Start Address of Current Buf */
 #define DMA10_CFG         0xFFC05008 /* DMA10 Configuration Register */
@@ -244,4 +247,6 @@
 #define L1_INST_SRAM_SIZE 0x8000
 #define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
 
+#define COREB_L1_CODE_START       0xFF600000
+
 #endif /* __BFIN_DEF_ADSP_BF609_proc__ */
diff --git a/arch/blackfin/include/asm/portmux.h b/arch/blackfin/include/asm/portmux.h
index 300ef44fd15..003694b515a 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,11 +17,6 @@
 #define P_MAYSHARE	0x2000
 #define P_DONTCARE	0x1000
 
-#ifndef CONFIG_BFIN_GPIO_TRACK
-#define peripheral_request(per, label) peripheral_request(per)
-#define peripheral_request_list(per, label) peripheral_request_list(per)
-#endif
-
 #ifndef __ASSEMBLY__
 
 int peripheral_request(unsigned short per, const char *label);
diff --git a/arch/blackfin/cpu/serial.h b/arch/blackfin/include/asm/serial.h
index 92003396683..87a337d1b4e 100644
--- a/arch/blackfin/cpu/serial.h
+++ b/arch/blackfin/include/asm/serial.h
@@ -78,19 +78,31 @@ static inline void serial_early_puts(const char *s)
 #else
 
 .macro serial_early_init
-#ifdef CONFIG_DEBUG_EARLY_SERIAL
-	call _serial_initialize;
+#if defined(CONFIG_DEBUG_EARLY_SERIAL) && !defined(CONFIG_UART_MEM)
+	call __serial_early_init;
 #endif
 .endm
 
 .macro serial_early_set_baud
-#ifdef CONFIG_DEBUG_EARLY_SERIAL
+#if defined(CONFIG_DEBUG_EARLY_SERIAL) && !defined(CONFIG_UART_MEM)
 	R0.L = LO(CONFIG_BAUDRATE);
 	R0.H = HI(CONFIG_BAUDRATE);
-	call _serial_set_baud;
+	call __serial_early_set_baud;
 #endif
 .endm
 
+#if CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS
+#define update_serial_early_string_addr \
+	R1.L = _start; \
+	R1.H = _start; \
+	R0 = R0 - R1; \
+	R1.L = 0; \
+	R1.H = 0x2000; \
+	R0 = R0 + R1;
+#else
+#define update_serial_early_string_addr
+#endif
+
 /* Since we embed the string right into our .text section, we need
  * to find its address.  We do this by getting our PC and adding 2
  * bytes (which is the length of the jump instruction).  Then we
@@ -108,7 +120,8 @@ static inline void serial_early_puts(const char *s)
 	.previous; \
 	R0.L = 7b; \
 	R0.H = 7b; \
-	call _serial_puts;
+	update_serial_early_string_addr \
+	call _uart_early_puts;
 #else
 # define serial_early_puts(str)
 #endif
diff --git a/arch/blackfin/cpu/serial1.h b/arch/blackfin/include/asm/serial1.h
index a20175bc7f3..467d3817f16 100644
--- a/arch/blackfin/cpu/serial1.h
+++ b/arch/blackfin/include/asm/serial1.h
@@ -15,6 +15,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <asm/clock.h>
+
 #define MMR_UART(n) _PASTE_UART(n, UART, DLL)
 #ifdef UART_DLL
 # define UART0_DLL UART_DLL
@@ -230,19 +232,6 @@ static inline void serial_early_do_portmux(void)
 }
 
 __attribute__((always_inline))
-static inline uint32_t uart_sclk(void)
-{
-#if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL)
-	/* We cannot use get_sclk() early on as it uses
-	 * caches in external memory
-	 */
-	return CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV;
-#else
-	return get_sclk();
-#endif
-}
-
-__attribute__((always_inline))
 static inline int uart_init(uint32_t uart_base)
 {
 	/* always enable UART -- avoids anomalies 05000309 and 05000350 */
@@ -275,21 +264,8 @@ static inline int serial_early_uninit(uint32_t uart_base)
 }
 
 __attribute__((always_inline))
-static inline int serial_early_enabled(uint32_t uart_base)
+static inline void serial_set_divisor(uint32_t uart_base, uint16_t divisor)
 {
-	return bfin_read(&pUART->gctl) & UCEN;
-}
-
-__attribute__((always_inline))
-static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)
-{
-	/* Translate from baud into divisor in terms of SCLK.  The
-	 * weird multiplication is to make sure we over sample just
-	 * a little rather than under sample the incoming signals.
-	 */
-	uint16_t divisor = (uart_sclk() + (baud * 8)) / (baud * 16) -
-			ANOMALY_05000230;
-
 	/* Set DLAB in LCR to Access DLL and DLH */
 	ACCESS_LATCH();
 	SSYNC();
@@ -305,6 +281,24 @@ static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)
 }
 
 __attribute__((always_inline))
+static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)
+{
+	/* Translate from baud into divisor in terms of SCLK.  The
+	 * weird multiplication is to make sure we over sample just
+	 * a little rather than under sample the incoming signals.
+	 */
+#if CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS
+	uint16_t divisor = (early_get_uart_clk() + baud * 8) / (baud * 16)
+			- ANOMALY_05000230;
+#else
+	uint16_t divisor = early_division(early_get_uart_clk() + (baud * 8),
+			baud * 16) - ANOMALY_05000230;
+#endif
+
+	serial_set_divisor(uart_base, divisor);
+}
+
+__attribute__((always_inline))
 static inline void serial_early_put_div(uint16_t divisor)
 {
 	uint32_t uart_base = UART_BASE;
diff --git a/arch/blackfin/cpu/serial4.h b/arch/blackfin/include/asm/serial4.h
index 887845c1863..65483960b9c 100644
--- a/arch/blackfin/cpu/serial4.h
+++ b/arch/blackfin/include/asm/serial4.h
@@ -15,6 +15,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <asm/clock.h>
+
 #define MMR_UART(n) _PASTE_UART(n, UART, REVID)
 #define UART_BASE MMR_UART(CONFIG_UART_CONSOLE)
 
@@ -84,20 +86,6 @@ static inline void serial_early_do_portmux(void)
 }
 
 __attribute__((always_inline))
-static inline uint32_t uart_sclk(void)
-{
-#if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL)
-	/* We cannot use get_sclk() early on as it uses caches in
-	 * external memory
-	 */
-	return CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV /
-		CONFIG_SCLK0_DIV;
-#else
-	return get_sclk0();
-#endif
-}
-
-__attribute__((always_inline))
 static inline int uart_init(uint32_t uart_base)
 {
 	/* always enable UART to 8-bit mode */
@@ -127,19 +115,20 @@ static inline int serial_early_uninit(uint32_t uart_base)
 }
 
 __attribute__((always_inline))
-static inline int serial_early_enabled(uint32_t uart_base)
+static inline void serial_set_divisor(uint32_t uart_base, uint16_t divisor)
 {
-	return bfin_read(&pUART->control) & UEN;
+	/* Program the divisor to get the baud rate we want */
+	bfin_write(&pUART->clock, divisor);
+	SSYNC();
 }
 
 __attribute__((always_inline))
 static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)
 {
-	uint32_t divisor = uart_sclk() / (baud * 16);
+	uint16_t divisor = early_division(early_get_uart_clk(), baud * 16);
 
 	/* Program the divisor to get the baud rate we want */
-	bfin_write(&pUART->clock, divisor);
-	SSYNC();
+	serial_set_divisor(uart_base, divisor);
 }
 
 __attribute__((always_inline))
diff --git a/arch/blackfin/include/asm/soft_switch.h b/arch/blackfin/include/asm/soft_switch.h
new file mode 100644
index 00000000000..ff8e44d8be4
--- /dev/null
+++ b/arch/blackfin/include/asm/soft_switch.h
@@ -0,0 +1,18 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __SOFT_SWITCH_H__
+#define __SOFT_SWITCH_H__
+
+#define IO_PORT_A              0
+#define IO_PORT_B              1
+#define IO_PORT_INPUT          0
+#define IO_PORT_OUTPUT         1
+
+int config_switch_bit(int num, int port, int bit, int dir, uchar value);
+#endif
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index ccea3b9fb1c..f1d55470e86 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -231,6 +231,8 @@ static int global_board_data_init(void)
 	bd->bi_sclk = get_sclk();
 	bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
 	bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+	bd->bi_baudrate = (gd->baudrate > 0)
+		? simple_strtoul(gd->baudrate, NULL, 10) : CONFIG_BAUDRATE;
 
 	return 0;
 }
@@ -277,9 +279,9 @@ void board_init_f(ulong bootflag)
 	dcache_enable();
 #endif
 
-#ifdef CONFIG_WATCHDOG
+#ifdef CONFIG_HW_WATCHDOG
 	serial_early_puts("Setting up external watchdog\n");
-	watchdog_init();
+	hw_watchdog_init();
 #endif
 
 #ifdef DEBUG
diff --git a/arch/blackfin/lib/clocks.c b/arch/blackfin/lib/clocks.c
index d852f5ebed8..97795e11ac9 100644
--- a/arch/blackfin/lib/clocks.c
+++ b/arch/blackfin/lib/clocks.c
@@ -7,17 +7,7 @@
  */
 
 #include <common.h>
-#include <asm/blackfin.h>
-
-#ifdef PLL_CTL
-# include <asm/mach-common/bits/pll.h>
-# define pll_is_bypassed() (bfin_read_PLL_STAT() & DF)
-#else
-# include <asm/mach-common/bits/cgu.h>
-# define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP)
-# define bfin_read_PLL_CTL() bfin_read_CGU_CTL()
-# define bfin_read_PLL_DIV() bfin_read_CGU_DIV()
-#endif
+#include <asm/clock.h>
 
 /* Get the voltage input multiplier */
 u_long get_vco(void)
diff --git a/arch/blackfin/lib/string.c b/arch/blackfin/lib/string.c
index 44d8c6d906f..5b7ac0b91ab 100644
--- a/arch/blackfin/lib/string.c
+++ b/arch/blackfin/lib/string.c
@@ -128,10 +128,12 @@ static void dma_calc_size(unsigned long ldst, unsigned long lsrc, size_t count,
 	unsigned long limit;
 
 #ifdef MSIZE
-	limit = 6;
+	/* The max memory DMA memory transfer size is 32 bytes. */
+	limit = 5;
 	*dshift = MSIZE_P;
 #else
-	limit = 3;
+	/* The max memory DMA memory transfer size is 4 bytes. */
+	limit = 2;
 	*dshift = WDSIZE_P;
 #endif
 
@@ -170,7 +172,8 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
 	mod = 1 << bpos;
 
 #ifdef PSIZE
-	dsize |= min(3, bpos) << PSIZE_P;
+	/* The max memory DMA peripheral transfer size is 4 bytes. */
+	dsize |= min(2, bpos) << PSIZE_P;
 #endif
 
 	/* Copy sram functions from sdram to sram */
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index d506d0cc770..56b6512be05 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -78,13 +78,6 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
 	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
 		return 1;
 
-	/* allocate space and init command line */
-	ret = boot_get_cmdline (lmb, &cmd_start, &cmd_end);
-	if (ret) {
-		puts("ERROR with allocation of cmdline\n");
-		goto error;
-	}
-
 	/* allocate space for kernel copy of board info */
 	ret = boot_get_kbd (lmb, &kbd);
 	if (ret) {
@@ -93,14 +86,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
 	}
 	set_clocks_in_mhz(kbd);
 
-	kernel = (void (*)(bd_t *, ulong, ulong, ulong, ulong))images->ep;
-
-	rd_len = images->rd_end - images->rd_start;
-	ret = boot_ramdisk_high (lmb, images->rd_start, rd_len,
-			&initrd_start, &initrd_end);
+	ret = image_setup_linux(images);
 	if (ret)
 		goto error;
 
+	kernel = (void (*)(bd_t *, ulong, ulong, ulong, ulong))images->ep;
+
 	debug("## Transferring control to Linux (at address %08lx) ...\n",
 	      (ulong) kernel);
 
diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
index 883f4d46650..f5cad566861 100644
--- a/arch/microblaze/include/asm/gpio.h
+++ b/arch/microblaze/include/asm/gpio.h
@@ -1,41 +1,15 @@
 #ifndef _ASM_MICROBLAZE_GPIO_H_
 #define _ASM_MICROBLAZE_GPIO_H_
 
-#include <asm/io.h>
+#include <asm-generic/gpio.h>
 
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-	return 0;
-}
+/* Allocation functions */
+extern int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0,
+			   u32 gpio_no1);
+extern int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no);
 
-static inline int gpio_free(unsigned gpio)
-{
-	return 0;
-}
+#define gpio_status()	gpio_info()
+extern void gpio_info(void);
 
-static inline int gpio_direction_input(unsigned gpio)
-{
-	return 0;
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
-	return 0;
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
-	return 0;
-}
-
-static inline int gpio_set_value(unsigned gpio, int value)
-{
-	return 0;
-}
-
-static inline int gpio_is_valid(int number)
-{
-	return 0;
-}
 #endif
 
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 66d21f4ef66..38427090011 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -32,11 +32,12 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[],
+		   bootm_headers_t *images)
 {
 	/* First parameter is mapped to $r5 for kernel boot args */
-	void	(*theKernel) (char *, ulong, ulong);
-	char	*commandline = getenv ("bootargs");
+	void	(*thekernel) (char *, ulong, ulong);
+	char	*commandline = getenv("bootargs");
 	ulong	rd_data_start, rd_data_end;
 
 	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
@@ -51,10 +52,10 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
 		of_flat_tree = images->ft_addr;
 #endif
 
-	theKernel = (void (*)(char *, ulong, ulong))images->ep;
+	thekernel = (void (*)(char *, ulong, ulong))images->ep;
 
 	/* find ramdisk */
-	ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_MICROBLAZE,
+	ret = boot_get_ramdisk(argc, argv, images, IH_ARCH_MICROBLAZE,
 			&rd_data_start, &rd_data_end);
 	if (ret)
 		return 1;
@@ -63,10 +64,19 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
 
 	if (!of_flat_tree && argc > 3)
 		of_flat_tree = (char *)simple_strtoul(argv[3], NULL, 16);
+
+	/* fixup the initrd now that we know where it should be */
+	if (images->rd_start && images->rd_end && of_flat_tree)
+		ret = fdt_initrd(of_flat_tree, images->rd_start,
+				 images->rd_end, 1);
+		if (ret)
+			return 1;
+
 #ifdef DEBUG
-	printf ("## Transferring control to Linux (at address 0x%08lx) " \
-				"ramdisk 0x%08lx, FDT 0x%08lx...\n",
-		(ulong) theKernel, rd_data_start, (ulong) of_flat_tree);
+	printf("## Transferring control to Linux (at address 0x%08lx) ",
+	       (ulong)thekernel);
+	printf("ramdisk 0x%08lx, FDT 0x%08lx...\n",
+	       rd_data_start, (ulong) of_flat_tree);
 #endif
 
 #ifdef XILINX_USE_DCACHE
@@ -78,7 +88,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
 	 * r6: pointer to ramdisk
 	 * r7: pointer to the fdt, followed by the board info data
 	 */
-	theKernel (commandline, rd_data_start, (ulong) of_flat_tree);
+	thekernel(commandline, rd_data_start, (ulong)of_flat_tree);
 	/* does not return */
 
 	return 1;
diff --git a/arch/nds32/include/asm/u-boot-nds32.h b/arch/nds32/include/asm/u-boot-nds32.h
index f3c7b271e97..d22eb5b2966 100644
--- a/arch/nds32/include/asm/u-boot-nds32.h
+++ b/arch/nds32/include/asm/u-boot-nds32.h
@@ -30,11 +30,6 @@
 #define _U_BOOT_NDS32_H_	1
 
 /* for the following variables, see start.S */
-extern char __bss_start[];	/* BSS start relative to _start */
-extern ulong __bss_end;		/* BSS end relative to _start */
-extern char _end[];		/* end of image relative to _start */
-extern void _start(void);	/* start of image relative to _start */
-extern ulong _TEXT_BASE;	/* code start */
 extern ulong IRQ_STACK_START;	/* top of IRQ stack */
 extern ulong FIQ_STACK_START;	/* top of FIQ stack */
 
diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c
index 57af1bee9b2..1157d8c5035 100644
--- a/arch/nds32/lib/board.c
+++ b/arch/nds32/lib/board.c
@@ -36,6 +36,7 @@
 #include <nand.h>
 #include <onenand_uboot.h>
 #include <mmc.h>
+#include <asm/sections.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -300,7 +301,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
 
 	gd->flags |= GD_FLG_RELOC;	/* tell others: relocation done */
 
-	monitor_flash_len = &_end - &_start;
+	monitor_flash_len = (ulong)&_end - (ulong)&_start;
 	debug("monitor flash len: %08lX\n", monitor_flash_len);
 
 	board_init();	/* Setup chipselects */
diff --git a/arch/openrisc/config.mk b/arch/openrisc/config.mk
index 521e73aae6b..01c0f770eae 100644
--- a/arch/openrisc/config.mk
+++ b/arch/openrisc/config.mk
@@ -25,3 +25,5 @@ CROSS_COMPILE ?= or32-elf-
 PLATFORM_CPPFLAGS += -DCONFIG_OPENRISC -D__OR1K__ -ffixed-r10
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000
+
+LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds
diff --git a/board/openrisc/openrisc-generic/u-boot.lds b/arch/openrisc/cpu/u-boot.lds
index 9024f30b30f..d9bb7b7f877 100644
--- a/board/openrisc/openrisc-generic/u-boot.lds
+++ b/arch/openrisc/cpu/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 	 . = ALIGN(4);
 	 .u_boot_list : {
 		KEEP(*(SORT(.u_boot_list*)));
-	 }
+	 } > ram
 
 	.rodata : {
 		*(.rodata);
diff --git a/arch/powerpc/cpu/mpc8220/Makefile b/arch/powerpc/cpu/mpc8220/Makefile
deleted file mode 100644
index b8529efe912..00000000000
--- a/arch/powerpc/cpu/mpc8220/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(CPU).o
-
-START	= start.o
-SOBJS	= io.o fec_dma_tasks.o
-COBJS	= cpu.o cpu_init.o dramSetup.o fec.o i2c.o \
-	  interrupts.o loadtask.o speed.o \
-	  traps.o uart.o pci.o
-
-SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-START	:= $(addprefix $(obj),$(START))
-
-all:	$(obj).depend $(START) $(LIB)
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/arch/powerpc/cpu/mpc8220/config.mk b/arch/powerpc/cpu/mpc8220/config.mk
deleted file mode 100644
index 2c638b5c531..00000000000
--- a/arch/powerpc/cpu/mpc8220/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# (C) Copyright 2003-2010
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-PLATFORM_RELFLAGS += -meabi
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 \
-		     -mstring -mcpu=603e -mmultiple
diff --git a/arch/powerpc/cpu/mpc8220/cpu.c b/arch/powerpc/cpu/mpc8220/cpu.c
deleted file mode 100644
index 64e0526e88d..00000000000
--- a/arch/powerpc/cpu/mpc8220/cpu.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * CPU specific code for the MPC8220 CPUs
- */
-
-#include <common.h>
-#include <watchdog.h>
-#include <command.h>
-#include <mpc8220.h>
-#include <netdev.h>
-#include <asm/processor.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int checkcpu (void)
-{
-	ulong clock = gd->cpu_clk;
-	char buf[32];
-
-	puts ("CPU:   ");
-
-	printf (CPU_ID_STR);
-
-	printf (" (JTAG ID %08lx)", *(vu_long *) (CONFIG_SYS_MBAR + 0x50));
-
-	printf (" at %s MHz\n", strmhz (buf, clock));
-
-	return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
-	volatile gptmr8220_t *gptmr = (volatile gptmr8220_t *) MMAP_GPTMR;
-	ulong msr;
-
-	/* Interrupts and MMU off */
-	__asm__ __volatile__ ("mfmsr    %0":"=r" (msr):);
-
-	msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
-	__asm__ __volatile__ ("mtmsr    %0"::"r" (msr));
-
-	/* Charge the watchdog timer */
-	gptmr->Prescl = 10;
-	gptmr->Count = 1;
-
-	gptmr->Mode = GPT_TMS_SGPIO;
-
-	gptmr->Control = GPT_CTRL_WDEN | GPT_CTRL_CE;
-
-	return 1;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Get timebase clock frequency (like cpu_clk in Hz)
- *
- */
-unsigned long get_tbclk (void)
-{
-	ulong tbclk;
-
-	tbclk = (gd->bus_clk + 3L) / 4L;
-
-	return (tbclk);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
- */
-int cpu_eth_init(bd_t *bis)
-{
-#if defined(CONFIG_MPC8220_FEC)
-	mpc8220_fec_initialize(bis);
-#endif
-	return 0;
-}
diff --git a/arch/powerpc/cpu/mpc8220/cpu_init.c b/arch/powerpc/cpu/mpc8220/cpu_init.c
deleted file mode 100644
index 8f52c7dd0eb..00000000000
--- a/arch/powerpc/cpu/mpc8220/cpu_init.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8220.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Breath some life into the CPU...
- *
- * Set up the memory map,
- * initialize a bunch of registers.
- */
-void cpu_init_f (void)
-{
-	volatile flexbus8220_t *flexbus = (volatile flexbus8220_t *) MMAP_FB;
-	volatile pcfg8220_t *portcfg = (volatile pcfg8220_t *) MMAP_PCFG;
-	volatile xlbarb8220_t *xlbarb = (volatile xlbarb8220_t *) MMAP_XLBARB;
-
-	/* Pointer is writable since we allocated a register for it */
-	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
-
-	/* Clear initial global data */
-	memset ((void *) gd, 0, sizeof (gd_t));
-
-	/* Clear all port configuration */
-	portcfg->pcfg0 = 0;
-	portcfg->pcfg1 = 0;
-	portcfg->pcfg2 = 0;
-	portcfg->pcfg3 = 0;
-	portcfg->pcfg2 = CONFIG_SYS_GP1_PORT2_CONFIG;
-	portcfg->pcfg3 = CONFIG_SYS_PCI_PORT3_CONFIG | CONFIG_SYS_GP2_PORT3_CONFIG;
-
-	/*
-	 * Flexbus Controller: configure chip selects and enable them
-	 */
-#if defined (CONFIG_SYS_CS0_BASE)
-	flexbus->csar0 = CONFIG_SYS_CS0_BASE;
-
-/* Sorcery-C can hang-up after CTRL reg initialization */
-#if defined (CONFIG_SYS_CS0_CTRL)
-	flexbus->cscr0 = CONFIG_SYS_CS0_CTRL;
-#endif
-	flexbus->csmr0 = ((CONFIG_SYS_CS0_MASK - 1) & 0xffff0000) | 1;
-	__asm__ volatile ("sync");
-#endif
-#if defined (CONFIG_SYS_CS1_BASE)
-	flexbus->csar1 = CONFIG_SYS_CS1_BASE;
-	flexbus->cscr1 = CONFIG_SYS_CS1_CTRL;
-	flexbus->csmr1 = ((CONFIG_SYS_CS1_MASK - 1) & 0xffff0000) | 1;
-	__asm__ volatile ("sync");
-#endif
-#if defined (CONFIG_SYS_CS2_BASE)
-	flexbus->csar2 = CONFIG_SYS_CS2_BASE;
-	flexbus->cscr2 = CONFIG_SYS_CS2_CTRL;
-	flexbus->csmr2 = ((CONFIG_SYS_CS2_MASK - 1) & 0xffff0000) | 1;
-	portcfg->pcfg3 |= CONFIG_SYS_CS2_PORT3_CONFIG;
-	__asm__ volatile ("sync");
-#endif
-#if defined (CONFIG_SYS_CS3_BASE)
-	flexbus->csar3 = CONFIG_SYS_CS3_BASE;
-	flexbus->cscr3 = CONFIG_SYS_CS3_CTRL;
-	flexbus->csmr3 = ((CONFIG_SYS_CS3_MASK - 1) & 0xffff0000) | 1;
-	portcfg->pcfg3 |= CONFIG_SYS_CS3_PORT3_CONFIG;
-	__asm__ volatile ("sync");
-#endif
-#if defined (CONFIG_SYS_CS4_BASE)
-	flexbus->csar4 = CONFIG_SYS_CS4_BASE;
-	flexbus->cscr4 = CONFIG_SYS_CS4_CTRL;
-	flexbus->csmr4 = ((CONFIG_SYS_CS4_MASK - 1) & 0xffff0000) | 1;
-	portcfg->pcfg3 |= CONFIG_SYS_CS4_PORT3_CONFIG;
-	__asm__ volatile ("sync");
-#endif
-#if defined (CONFIG_SYS_CS5_BASE)
-	flexbus->csar5 = CONFIG_SYS_CS5_BASE;
-	flexbus->cscr5 = CONFIG_SYS_CS5_CTRL;
-	flexbus->csmr5 = ((CONFIG_SYS_CS5_MASK - 1) & 0xffff0000) | 1;
-	portcfg->pcfg3 |= CONFIG_SYS_CS5_PORT3_CONFIG;
-	__asm__ volatile ("sync");
-#endif
-
-	/* This section of the code cannot place in cpu_init_r(),
-	   it will cause the system to hang */
-	/* enable timebase */
-	xlbarb->addrTenTimeOut = 0x1000;
-	xlbarb->dataTenTimeOut = 0x1000;
-	xlbarb->busActTimeOut = 0x2000;
-
-	xlbarb->config = 0x00002000;
-
-	/* Master Priority Enable */
-	xlbarb->mastPriority = 0;
-	xlbarb->mastPriEn = 0xff;
-}
-
-/*
- * initialize higher level parts of CPU like time base and timers
- */
-int cpu_init_r (void)
-{
-	/* this may belongs to disable interrupt section */
-	/* mask all interrupts */
-	*(vu_long *) 0xf0000700 = 0xfffffc00;
-	*(vu_long *) 0xf0000714 |= 0x0001ffff;
-	*(vu_long *) 0xf0000710 &= ~0x00000f00;
-
-	/* route critical ints to normal ints */
-	*(vu_long *) 0xf0000710 |= 0x00000001;
-
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_MPC8220_FEC)
-	/* load FEC microcode */
-	loadtask (0, 2);
-#endif
-	return (0);
-}
diff --git a/arch/powerpc/cpu/mpc8220/dma.h b/arch/powerpc/cpu/mpc8220/dma.h
deleted file mode 100644
index d06ee631394..00000000000
--- a/arch/powerpc/cpu/mpc8220/dma.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This file is based on code
- * (C) Copyright Motorola, Inc., 2000
- *
- * MPC8220 dma header file
- */
-
-#ifndef __MPC8220_DMA_H
-#define __MPC8220_DMA_H
-
-#include <common.h>
-#include <mpc8220.h>
-
-/* Task number assignment */
-#define FEC_RECV_TASK_NO            0
-#define FEC_XMIT_TASK_NO            1
-
-/*---------------------------------------------------------------------
- * Stuff for Ethernet Tx/Rx tasks
- *---------------------------------------------------------------------
- */
-
-/* Layout of Ethernet controller Parameter SRAM area:
- * ----------------------------------------------------------------
- * 0x00: TBD_BASE, base address of TX BD ring
- * 0x04: TBD_NEXT, address of next TX BD to be processed
- * 0x08: RBD_BASE, base address of RX BD ring
- * 0x0C: RBD_NEXT, address of next RX BD to be processed
- * ---------------------------------------------------------------
- * ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH).
- */
-
-/* base address of SRAM area to store parameters used by Ethernet tasks */
-#define FEC_PARAM_BASE  (MMAP_SRAM + 0x5b00)
-
-/* base address of SRAM area for buffer descriptors */
-#define FEC_BD_BASE     (MMAP_SRAM + 0x5b20)
-
-/*---------------------------------------------------------------------
- * common shortcuts  used  by driver C code
- *---------------------------------------------------------------------
- */
-
-/* Disable SmartDMA task */
-#define DMA_TASK_DISABLE(tasknum)						\
-{										\
-	volatile ushort *tcr = (ushort *)(MMAP_DMA + 0x0000001c + 2 * tasknum); \
-	*tcr = (*tcr) & (~0x8000);						\
-}
-
-/* Enable SmartDMA task */
-#define DMA_TASK_ENABLE(tasknum)						\
-{										\
-	volatile ushort *tcr = (ushort *) (MMAP_DMA + 0x0000001c + 2 * tasknum);\
-	*tcr = (*tcr)  | 0x8000;						\
-}
-
-/* Clear interrupt pending bits */
-#define DMA_CLEAR_IEVENT(tasknum)						\
-{										\
-	struct mpc8220_dma *dma = (struct mpc8220_dma *)MMAP_DMA;		\
-	dma->IntPend = (1 << tasknum);						\
-}
-
-#endif  /* __MPC8220_DMA_H */
diff --git a/arch/powerpc/cpu/mpc8220/dramSetup.c b/arch/powerpc/cpu/mpc8220/dramSetup.c
deleted file mode 100644
index 52cf1333f79..00000000000
--- a/arch/powerpc/cpu/mpc8220/dramSetup.c
+++ /dev/null
@@ -1,752 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale, Inc
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-DESCRIPTION
-Read Dram spd and base on its information to calculate the memory size,
-characteristics to initialize the dram on MPC8220
-*/
-
-#include <common.h>
-#include <mpc8220.h>
-#include "i2cCore.h"
-#include "dramSetup.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define SPD_SIZE	CONFIG_SYS_SDRAM_SPD_SIZE
-#define DRAM_SPD	(CONFIG_SYS_SDRAM_SPD_I2C_ADDR)<<1	/* on Board SPD eeprom */
-#define TOTAL_BANK	CONFIG_SYS_SDRAM_TOTAL_BANKS
-
-int spd_status (volatile i2c8220_t * pi2c, u8 sta_bit, u8 truefalse)
-{
-	int i;
-
-	for (i = 0; i < I2C_POLL_COUNT; i++) {
-		if ((pi2c->sr & sta_bit) == (truefalse ? sta_bit : 0))
-			return (OK);
-	}
-
-	return (ERROR);
-}
-
-int spd_clear (volatile i2c8220_t * pi2c)
-{
-	pi2c->adr = 0;
-	pi2c->fdr = 0;
-	pi2c->cr = 0;
-	pi2c->sr = 0;
-
-	return (OK);
-}
-
-int spd_stop (volatile i2c8220_t * pi2c)
-{
-	pi2c->cr &= ~I2C_CTL_STA;	/* Generate stop signal         */
-	if (spd_status (pi2c, I2C_STA_BB, 0) != OK)
-		return ERROR;
-
-	return (OK);
-}
-
-int spd_readbyte (volatile i2c8220_t * pi2c, u8 * readb, int *index)
-{
-	pi2c->sr &= ~I2C_STA_IF;	/* Clear Interrupt Bit          */
-	*readb = pi2c->dr;	/* Read a byte                  */
-
-	/*
-	   Set I2C_CTRL_TXAK will cause Transfer pending and
-	   set I2C_CTRL_STA will cause Interrupt pending
-	 */
-	if (*index != 2) {
-		if (spd_status (pi2c, I2C_STA_CF, 1) != OK)	/* Transfer not complete?       */
-			return ERROR;
-	}
-
-	if (*index != 1) {
-		if (spd_status (pi2c, I2C_STA_IF, 1) != OK)
-			return ERROR;
-	}
-
-	return (OK);
-}
-
-int readSpdData (u8 * spdData)
-{
-	volatile i2c8220_t *pi2cReg;
-	volatile pcfg8220_t *pcfg;
-	u8 slvAdr = DRAM_SPD;
-	u8 Tmp;
-	int Length = SPD_SIZE;
-	int i = 0;
-
-	/* Enable Port Configuration for SDA and SDL signals */
-	pcfg = (volatile pcfg8220_t *) (MMAP_PCFG);
-	__asm__ ("sync");
-	pcfg->pcfg3 &= ~CONFIG_SYS_I2C_PORT3_CONFIG;
-	__asm__ ("sync");
-
-	/* Points the structure to I2c mbar memory offset */
-	pi2cReg = (volatile i2c8220_t *) (MMAP_I2C);
-
-
-	/* Clear FDR, ADR, SR and CR reg */
-	pi2cReg->adr = 0;
-	pi2cReg->fdr = 0;
-	pi2cReg->cr = 0;
-	pi2cReg->sr = 0;
-
-	/* Set for fix XLB Bus Frequency */
-	switch (gd->bus_clk) {
-	case 60000000:
-		pi2cReg->fdr = 0x15;
-		break;
-	case 70000000:
-		pi2cReg->fdr = 0x16;
-		break;
-	case 80000000:
-		pi2cReg->fdr = 0x3a;
-		break;
-	case 90000000:
-		pi2cReg->fdr = 0x17;
-		break;
-	case 100000000:
-		pi2cReg->fdr = 0x3b;
-		break;
-	case 110000000:
-		pi2cReg->fdr = 0x18;
-		break;
-	case 120000000:
-		pi2cReg->fdr = 0x19;
-		break;
-	case 130000000:
-		pi2cReg->fdr = 0x1a;
-		break;
-	}
-
-	pi2cReg->adr = CONFIG_SYS_I2C_SLAVE<<1;
-
-	pi2cReg->cr = I2C_CTL_EN;	/* Set Enable         */
-
-	/*
-	   The I2C bus should be in Idle state. If the bus is busy,
-	   clear the STA bit in control register
-	 */
-	if (spd_status (pi2cReg, I2C_STA_BB, 0) != OK) {
-		if ((pi2cReg->cr & I2C_CTL_STA) == I2C_CTL_STA)
-			pi2cReg->cr &= ~I2C_CTL_STA;
-
-		/* Check again if it is still busy, return error if found */
-		if (spd_status (pi2cReg, I2C_STA_BB, 1) == OK)
-			return ERROR;
-	}
-
-	pi2cReg->cr |= I2C_CTL_TX;	/* Enable the I2c for TX, Ack   */
-	pi2cReg->cr |= I2C_CTL_STA;	/* Generate start signal        */
-
-	if (spd_status (pi2cReg, I2C_STA_BB, 1) != OK)
-		return ERROR;
-
-
-	/* Write slave address */
-	pi2cReg->sr &= ~I2C_STA_IF;	/* Clear Interrupt              */
-	pi2cReg->dr = slvAdr;	/* Write a byte                 */
-
-	if (spd_status (pi2cReg, I2C_STA_CF, 1) != OK) {	/* Transfer not complete?       */
-		spd_stop (pi2cReg);
-		return ERROR;
-	}
-
-	if (spd_status (pi2cReg, I2C_STA_IF, 1) != OK) {
-		spd_stop (pi2cReg);
-		return ERROR;
-	}
-
-
-	/* Issue the offset to start */
-	pi2cReg->sr &= ~I2C_STA_IF;	/* Clear Interrupt              */
-	pi2cReg->dr = 0;	/* Write a byte                 */
-
-	if (spd_status (pi2cReg, I2C_STA_CF, 1) != OK) {	/* Transfer not complete?       */
-		spd_stop (pi2cReg);
-		return ERROR;
-	}
-
-	if (spd_status (pi2cReg, I2C_STA_IF, 1) != OK) {
-		spd_stop (pi2cReg);
-		return ERROR;
-	}
-
-
-	/* Set repeat start */
-	pi2cReg->cr |= I2C_CTL_RSTA;	/* Repeat Start                 */
-
-	pi2cReg->sr &= ~I2C_STA_IF;	/* Clear Interrupt              */
-	pi2cReg->dr = slvAdr | 1;	/* Write a byte                 */
-
-	if (spd_status (pi2cReg, I2C_STA_CF, 1) != OK) {	/* Transfer not complete?       */
-		spd_stop (pi2cReg);
-		return ERROR;
-	}
-
-	if (spd_status (pi2cReg, I2C_STA_IF, 1) != OK) {
-		spd_stop (pi2cReg);
-		return ERROR;
-	}
-
-	if (((pi2cReg->sr & 0x07) == 0x07) || (pi2cReg->sr & 0x01))
-		return ERROR;
-
-	pi2cReg->cr &= ~I2C_CTL_TX;	/* Set receive mode             */
-
-	if (((pi2cReg->sr & 0x07) == 0x07) || (pi2cReg->sr & 0x01))
-		return ERROR;
-
-	/* Dummy Read */
-	if (spd_readbyte (pi2cReg, &Tmp, &i) != OK) {
-		spd_stop (pi2cReg);
-		return ERROR;
-	}
-
-	i = 0;
-	while (Length) {
-		if (Length == 2)
-			pi2cReg->cr |= I2C_CTL_TXAK;
-
-		if (Length == 1)
-			pi2cReg->cr &= ~I2C_CTL_STA;
-
-		if (spd_readbyte (pi2cReg, spdData, &Length) != OK) {
-			return spd_stop (pi2cReg);
-		}
-		i++;
-		Length--;
-		spdData++;
-	}
-
-	/* Stop the service */
-	spd_stop (pi2cReg);
-
-	return OK;
-}
-
-int getBankInfo (int bank, draminfo_t * pBank)
-{
-	int status;
-	int checksum;
-	int count;
-	u8 spdData[SPD_SIZE];
-
-
-	if (bank > 2 || pBank == 0) {
-		/* illegal values */
-		return (-42);
-	}
-
-	status = readSpdData (&spdData[0]);
-	if (status < 0)
-		return (-1);
-
-	/* check the checksum */
-	for (count = 0, checksum = 0; count < LOC_CHECKSUM; count++)
-		checksum += spdData[count];
-
-	checksum = checksum - ((checksum / 256) * 256);
-
-	if (checksum != spdData[LOC_CHECKSUM])
-		return (-2);
-
-	/* Get the memory type */
-	if (!
-	    ((spdData[LOC_TYPE] == TYPE_DDR)
-	     || (spdData[LOC_TYPE] == TYPE_SDR)))
-		/* not one of the types we support */
-		return (-3);
-
-	pBank->type = spdData[LOC_TYPE];
-
-	/* Set logical banks */
-	pBank->banks = spdData[LOC_LOGICAL_BANKS];
-
-	/* Check that we have enough physical banks to cover the bank we are
-	 * figuring out.  Odd-numbered banks correspond to the second bank
-	 * on the device.
-	 */
-	if (bank & 1) {
-		/* Second bank of a "device" */
-		if (spdData[LOC_PHYS_BANKS] < 2)
-			/* this bank doesn't exist on the "device" */
-			return (-4);
-
-		if (spdData[LOC_ROWS] & 0xf0)
-			/* Two asymmetric banks */
-			pBank->rows = spdData[LOC_ROWS] >> 4;
-		else
-			pBank->rows = spdData[LOC_ROWS];
-
-		if (spdData[LOC_COLS] & 0xf0)
-			/* Two asymmetric banks */
-			pBank->cols = spdData[LOC_COLS] >> 4;
-		else
-			pBank->cols = spdData[LOC_COLS];
-	} else {
-		/* First bank of a "device" */
-		pBank->rows = spdData[LOC_ROWS];
-		pBank->cols = spdData[LOC_COLS];
-	}
-
-	pBank->width = spdData[LOC_WIDTH_HIGH] << 8 | spdData[LOC_WIDTH_LOW];
-	pBank->bursts = spdData[LOC_BURSTS];
-	pBank->CAS = spdData[LOC_CAS];
-	pBank->CS = spdData[LOC_CS];
-	pBank->WE = spdData[LOC_WE];
-	pBank->Trp = spdData[LOC_Trp];
-	pBank->Trcd = spdData[LOC_Trcd];
-	pBank->buffered = spdData[LOC_Buffered] & 1;
-	pBank->refresh = spdData[LOC_REFRESH];
-
-	return (0);
-}
-
-
-/* checkMuxSetting -- given a row/column device geometry, return a mask
- *                    of the valid DRAM controller addr_mux settings for
- *                    that geometry.
- *
- *  Arguments:        u8 rows:     number of row addresses in this device
- *                    u8 columns:  number of column addresses in this device
- *
- *  Returns:          a mask of the allowed addr_mux settings for this
- *                    geometry.  Each bit in the mask represents a
- *                    possible addr_mux settings (for example, the
- *                    (1<<2) bit in the mask represents the 0b10 setting)/
- *
- */
-u8 checkMuxSetting (u8 rows, u8 columns)
-{
-	muxdesc_t *pIdx, *pMux;
-	u8 mask;
-	int lrows, lcolumns;
-	u32 mux[4] = { 0x00080c04, 0x01080d03, 0x02080e02, 0xffffffff };
-
-	/* Setup MuxDescriptor in SRAM space */
-	/* MUXDESC AddressRuns [] = {
-	   { 0, 8, 12, 4 },         / setting, columns, rows, extra columns /
-	   { 1, 8, 13, 3 },         / setting, columns, rows, extra columns /
-	   { 2, 8, 14, 2 },         / setting, columns, rows, extra columns /
-	   { 0xff }                 / list terminator /
-	   }; */
-
-	pIdx = (muxdesc_t *) & mux[0];
-
-	/* Check rows x columns against each possible address mux setting */
-	for (pMux = pIdx, mask = 0;; pMux++) {
-		lrows = rows;
-		lcolumns = columns;
-
-		if (pMux->MuxValue == 0xff)
-			break;	/* end of list */
-
-		/* For a given mux setting, since we want all the memory in a
-		 * device to be contiguous, we want the device "use up" the
-		 * address lines such that there are no extra column or row
-		 * address lines on the device.
-		 */
-
-		lcolumns -= pMux->Columns;
-		if (lcolumns < 0)
-			/* Not enough columns to get to the rows */
-			continue;
-
-		lrows -= pMux->Rows;
-		if (lrows > 0)
-			/* we have extra rows left -- can't do that! */
-			continue;
-
-		/* At this point, we either have to have used up all the
-		 * rows or we have to have no columns left.
-		 */
-
-		if (lcolumns != 0 && lrows != 0)
-			/* rows AND columns are left.  Bad! */
-			continue;
-
-		lcolumns -= pMux->MoreColumns;
-
-		if (lcolumns <= 0)
-			mask |= (1 << pMux->MuxValue);
-	}
-
-	return (mask);
-}
-
-
-u32 dramSetup (void)
-{
-	draminfo_t DramInfo[TOTAL_BANK];
-	draminfo_t *pDramInfo;
-	u32 size, temp, cfg_value, mode_value, refresh;
-	u8 *ptr;
-	u8 bursts, Trp, Trcd, type, buffered;
-	u8 muxmask, rows, columns;
-	int count, banknum;
-	u32 *prefresh, *pIdx;
-	u32 refrate[8] = { 15625, 3900, 7800, 31300,
-		62500, 125000, 0xffffffff, 0xffffffff
-	};
-	volatile sysconf8220_t *sysconf;
-	volatile memctl8220_t *memctl;
-
-	sysconf = (volatile sysconf8220_t *) MMAP_MBAR;
-	memctl = (volatile memctl8220_t *) MMAP_MEMCTL;
-
-	/* Set everything in the descriptions to zero */
-	ptr = (u8 *) & DramInfo[0];
-	for (count = 0; count < sizeof (DramInfo); count++)
-		*ptr++ = 0;
-
-	for (banknum = 0; banknum < TOTAL_BANK; banknum++)
-		sysconf->cscfg[banknum];
-
-	/* Descriptions of row/column address muxing for various
-	 * addr_mux settings.
-	 */
-
-	pIdx = prefresh = (u32 *) & refrate[0];
-
-	/* Get all the info for all three logical banks */
-	bursts = 0xff;
-	Trp = 0;
-	Trcd = 0;
-	type = 0;
-	buffered = 0xff;
-	refresh = 0xffffffff;
-	muxmask = 0xff;
-
-	/* Two bank, CS0 and CS1 */
-	for (banknum = 0, pDramInfo = &DramInfo[0];
-	     banknum < TOTAL_BANK; banknum++, pDramInfo++) {
-		pDramInfo->ordinal = banknum;	/* initial sorting */
-		if (getBankInfo (banknum, pDramInfo) < 0)
-			continue;
-
-		/* get cumulative parameters of all three banks */
-		if (type && pDramInfo->type != type)
-			return 0;
-
-		type = pDramInfo->type;
-		rows = pDramInfo->rows;
-		columns = pDramInfo->cols;
-
-		/* This chip only supports 13 DRAM memory lines, but some devices
-		 * have 14 rows.  To deal with this, ignore the 14th address line
-		 * by limiting the number of rows (and columns) to 13.  This will
-		 * mean that for 14-row devices we will only be able to use
-		 * half of the memory, but it's better than nothing.
-		 */
-		if (rows > 13)
-			rows = 13;
-		if (columns > 13)
-			columns = 13;
-
-		pDramInfo->size =
-			((1 << (rows + columns)) * pDramInfo->width);
-		pDramInfo->size *= pDramInfo->banks;
-		pDramInfo->size >>= 3;
-
-		/* figure out which addr_mux configurations will support this device */
-		muxmask &= checkMuxSetting (rows, columns);
-		if (muxmask == 0)
-			return 0;
-
-		buffered = pDramInfo->buffered;
-		bursts &= pDramInfo->bursts;	/* union of all bursts */
-		if (pDramInfo->Trp > Trp)	/* worst case (longest) Trp */
-			Trp = pDramInfo->Trp;
-
-		if (pDramInfo->Trcd > Trcd)	/* worst case (longest) Trcd */
-			Trcd = pDramInfo->Trcd;
-
-		prefresh = pIdx;
-		/* worst case (shortest) Refresh period */
-		if (refresh > prefresh[pDramInfo->refresh & 7])
-			refresh = prefresh[pDramInfo->refresh & 7];
-
-	}			/* for loop */
-
-
-	/* We only allow a burst length of 8! */
-	if (!(bursts & 8))
-		bursts = 8;
-
-	/* Sort the devices.  In order to get each chip select region
-	 * aligned properly, put the biggest device at the lowest address.
-	 * A simple bubble sort will do the trick.
-	 */
-	for (banknum = 0, pDramInfo = &DramInfo[0];
-	     banknum < TOTAL_BANK; banknum++, pDramInfo++) {
-		int i;
-
-		for (i = 0; i < TOTAL_BANK; i++) {
-			if (pDramInfo->size < DramInfo[i].size &&
-			    pDramInfo->ordinal < DramInfo[i].ordinal) {
-				/* If the current bank is smaller, but if the ordinal is also
-				 * smaller, swap the ordinals
-				 */
-				u8 temp8;
-
-				temp8 = DramInfo[i].ordinal;
-				DramInfo[i].ordinal = pDramInfo->ordinal;
-				pDramInfo->ordinal = temp8;
-			}
-		}
-	}
-
-
-	/* Now figure out the base address for each bank.  While
-	 * we're at it, figure out how much memory there is.
-	 *
-	 */
-	size = 0;
-	for (banknum = 0; banknum < TOTAL_BANK; banknum++) {
-		int i;
-
-		for (i = 0; i < TOTAL_BANK; i++) {
-			if (DramInfo[i].ordinal == banknum
-			    && DramInfo[i].size != 0) {
-				DramInfo[i].base = size;
-				size += DramInfo[i].size;
-			}
-		}
-	}
-
-	/* Set up the Drive Strength register */
-	sysconf->sdramds = CONFIG_SYS_SDRAM_DRIVE_STRENGTH;
-
-	/* ********************** Cfg 1 ************************* */
-
-	/* Set the single read to read/write/precharge delay */
-	cfg_value = CFG1_SRD2RWP ((type == TYPE_DDR) ? 7 : 0xb);
-
-	/* Set the single write to read/write/precharge delay.
-	 * This may or may not be correct.  The controller spec
-	 * says "tWR", but "tWR" does not appear in the SPD.  It
-	 * always seems to be 15nsec for the class of device we're
-	 * using, which turns out to be 2 clock cycles at 133MHz,
-	 * so that's what we're going to use.
-	 *
-	 * HOWEVER, because of a bug in the controller, for DDR
-	 * we need to set this to be the same as the value
-	 * calculated for bwt2rwp.
-	 */
-	cfg_value |= CFG1_SWT2RWP ((type == TYPE_DDR) ? 7 : 2);
-
-	/* Set the Read CAS latency.  We're going to use a CL of
-	 * 2.5 for DDR and 2 SDR.
-	 */
-	cfg_value |= CFG1_RLATENCY ((type == TYPE_DDR) ? 7 : 2);
-
-
-	/* Set the Active to Read/Write delay.  This depends
-	 * on Trcd which is reported as nanoseconds times 4.
-	 * We want to calculate Trcd (in nanoseconds) times XLB clock (in Hz)
-	 * which gives us a dimensionless quantity.  Play games with
-	 * the divisions so we don't run out of dynamic ranges.
-	 */
-	/* account for megaherz and the times 4 */
-	temp = (Trcd * (gd->bus_clk / 1000000)) / 4;
-
-	/* account for nanoseconds and round up, with a minimum value of 2 */
-	temp = ((temp + 999) / 1000) - 1;
-	if (temp < 2)
-		temp = 2;
-
-	cfg_value |= CFG1_ACT2WR (temp);
-
-	/* Set the precharge to active delay.  This depends
-	 * on Trp which is reported as nanoseconds times 4.
-	 * We want to calculate Trp (in nanoseconds) times XLB clock (in Hz)
-	 * which gives us a dimensionless quantity.  Play games with
-	 * the divisions so we don't run out of dynamic ranges.
-	 */
-	/* account for megaherz and the times 4 */
-	temp = (Trp * (gd->bus_clk / 1000000)) / 4;
-
-	/* account for nanoseconds and round up, then subtract 1, with a
-	 * minumum value of 1 and a maximum value of 7.
-	 */
-	temp = (((temp + 999) / 1000) - 1) & 7;
-	if (temp < 1)
-		temp = 1;
-
-	cfg_value |= CFG1_PRE2ACT (temp);
-
-	/* Set refresh to active delay.  This depends
-	 * on Trfc which is not reported in the SPD.
-	 * We'll use a nominal value of 75nsec which is
-	 * what the controller spec uses.
-	 */
-	temp = (75 * (gd->bus_clk / 1000000));
-	/* account for nanoseconds and round up, then subtract 1 */
-	cfg_value |= CFG1_REF2ACT (((temp + 999) / 1000) - 1);
-
-	/* Set the write latency, using the values given in the controller spec */
-	cfg_value |= CFG1_WLATENCY ((type == TYPE_DDR) ? 3 : 0);
-	memctl->cfg1 = cfg_value;	/* cfg 1 */
-	asm volatile ("sync");
-
-
-	/* ********************** Cfg 2 ************************* */
-
-	/* Set the burst read to read/precharge delay */
-	cfg_value = CFG2_BRD2RP ((type == TYPE_DDR) ? 5 : 8);
-
-	/* Set the burst write to read/precharge delay.  Semi-magic numbers
-	 * based on the controller spec recommendations, assuming tWR is
-	 * two clock cycles.
-	 */
-	cfg_value |= CFG2_BWT2RWP ((type == TYPE_DDR) ? 7 : 10);
-
-	/* Set the Burst read to write delay.  Semi-magic numbers
-	 * based on the DRAM controller documentation.
-	 */
-	cfg_value |= CFG2_BRD2WT ((type == TYPE_DDR) ? 7 : 0xb);
-
-	/* Set the burst length -- must be 8!! Well, 7, actually, becuase
-	 * it's burst lenght minus 1.
-	 */
-	cfg_value |= CFG2_BURSTLEN (7);
-	memctl->cfg2 = cfg_value;	/* cfg 2 */
-	asm volatile ("sync");
-
-
-	/* ********************** mode ************************* */
-
-	/* Set enable bit, CKE high/low bits, and the DDR/SDR mode bit,
-	 * disable automatic refresh.
-	 */
-	cfg_value = CTL_MODE_ENABLE | CTL_CKE_HIGH |
-		((type == TYPE_DDR) ? CTL_DDR_MODE : 0);
-
-	/* Set the address mux based on whichever setting(s) is/are common
-	 * to all the devices we have.  If there is more than one, choose
-	 * one arbitrarily.
-	 */
-	if (muxmask & 0x4)
-		cfg_value |= CTL_ADDRMUX (2);
-	else if (muxmask & 0x2)
-		cfg_value |= CTL_ADDRMUX (1);
-	else
-		cfg_value |= CTL_ADDRMUX (0);
-
-	/* Set the refresh interval. */
-	temp = ((refresh * (gd->bus_clk / 1000000)) / (1000 * 64)) - 1;
-	cfg_value |= CTL_REFRESH_INTERVAL (temp);
-
-	/* Set buffered/non-buffered memory */
-	if (buffered)
-		cfg_value |= CTL_BUFFERED;
-
-	memctl->ctrl = cfg_value;	/* ctrl */
-	asm volatile ("sync");
-
-	if (type == TYPE_DDR) {
-		/* issue precharge all */
-		temp = cfg_value | CTL_PRECHARGE_CMD;
-		memctl->ctrl = temp;	/* ctrl */
-		asm volatile ("sync");
-	}
-
-
-	/* Set up mode value for CAS latency */
-#if (CONFIG_SYS_SDRAM_CAS_LATENCY==5) /* CL=2.5 */
-	mode_value = (MODE_MODE | MODE_BURSTLEN (MODE_BURSTLEN_8) |
-		MODE_BT_SEQUENTIAL | MODE_CL (MODE_CL_2p5) | MODE_CMD);
-#else
-	mode_value = (MODE_MODE | MODE_BURSTLEN (MODE_BURSTLEN_8) |
-		      MODE_BT_SEQUENTIAL | MODE_CL (MODE_CL_2) | MODE_CMD);
-#endif
-	asm volatile ("sync");
-
-	/* Write Extended Mode  - enable DLL */
-	if (type == TYPE_DDR) {
-		temp = MODE_EXTENDED | MODE_X_DLL_ENABLE |
-			MODE_X_DS_NORMAL | MODE_CMD;
-		memctl->mode = (temp >> 16);	/* mode */
-		asm volatile ("sync");
-
-		/* Write Mode - reset DLL, set CAS latency */
-		temp = mode_value | MODE_OPMODE (MODE_OPMODE_RESETDLL);
-		memctl->mode = (temp >> 16);	/* mode */
-		asm volatile ("sync");
-	}
-
-	/* Program the chip selects. */
-	for (banknum = 0; banknum < TOTAL_BANK; banknum++) {
-		if (DramInfo[banknum].size != 0) {
-			u32 mask;
-			int i;
-
-			for (i = 0, mask = 1; i < 32; mask <<= 1, i++) {
-				if (DramInfo[banknum].size & mask)
-					break;
-			}
-			temp = (DramInfo[banknum].base & 0xfff00000) | (i -
-									1);
-
-			sysconf->cscfg[banknum] = temp;
-			asm volatile ("sync");
-		}
-	}
-
-	/* Wait for DLL lock */
-	udelay (200);
-
-	temp = cfg_value | CTL_PRECHARGE_CMD;	/* issue precharge all */
-	memctl->ctrl = temp;	/* ctrl */
-	asm volatile ("sync");
-
-	temp = cfg_value | CTL_REFRESH_CMD;	/* issue precharge all */
-	memctl->ctrl = temp;	/* ctrl */
-	asm volatile ("sync");
-
-	memctl->ctrl = temp;	/* ctrl */
-	asm volatile ("sync");
-
-	/* Write Mode - DLL normal */
-	temp = mode_value | MODE_OPMODE (MODE_OPMODE_NORMAL);
-	memctl->mode = (temp >> 16);	/* mode */
-	asm volatile ("sync");
-
-	/* Enable refresh, enable DQS's (if DDR), and lock the control register */
-	cfg_value &= ~CTL_MODE_ENABLE;	/* lock register */
-	cfg_value |= CTL_REFRESH_ENABLE;	/* enable refresh */
-
-	if (type == TYPE_DDR)
-		cfg_value |= CTL_DQSOEN (0xf);	/* enable DQS's for DDR */
-
-	memctl->ctrl = cfg_value;	/* ctrl */
-	asm volatile ("sync");
-
-	return size;
-}
diff --git a/arch/powerpc/cpu/mpc8220/dramSetup.h b/arch/powerpc/cpu/mpc8220/dramSetup.h
deleted file mode 100644
index 3b64e088cd8..00000000000
--- a/arch/powerpc/cpu/mpc8220/dramSetup.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * dramSetup.h
- *
- * Prototypes, etc. for the Motorola MPC8220
- * embedded cpu chips
- *
- * 2004 (c) Freescale, Inc.
- * Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __INCdramsetuph
-#define __INCdramsetuph
-#ifndef __ASSEMBLY__
-/* Where various things are in the SPD */
-#define LOC_TYPE                    2
-#define LOC_CHECKSUM                63
-#define LOC_PHYS_BANKS              5
-#define LOC_LOGICAL_BANKS           17
-#define LOC_ROWS                    3
-#define LOC_COLS                    4
-#define LOC_WIDTH_HIGH              7
-#define LOC_WIDTH_LOW               6
-#define LOC_REFRESH                 12
-#define LOC_BURSTS                  16
-#define LOC_CAS                     18
-#define LOC_CS                      19
-#define LOC_WE                      20
-#define LOC_Tcyc                    9
-#define LOC_Tac                     10
-#define LOC_Trp                     27
-#define LOC_Trrd                    28
-#define LOC_Trcd                    29
-#define LOC_Tras                    30
-#define LOC_Buffered                21
-/* Types of memory the SPD can tell us about.
- * We can actually only use SDRAM and DDR.
- */
-#define TYPE_DRAM                   1	/* plain old dram */
-#define TYPE_EDO                    2	/* EDO dram */
-#define TYPE_Nibble                 3	/* serial nibble memory */
-#define TYPE_SDR                    4	/* SDRAM */
-#define TYPE_ROM                    5	/*  */
-#define TYPE_SGRRAM                 6	/* graphics memory */
-#define TYPE_DDR                    7	/* DDR sdram */
-#define SDRAMDS_MASK        0x3	/* each field is 2 bits wide */
-#define SDRAMDS_SBE_SHIFT     8	/* Clock enable drive strength */
-#define SDRAMDS_SBC_SHIFT     6	/* Clocks drive strength */
-#define SDRAMDS_SBA_SHIFT     4	/* Address drive strength */
-#define SDRAMDS_SBS_SHIFT     2	/* SDR DQS drive strength */
-#define SDRAMDS_SBD_SHIFT     0	/* Data and DQS drive strength */
-#define  DRIVE_STRENGTH_HIGH 0
-#define  DRIVE_STRENGTH_MED  1
-#define  DRIVE_STRENGTH_LOW  2
-#define  DRIVE_STRENGTH_OFF  3
-
-#define OK      0
-#define ERROR   -1
-/* Structure to hold information about address muxing. */
-	typedef struct tagMuxDescriptor {
-	u8 MuxValue;
-	u8 Columns;
-	u8 Rows;
-	u8 MoreColumns;
-} muxdesc_t;
-
-/* Structure to define one physical bank of
- * memory.  Note that dram size in bytes is
- * (2^^(rows+columns)) * width * banks / 8
-*/
-typedef struct tagDramInfo {
-	u32 size;		/* size in bytes */
-	u32 base;		/* base address */
-	u8 ordinal;		/* where in the memory map will we put this */
-	u8 type;
-	u8 rows;
-	u8 cols;
-	u16 width;		/* width of each chip in bits */
-	u8 banks;		/* number of chips, aka logical banks */
-	u8 bursts;		/* bit-encoded allowable burst length */
-	u8 CAS;			/* bit-encoded CAS latency values */
-	u8 CS;			/* bit-encoded CS latency values */
-	u8 WE;			/* bit-encoded WE latency values */
-	u8 Trp;			/* bit-encoded row precharge time */
-	u8 Trcd;		/* bit-encoded RAS to CAS delay */
-	u8 buffered;		/* buffered or not */
-	u8 refresh;		/* encoded refresh rate */
-} draminfo_t;
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __INCdramsetuph */
diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c
deleted file mode 100644
index 43fa802ca96..00000000000
--- a/arch/powerpc/cpu/mpc8220/fec.c
+++ /dev/null
@@ -1,961 +0,0 @@
-/*
- * (C) Copyright 2003-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This file is based on mpc4200fec.c,
- * (C) Copyright Motorola, Inc., 2000
- */
-
-#include <common.h>
-#include <mpc8220.h>
-#include <malloc.h>
-#include <net.h>
-#include <miiphy.h>
-#include "dma.h"
-#include "fec.h"
-
-#undef  DEBUG
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_MPC8220_FEC)
-
-#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
-#error "CONFIG_MII has to be defined!"
-#endif
-
-#ifdef DEBUG
-static void tfifo_print (char *devname, mpc8220_fec_priv * fec);
-static void rfifo_print (char *devname, mpc8220_fec_priv * fec);
-#endif /* DEBUG */
-
-typedef struct {
-	u8 data[1500];		/* actual data */
-	int length;		/* actual length */
-	int used;		/* buffer in use or not */
-	u8 head[16];		/* MAC header(6 + 6 + 2) + 2(aligned) */
-} NBUF;
-
-int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal);
-int fec8220_miiphy_write (const char *devname, u8 phyAddr, u8 regAddr, u16 data);
-
-/********************************************************************/
-#ifdef DEBUG
-static void mpc8220_fec_phydump (char *devname)
-{
-	u16 phyStatus, i;
-	u8 phyAddr = CONFIG_PHY_ADDR;
-	u8 reg_mask[] = {
-#if CONFIG_PHY_TYPE == 0x79c874 /* AMD Am79C874 */
-		/* regs to print: 0...7, 16...19, 21, 23, 24 */
-		1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
-		1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0,
-#else
-		/* regs to print: 0...8, 16...20 */
-		1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
-		1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-#endif
-	};
-
-	for (i = 0; i < 32; i++) {
-		if (reg_mask[i]) {
-			miiphy_read (devname, phyAddr, i, &phyStatus);
-			printf ("Mii reg %d: 0x%04x\n", i, phyStatus);
-		}
-	}
-}
-#endif
-
-/********************************************************************/
-static int mpc8220_fec_rbd_init (mpc8220_fec_priv * fec)
-{
-	int ix;
-	char *data;
-	static int once = 0;
-
-	for (ix = 0; ix < FEC_RBD_NUM; ix++) {
-		if (!once) {
-			data = (char *) malloc (FEC_MAX_PKT_SIZE);
-			if (data == NULL) {
-				printf ("RBD INIT FAILED\n");
-				return -1;
-			}
-			fec->rbdBase[ix].dataPointer = (u32) data;
-		}
-		fec->rbdBase[ix].status = FEC_RBD_EMPTY;
-		fec->rbdBase[ix].dataLength = 0;
-	}
-	once++;
-
-	/*
-	 * have the last RBD to close the ring
-	 */
-	fec->rbdBase[ix - 1].status |= FEC_RBD_WRAP;
-	fec->rbdIndex = 0;
-
-	return 0;
-}
-
-/********************************************************************/
-static void mpc8220_fec_tbd_init (mpc8220_fec_priv * fec)
-{
-	int ix;
-
-	for (ix = 0; ix < FEC_TBD_NUM; ix++) {
-		fec->tbdBase[ix].status = 0;
-	}
-
-	/*
-	 * Have the last TBD to close the ring
-	 */
-	fec->tbdBase[ix - 1].status |= FEC_TBD_WRAP;
-
-	/*
-	 * Initialize some indices
-	 */
-	fec->tbdIndex = 0;
-	fec->usedTbdIndex = 0;
-	fec->cleanTbdNum = FEC_TBD_NUM;
-}
-
-/********************************************************************/
-static void mpc8220_fec_rbd_clean (mpc8220_fec_priv * fec, FEC_RBD * pRbd)
-{
-	/*
-	 * Reset buffer descriptor as empty
-	 */
-	if ((fec->rbdIndex) == (FEC_RBD_NUM - 1))
-		pRbd->status = (FEC_RBD_WRAP | FEC_RBD_EMPTY);
-	else
-		pRbd->status = FEC_RBD_EMPTY;
-
-	pRbd->dataLength = 0;
-
-	/*
-	 * Now, we have an empty RxBD, restart the SmartDMA receive task
-	 */
-	DMA_TASK_ENABLE (FEC_RECV_TASK_NO);
-
-	/*
-	 * Increment BD count
-	 */
-	fec->rbdIndex = (fec->rbdIndex + 1) % FEC_RBD_NUM;
-}
-
-/********************************************************************/
-static void mpc8220_fec_tbd_scrub (mpc8220_fec_priv * fec)
-{
-	FEC_TBD *pUsedTbd;
-
-#ifdef DEBUG
-	printf ("tbd_scrub: fec->cleanTbdNum = %d, fec->usedTbdIndex = %d\n",
-		fec->cleanTbdNum, fec->usedTbdIndex);
-#endif
-
-	/*
-	 * process all the consumed TBDs
-	 */
-	while (fec->cleanTbdNum < FEC_TBD_NUM) {
-		pUsedTbd = &fec->tbdBase[fec->usedTbdIndex];
-		if (pUsedTbd->status & FEC_TBD_READY) {
-#ifdef DEBUG
-			printf ("Cannot clean TBD %d, in use\n",
-				fec->cleanTbdNum);
-#endif
-			return;
-		}
-
-		/*
-		 * clean this buffer descriptor
-		 */
-		if (fec->usedTbdIndex == (FEC_TBD_NUM - 1))
-			pUsedTbd->status = FEC_TBD_WRAP;
-		else
-			pUsedTbd->status = 0;
-
-		/*
-		 * update some indeces for a correct handling of the TBD ring
-		 */
-		fec->cleanTbdNum++;
-		fec->usedTbdIndex = (fec->usedTbdIndex + 1) % FEC_TBD_NUM;
-	}
-}
-
-/********************************************************************/
-static void mpc8220_fec_set_hwaddr (mpc8220_fec_priv * fec, char *mac)
-{
-	u8 currByte;		/* byte for which to compute the CRC */
-	int byte;		/* loop - counter */
-	int bit;		/* loop - counter */
-	u32 crc = 0xffffffff;	/* initial value */
-
-	/*
-	 * The algorithm used is the following:
-	 * we loop on each of the six bytes of the provided address,
-	 * and we compute the CRC by left-shifting the previous
-	 * value by one position, so that each bit in the current
-	 * byte of the address may contribute the calculation. If
-	 * the latter and the MSB in the CRC are different, then
-	 * the CRC value so computed is also ex-ored with the
-	 * "polynomium generator". The current byte of the address
-	 * is also shifted right by one bit at each iteration.
-	 * This is because the CRC generatore in hardware is implemented
-	 * as a shift-register with as many ex-ores as the radixes
-	 * in the polynomium. This suggests that we represent the
-	 * polynomiumm itself as a 32-bit constant.
-	 */
-	for (byte = 0; byte < 6; byte++) {
-		currByte = mac[byte];
-		for (bit = 0; bit < 8; bit++) {
-			if ((currByte & 0x01) ^ (crc & 0x01)) {
-				crc >>= 1;
-				crc = crc ^ 0xedb88320;
-			} else {
-				crc >>= 1;
-			}
-			currByte >>= 1;
-		}
-	}
-
-	crc = crc >> 26;
-
-	/*
-	 * Set individual hash table register
-	 */
-	if (crc >= 32) {
-		fec->eth->iaddr1 = (1 << (crc - 32));
-		fec->eth->iaddr2 = 0;
-	} else {
-		fec->eth->iaddr1 = 0;
-		fec->eth->iaddr2 = (1 << crc);
-	}
-
-	/*
-	 * Set physical address
-	 */
-	fec->eth->paddr1 =
-		(mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3];
-	fec->eth->paddr2 = (mac[4] << 24) + (mac[5] << 16) + 0x8808;
-}
-
-/********************************************************************/
-static int mpc8220_fec_init (struct eth_device *dev, bd_t * bis)
-{
-	mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv;
-	struct mpc8220_dma *dma = (struct mpc8220_dma *) MMAP_DMA;
-	const u8 phyAddr = CONFIG_PHY_ADDR;	/* Only one PHY */
-
-#ifdef DEBUG
-	printf ("mpc8220_fec_init... Begin\n");
-#endif
-
-	/*
-	 * Initialize RxBD/TxBD rings
-	 */
-	mpc8220_fec_rbd_init (fec);
-	mpc8220_fec_tbd_init (fec);
-
-	/*
-	 * Set up Pin Muxing for FEC 1
-	 */
-	*(vu_long *) MMAP_PCFG = 0;
-	*(vu_long *) (MMAP_PCFG + 4) = 0;
-	/*
-	 * Clear FEC-Lite interrupt event register(IEVENT)
-	 */
-	fec->eth->ievent = 0xffffffff;
-
-	/*
-	 * Set interrupt mask register
-	 */
-	fec->eth->imask = 0x00000000;
-
-	/*
-	 * Set FEC-Lite receive control register(R_CNTRL):
-	 */
-	if (fec->xcv_type == SEVENWIRE) {
-		/*
-		 * Frame length=1518; 7-wire mode
-		 */
-		fec->eth->r_cntrl = 0x05ee0020; /*0x05ee0000;FIXME */
-	} else {
-		/*
-		 * Frame length=1518; MII mode;
-		 */
-		fec->eth->r_cntrl = 0x05ee0024; /*0x05ee0004;FIXME */
-	}
-
-	fec->eth->x_cntrl = 0x00000000; /* half-duplex, heartbeat disabled */
-	if (fec->xcv_type != SEVENWIRE) {
-		/*
-		 * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
-		 * and do not drop the Preamble.
-		 */
-		/*
-		 * tbd - rtm
-		 * fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
-		 * No MII for 7-wire mode
-		 */
-		fec->eth->mii_speed = 0x00000030;
-	}
-
-	/*
-	 * Set Opcode/Pause Duration Register
-	 */
-	fec->eth->op_pause = 0x00010020;	/*FIXME0xffff0020; */
-
-	/*
-	 * Set Rx FIFO alarm and granularity value
-	 */
-	fec->eth->rfifo_cntrl = 0x0c000000;
-	fec->eth->rfifo_alarm = 0x0000030c;
-#ifdef DEBUG
-	if (fec->eth->rfifo_status & 0x00700000) {
-		printf ("mpc8220_fec_init() RFIFO error\n");
-	}
-#endif
-
-	/*
-	 * Set Tx FIFO granularity value
-	 */
-	/*fec->eth->tfifo_cntrl = 0x0c000000; */ /*tbd - rtm */
-	fec->eth->tfifo_cntrl = 0x0e000000;
-#ifdef DEBUG
-	printf ("tfifo_status: 0x%08x\n", fec->eth->tfifo_status);
-	printf ("tfifo_alarm: 0x%08x\n", fec->eth->tfifo_alarm);
-#endif
-
-	/*
-	 * Set transmit fifo watermark register(X_WMRK), default = 64
-	 */
-	fec->eth->tfifo_alarm = 0x00000080;
-	fec->eth->x_wmrk = 0x2;
-
-	/*
-	 * Set individual address filter for unicast address
-	 * and set physical address registers.
-	 */
-	mpc8220_fec_set_hwaddr (fec, (char *)(dev->enetaddr));
-
-	/*
-	 * Set multicast address filter
-	 */
-	fec->eth->gaddr1 = 0x00000000;
-	fec->eth->gaddr2 = 0x00000000;
-
-	/*
-	 * Turn ON cheater FSM: ????
-	 */
-	fec->eth->xmit_fsm = 0x03000000;
-
-#if 1
-/*#if defined(CONFIG_MPC5200)*/
-	/*
-	 * Turn off COMM bus prefetch in the MGT5200 BestComm. It doesn't
-	 * work w/ the current receive task.
-	 */
-	dma->PtdCntrl |= 0x00000001;
-#endif
-
-	/*
-	 * Set priority of different initiators
-	 */
-	dma->IPR0 = 7;		/* always */
-	dma->IPR3 = 6;		/* Eth RX */
-	dma->IPR4 = 5;		/* Eth Tx */
-
-	/*
-	 * Clear SmartDMA task interrupt pending bits
-	 */
-	DMA_CLEAR_IEVENT (FEC_RECV_TASK_NO);
-
-	/*
-	 * Initialize SmartDMA parameters stored in SRAM
-	 */
-	*(int *) FEC_TBD_BASE = (int) fec->tbdBase;
-	*(int *) FEC_RBD_BASE = (int) fec->rbdBase;
-	*(int *) FEC_TBD_NEXT = (int) fec->tbdBase;
-	*(int *) FEC_RBD_NEXT = (int) fec->rbdBase;
-
-	if (fec->xcv_type != SEVENWIRE) {
-		/*
-		 * Initialize PHY(LXT971A):
-		 *
-		 *   Generally, on power up, the LXT971A reads its configuration
-		 *   pins to check for forced operation, If not cofigured for
-		 *   forced operation, it uses auto-negotiation/parallel detection
-		 *   to automatically determine line operating conditions.
-		 *   If the PHY device on the other side of the link supports
-		 *   auto-negotiation, the LXT971A auto-negotiates with it
-		 *   using Fast Link Pulse(FLP) Bursts. If the PHY partner does not
-		 *   support auto-negotiation, the LXT971A automatically detects
-		 *   the presence of either link pulses(10Mbps PHY) or Idle
-		 *   symbols(100Mbps) and sets its operating conditions accordingly.
-		 *
-		 *   When auto-negotiation is controlled by software, the following
-		 *   steps are recommended.
-		 *
-		 * Note:
-		 *   The physical address is dependent on hardware configuration.
-		 *
-		 */
-		int timeout = 1;
-		u16 phyStatus;
-
-		/*
-		 * Reset PHY, then delay 300ns
-		 */
-		miiphy_write (dev->name, phyAddr, 0x0, 0x8000);
-		udelay (1000);
-
-		if (fec->xcv_type == MII10) {
-			/*
-			 * Force 10Base-T, FDX operation
-			 */
-#ifdef DEBUG
-			printf ("Forcing 10 Mbps ethernet link... ");
-#endif
-			miiphy_read (dev->name, phyAddr, 0x1, &phyStatus);
-			/*
-			   miiphy_write(fec, phyAddr, 0x0, 0x0100);
-			 */
-			miiphy_write (dev->name, phyAddr, 0x0, 0x0180);
-
-			timeout = 20;
-			do {	/* wait for link status to go down */
-				udelay (10000);
-				if ((timeout--) == 0) {
-#ifdef DEBUG
-					printf ("hmmm, should not have waited...");
-#endif
-					break;
-				}
-				miiphy_read (dev->name, phyAddr, 0x1, &phyStatus);
-#ifdef DEBUG
-				printf ("=");
-#endif
-			} while ((phyStatus & 0x0004)); /* !link up */
-
-			timeout = 1000;
-			do {	/* wait for link status to come back up */
-				udelay (10000);
-				if ((timeout--) == 0) {
-					printf ("failed. Link is down.\n");
-					break;
-				}
-				miiphy_read (dev->name, phyAddr, 0x1, &phyStatus);
-#ifdef DEBUG
-				printf ("+");
-#endif
-			} while (!(phyStatus & 0x0004));	/* !link up */
-
-#ifdef DEBUG
-			printf ("done.\n");
-#endif
-		} else {	/* MII100 */
-			/*
-			 * Set the auto-negotiation advertisement register bits
-			 */
-			miiphy_write (dev->name, phyAddr, 0x4, 0x01e1);
-
-			/*
-			 * Set MDIO bit 0.12 = 1(&& bit 0.9=1?) to enable auto-negotiation
-			 */
-			miiphy_write (dev->name, phyAddr, 0x0, 0x1200);
-
-			/*
-			 * Wait for AN completion
-			 */
-			timeout = 5000;
-			do {
-				udelay (1000);
-
-				if ((timeout--) == 0) {
-#ifdef DEBUG
-					printf ("PHY auto neg 0 failed...\n");
-#endif
-					return -1;
-				}
-
-				if (miiphy_read (dev->name, phyAddr, 0x1, &phyStatus) !=
-				    0) {
-#ifdef DEBUG
-					printf ("PHY auto neg 1 failed 0x%04x...\n", phyStatus);
-#endif
-					return -1;
-				}
-			} while (!(phyStatus & 0x0004));
-
-#ifdef DEBUG
-			printf ("PHY auto neg complete! \n");
-#endif
-		}
-
-	}
-
-	/*
-	 * Enable FEC-Lite controller
-	 */
-	fec->eth->ecntrl |= 0x00000006;
-
-#ifdef DEBUG
-	if (fec->xcv_type != SEVENWIRE)
-		mpc8220_fec_phydump (dev->name);
-#endif
-
-	/*
-	 * Enable SmartDMA receive task
-	 */
-	DMA_TASK_ENABLE (FEC_RECV_TASK_NO);
-
-#ifdef DEBUG
-	printf ("mpc8220_fec_init... Done \n");
-#endif
-
-	return 1;
-}
-
-/********************************************************************/
-static void mpc8220_fec_halt (struct eth_device *dev)
-{
-	mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv;
-	int counter = 0xffff;
-
-#ifdef DEBUG
-	if (fec->xcv_type != SEVENWIRE)
-		mpc8220_fec_phydump (dev->name);
-#endif
-
-	/*
-	 * mask FEC chip interrupts
-	 */
-	fec->eth->imask = 0;
-
-	/*
-	 * issue graceful stop command to the FEC transmitter if necessary
-	 */
-	fec->eth->x_cntrl |= 0x00000001;
-
-	/*
-	 * wait for graceful stop to register
-	 */
-	while ((counter--) && (!(fec->eth->ievent & 0x10000000)));
-
-	/*
-	 * Disable SmartDMA tasks
-	 */
-	DMA_TASK_DISABLE (FEC_XMIT_TASK_NO);
-	DMA_TASK_DISABLE (FEC_RECV_TASK_NO);
-
-	/*
-	 * Disable the Ethernet Controller
-	 */
-	fec->eth->ecntrl &= 0xfffffffd;
-
-	/*
-	 * Clear FIFO status registers
-	 */
-	fec->eth->rfifo_status &= 0x00700000;
-	fec->eth->tfifo_status &= 0x00700000;
-
-	fec->eth->reset_cntrl = 0x01000000;
-
-	/*
-	 * Issue a reset command to the FEC chip
-	 */
-	fec->eth->ecntrl |= 0x1;
-
-	/*
-	 * wait at least 16 clock cycles
-	 */
-	udelay (10);
-
-#ifdef DEBUG
-	printf ("Ethernet task stopped\n");
-#endif
-}
-
-#ifdef DEBUG
-/********************************************************************/
-
-static void tfifo_print (char *devname, mpc8220_fec_priv * fec)
-{
-	u16 phyAddr = CONFIG_PHY_ADDR;
-	u16 phyStatus;
-
-	if ((fec->eth->tfifo_lrf_ptr != fec->eth->tfifo_lwf_ptr)
-	    || (fec->eth->tfifo_rdptr != fec->eth->tfifo_wrptr)) {
-
-		miiphy_read (devname, phyAddr, 0x1, &phyStatus);
-		printf ("\nphyStatus: 0x%04x\n", phyStatus);
-		printf ("ecntrl:   0x%08x\n", fec->eth->ecntrl);
-		printf ("ievent:   0x%08x\n", fec->eth->ievent);
-		printf ("x_status: 0x%08x\n", fec->eth->x_status);
-		printf ("tfifo: status	0x%08x\n", fec->eth->tfifo_status);
-
-		printf ("	control 0x%08x\n", fec->eth->tfifo_cntrl);
-		printf ("	lrfp	0x%08x\n", fec->eth->tfifo_lrf_ptr);
-		printf ("	lwfp	0x%08x\n", fec->eth->tfifo_lwf_ptr);
-		printf ("	alarm	0x%08x\n", fec->eth->tfifo_alarm);
-		printf ("	readptr 0x%08x\n", fec->eth->tfifo_rdptr);
-		printf ("	writptr 0x%08x\n", fec->eth->tfifo_wrptr);
-	}
-}
-
-static void rfifo_print (char *devname, mpc8220_fec_priv * fec)
-{
-	u16 phyAddr = CONFIG_PHY_ADDR;
-	u16 phyStatus;
-
-	if ((fec->eth->rfifo_lrf_ptr != fec->eth->rfifo_lwf_ptr)
-	    || (fec->eth->rfifo_rdptr != fec->eth->rfifo_wrptr)) {
-
-		miiphy_read (devname, phyAddr, 0x1, &phyStatus);
-		printf ("\nphyStatus: 0x%04x\n", phyStatus);
-		printf ("ecntrl:   0x%08x\n", fec->eth->ecntrl);
-		printf ("ievent:   0x%08x\n", fec->eth->ievent);
-		printf ("x_status: 0x%08x\n", fec->eth->x_status);
-		printf ("rfifo: status	0x%08x\n", fec->eth->rfifo_status);
-
-		printf ("	control 0x%08x\n", fec->eth->rfifo_cntrl);
-		printf ("	lrfp	0x%08x\n", fec->eth->rfifo_lrf_ptr);
-		printf ("	lwfp	0x%08x\n", fec->eth->rfifo_lwf_ptr);
-		printf ("	alarm	0x%08x\n", fec->eth->rfifo_alarm);
-		printf ("	readptr 0x%08x\n", fec->eth->rfifo_rdptr);
-		printf ("	writptr 0x%08x\n", fec->eth->rfifo_wrptr);
-	}
-}
-#endif /* DEBUG */
-
-/********************************************************************/
-
-static int mpc8220_fec_send(struct eth_device *dev, void *eth_data,
-			     int data_length)
-{
-	/*
-	 * This routine transmits one frame.  This routine only accepts
-	 * 6-byte Ethernet addresses.
-	 */
-	mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv;
-	FEC_TBD *pTbd;
-
-#ifdef DEBUG
-	printf ("tbd status: 0x%04x\n", fec->tbdBase[0].status);
-	tfifo_print (dev->name, fec);
-#endif
-
-	/*
-	 * Clear Tx BD ring at first
-	 */
-	mpc8220_fec_tbd_scrub (fec);
-
-	/*
-	 * Check for valid length of data.
-	 */
-	if ((data_length > 1500) || (data_length <= 0)) {
-		return -1;
-	}
-
-	/*
-	 * Check the number of vacant TxBDs.
-	 */
-	if (fec->cleanTbdNum < 1) {
-#ifdef DEBUG
-		printf ("No available TxBDs ...\n");
-#endif
-		return -1;
-	}
-
-	/*
-	 * Get the first TxBD to send the mac header
-	 */
-	pTbd = &fec->tbdBase[fec->tbdIndex];
-	pTbd->dataLength = data_length;
-	pTbd->dataPointer = (u32) eth_data;
-	pTbd->status |= FEC_TBD_LAST | FEC_TBD_TC | FEC_TBD_READY;
-	fec->tbdIndex = (fec->tbdIndex + 1) % FEC_TBD_NUM;
-
-#ifdef DEBUG
-	printf ("DMA_TASK_ENABLE, fec->tbdIndex = %d \n", fec->tbdIndex);
-#endif
-
-	/*
-	 * Kick the MII i/f
-	 */
-	if (fec->xcv_type != SEVENWIRE) {
-		u16 phyStatus;
-
-		miiphy_read (dev->name, 0, 0x1, &phyStatus);
-	}
-
-	/*
-	 * Enable SmartDMA transmit task
-	 */
-
-#ifdef DEBUG
-	tfifo_print (dev->name, fec);
-#endif
-
-	DMA_TASK_ENABLE (FEC_XMIT_TASK_NO);
-
-#ifdef DEBUG
-	tfifo_print (dev->name, fec);
-#endif
-
-#ifdef DEBUG
-	printf ("+");
-#endif
-
-	fec->cleanTbdNum -= 1;
-
-#ifdef DEBUG
-	printf ("smartDMA ethernet Tx task enabled\n");
-#endif
-	/*
-	 * wait until frame is sent .
-	 */
-	while (pTbd->status & FEC_TBD_READY) {
-		udelay (10);
-#ifdef DEBUG
-		printf ("TDB status = %04x\n", pTbd->status);
-#endif
-	}
-
-	return 0;
-}
-
-
-/********************************************************************/
-static int mpc8220_fec_recv (struct eth_device *dev)
-{
-	/*
-	 * This command pulls one frame from the card
-	 */
-	mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv;
-	FEC_RBD *pRbd = &fec->rbdBase[fec->rbdIndex];
-	unsigned long ievent;
-	int frame_length, len = 0;
-	NBUF *frame;
-
-#ifdef DEBUG
-	printf ("mpc8220_fec_recv %d Start...\n", fec->rbdIndex);
-	printf ("-");
-#endif
-
-	/*
-	 * Check if any critical events have happened
-	 */
-	ievent = fec->eth->ievent;
-	fec->eth->ievent = ievent;
-	if (ievent & 0x20060000) {
-		/* BABT, Rx/Tx FIFO errors */
-		mpc8220_fec_halt (dev);
-		mpc8220_fec_init (dev, NULL);
-		return 0;
-	}
-	if (ievent & 0x80000000) {
-		/* Heartbeat error */
-		fec->eth->x_cntrl |= 0x00000001;
-	}
-	if (ievent & 0x10000000) {
-		/* Graceful stop complete */
-		if (fec->eth->x_cntrl & 0x00000001) {
-			mpc8220_fec_halt (dev);
-			fec->eth->x_cntrl &= ~0x00000001;
-			mpc8220_fec_init (dev, NULL);
-		}
-	}
-
-	if (!(pRbd->status & FEC_RBD_EMPTY)) {
-		if ((pRbd->status & FEC_RBD_LAST)
-		    && !(pRbd->status & FEC_RBD_ERR)
-		    && ((pRbd->dataLength - 4) > 14)) {
-
-			/*
-			 * Get buffer address and size
-			 */
-			frame = (NBUF *) pRbd->dataPointer;
-			frame_length = pRbd->dataLength - 4;
-
-			/* DEBUG code */
-			if (_DEBUG) {
-				int i;
-
-				printf ("recv data hdr:");
-				for (i = 0; i < 14; i++)
-					printf ("%x ", *(frame->head + i));
-				printf ("\n");
-			}
-
-			/*
-			 *  Fill the buffer and pass it to upper layers
-			 */
-/*			memcpy(buff, frame->head, 14);
-			memcpy(buff + 14, frame->data, frame_length);*/
-			NetReceive((uchar *)pRbd->dataPointer, frame_length);
-			len = frame_length;
-		}
-		/*
-		 * Reset buffer descriptor as empty
-		 */
-		mpc8220_fec_rbd_clean (fec, pRbd);
-	}
-	DMA_CLEAR_IEVENT (FEC_RECV_TASK_NO);
-	return len;
-}
-
-
-/********************************************************************/
-int mpc8220_fec_initialize (bd_t * bis)
-{
-	mpc8220_fec_priv *fec;
-
-#ifdef CONFIG_HAS_ETH1
-	mpc8220_fec_priv *fec2;
-#endif
-	struct eth_device *dev;
-	char *tmp, *end;
-	char env_enetaddr[6];
-
-#ifdef CONFIG_HAS_ETH1
-	char env_enet1addr[6];
-#endif
-	int i;
-
-	fec = (mpc8220_fec_priv *) malloc (sizeof (*fec));
-	dev = (struct eth_device *) malloc (sizeof (*dev));
-	memset (dev, 0, sizeof *dev);
-
-	fec->eth = (ethernet_regs *) MMAP_FEC1;
-#ifdef CONFIG_HAS_ETH1
-	fec2 = (mpc8220_fec_priv *) malloc (sizeof (*fec));
-	fec2->eth = (ethernet_regs *) MMAP_FEC2;
-#endif
-	fec->tbdBase = (FEC_TBD *) FEC_BD_BASE;
-	fec->rbdBase =
-		(FEC_RBD *) (FEC_BD_BASE + FEC_TBD_NUM * sizeof (FEC_TBD));
-	fec->xcv_type = MII100;
-
-	dev->priv = (void *) fec;
-	dev->iobase = MMAP_FEC1;
-	dev->init = mpc8220_fec_init;
-	dev->halt = mpc8220_fec_halt;
-	dev->send = mpc8220_fec_send;
-	dev->recv = mpc8220_fec_recv;
-
-	sprintf (dev->name, "FEC");
-	eth_register (dev);
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-	miiphy_register (dev->name,
-			fec8220_miiphy_read, fec8220_miiphy_write);
-#endif
-
-	/*
-	 * Try to set the mac address now. The fec mac address is
-	 * a garbage after reset. When not using fec for booting
-	 * the Linux fec driver will try to work with this garbage.
-	 */
-	tmp = getenv ("ethaddr");
-	if (tmp) {
-		for (i = 0; i < 6; i++) {
-			env_enetaddr[i] =
-				tmp ? simple_strtoul (tmp, &end, 16) : 0;
-			if (tmp)
-				tmp = (*end) ? end + 1 : end;
-		}
-		mpc8220_fec_set_hwaddr (fec, env_enetaddr);
-	}
-#ifdef CONFIG_HAS_ETH1
-	tmp = getenv ("eth1addr");
-	if (tmp) {
-		for (i = 0; i < 6; i++) {
-			env_enet1addr[i] =
-				tmp ? simple_strtoul (tmp, &end, 16) : 0;
-			if (tmp)
-				tmp = (*end) ? end + 1 : end;
-		}
-		mpc8220_fec_set_hwaddr (fec2, env_enet1addr);
-	}
-#endif
-
-	return 1;
-}
-
-/* MII-interface related functions */
-/********************************************************************/
-int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
-{
-	ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
-	u32 reg;		/* convenient holder for the PHY register */
-	u32 phy;		/* convenient holder for the PHY */
-	int timeout = 0xffff;
-
-	/*
-	 * reading from any PHY's register is done by properly
-	 * programming the FEC's MII data register.
-	 */
-	reg = regAddr << FEC_MII_DATA_RA_SHIFT;
-	phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
-
-	eth->mii_data =
-		(FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA | phy
-		 | reg);
-
-	/*
-	 * wait for the related interrupt
-	 */
-	while ((timeout--) && (!(eth->ievent & 0x00800000)));
-
-	if (timeout == 0) {
-#ifdef DEBUG
-		printf ("Read MDIO failed...\n");
-#endif
-		return -1;
-	}
-
-	/*
-	 * clear mii interrupt bit
-	 */
-	eth->ievent = 0x00800000;
-
-	/*
-	 * it's now safe to read the PHY's register
-	 */
-	*retVal = (u16) eth->mii_data;
-
-	return 0;
-}
-
-/********************************************************************/
-int fec8220_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
-{
-	ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
-	u32 reg;		/* convenient holder for the PHY register */
-	u32 phy;		/* convenient holder for the PHY */
-	int timeout = 0xffff;
-
-	reg = regAddr << FEC_MII_DATA_RA_SHIFT;
-	phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
-
-	eth->mii_data = (FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR |
-			 FEC_MII_DATA_TA | phy | reg | data);
-
-	/*
-	 * wait for the MII interrupt
-	 */
-	while ((timeout--) && (!(eth->ievent & 0x00800000)));
-
-	if (timeout == 0) {
-#ifdef DEBUG
-		printf ("Write MDIO failed...\n");
-#endif
-		return -1;
-	}
-
-	/*
-	 * clear MII interrupt bit
-	 */
-	eth->ievent = 0x00800000;
-
-	return 0;
-}
-
-#endif /* CONFIG_MPC8220_FEC */
diff --git a/arch/powerpc/cpu/mpc8220/fec.h b/arch/powerpc/cpu/mpc8220/fec.h
deleted file mode 100644
index a8927fcdbb2..00000000000
--- a/arch/powerpc/cpu/mpc8220/fec.h
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This file is based on mpc4200fec.h
- * (C) Copyright Motorola, Inc., 2000
- *
- * odin ethernet header file
- */
-
-#ifndef __MPC8220_FEC_H
-#define __MPC8220_FEC_H
-
-#include <common.h>
-#include <mpc8220.h>
-#include "dma.h"
-
-typedef struct ethernet_register_set {
-
-/* [10:2]addr = 00 */
-
-/*  Control and status Registers (offset 000-1FF) */
-
-	volatile u32 fec_id;		/* MBAR_ETH + 0x000 */
-	volatile u32 ievent;		/* MBAR_ETH + 0x004 */
-	volatile u32 imask;		/* MBAR_ETH + 0x008 */
-
-	volatile u32 RES0[1];		/* MBAR_ETH + 0x00C */
-	volatile u32 r_des_active;	/* MBAR_ETH + 0x010 */
-	volatile u32 x_des_active;	/* MBAR_ETH + 0x014 */
-	volatile u32 r_des_active_cl;	/* MBAR_ETH + 0x018 */
-	volatile u32 x_des_active_cl;	/* MBAR_ETH + 0x01C */
-	volatile u32 ivent_set;		/* MBAR_ETH + 0x020 */
-	volatile u32 ecntrl;		/* MBAR_ETH + 0x024 */
-
-	volatile u32 RES1[6];		/* MBAR_ETH + 0x028-03C */
-	volatile u32 mii_data;		/* MBAR_ETH + 0x040 */
-	volatile u32 mii_speed;		/* MBAR_ETH + 0x044 */
-	volatile u32 mii_status;	/* MBAR_ETH + 0x048 */
-
-	volatile u32 RES2[5];		/* MBAR_ETH + 0x04C-05C */
-	volatile u32 mib_data;		/* MBAR_ETH + 0x060 */
-	volatile u32 mib_control;	/* MBAR_ETH + 0x064 */
-
-	volatile u32 RES3[6];		/* MBAR_ETH + 0x068-7C */
-	volatile u32 r_activate;	/* MBAR_ETH + 0x080 */
-	volatile u32 r_cntrl;		/* MBAR_ETH + 0x084 */
-	volatile u32 r_hash;		/* MBAR_ETH + 0x088 */
-	volatile u32 r_data;		/* MBAR_ETH + 0x08C */
-	volatile u32 ar_done;		/* MBAR_ETH + 0x090 */
-	volatile u32 r_test;		/* MBAR_ETH + 0x094 */
-	volatile u32 r_mib;		/* MBAR_ETH + 0x098 */
-	volatile u32 r_da_low;		/* MBAR_ETH + 0x09C */
-	volatile u32 r_da_high;		/* MBAR_ETH + 0x0A0 */
-
-	volatile u32 RES4[7];		/* MBAR_ETH + 0x0A4-0BC */
-	volatile u32 x_activate;	/* MBAR_ETH + 0x0C0 */
-	volatile u32 x_cntrl;		/* MBAR_ETH + 0x0C4 */
-	volatile u32 backoff;		/* MBAR_ETH + 0x0C8 */
-	volatile u32 x_data;		/* MBAR_ETH + 0x0CC */
-	volatile u32 x_status;		/* MBAR_ETH + 0x0D0 */
-	volatile u32 x_mib;		/* MBAR_ETH + 0x0D4 */
-	volatile u32 x_test;		/* MBAR_ETH + 0x0D8 */
-	volatile u32 fdxfc_da1;		/* MBAR_ETH + 0x0DC */
-	volatile u32 fdxfc_da2;		/* MBAR_ETH + 0x0E0 */
-	volatile u32 paddr1;		/* MBAR_ETH + 0x0E4 */
-	volatile u32 paddr2;		/* MBAR_ETH + 0x0E8 */
-	volatile u32 op_pause;		/* MBAR_ETH + 0x0EC */
-
-	volatile u32 RES5[4];		/* MBAR_ETH + 0x0F0-0FC */
-	volatile u32 instr_reg;		/* MBAR_ETH + 0x100 */
-	volatile u32 context_reg;	/* MBAR_ETH + 0x104 */
-	volatile u32 test_cntrl;	/* MBAR_ETH + 0x108 */
-	volatile u32 acc_reg;		/* MBAR_ETH + 0x10C */
-	volatile u32 ones;		/* MBAR_ETH + 0x110 */
-	volatile u32 zeros;		/* MBAR_ETH + 0x114 */
-	volatile u32 iaddr1;		/* MBAR_ETH + 0x118 */
-	volatile u32 iaddr2;		/* MBAR_ETH + 0x11C */
-	volatile u32 gaddr1;		/* MBAR_ETH + 0x120 */
-	volatile u32 gaddr2;		/* MBAR_ETH + 0x124 */
-	volatile u32 random;		/* MBAR_ETH + 0x128 */
-	volatile u32 rand1;		/* MBAR_ETH + 0x12C */
-	volatile u32 tmp;		/* MBAR_ETH + 0x130 */
-
-	volatile u32 RES6[3];		/* MBAR_ETH + 0x134-13C */
-	volatile u32 fifo_id;		/* MBAR_ETH + 0x140 */
-	volatile u32 x_wmrk;		/* MBAR_ETH + 0x144 */
-	volatile u32 fcntrl;		/* MBAR_ETH + 0x148 */
-	volatile u32 r_bound;		/* MBAR_ETH + 0x14C */
-	volatile u32 r_fstart;		/* MBAR_ETH + 0x150 */
-	volatile u32 r_count;		/* MBAR_ETH + 0x154 */
-	volatile u32 r_lag;		/* MBAR_ETH + 0x158 */
-	volatile u32 r_read;		/* MBAR_ETH + 0x15C */
-	volatile u32 r_write;		/* MBAR_ETH + 0x160 */
-	volatile u32 x_count;		/* MBAR_ETH + 0x164 */
-	volatile u32 x_lag;		/* MBAR_ETH + 0x168 */
-	volatile u32 x_retry;		/* MBAR_ETH + 0x16C */
-	volatile u32 x_write;		/* MBAR_ETH + 0x170 */
-	volatile u32 x_read;		/* MBAR_ETH + 0x174 */
-
-	volatile u32 RES7[2];		/* MBAR_ETH + 0x178-17C */
-	volatile u32 fm_cntrl;		/* MBAR_ETH + 0x180 */
-	volatile u32 rfifo_data;	/* MBAR_ETH + 0x184 */
-	volatile u32 rfifo_status;	/* MBAR_ETH + 0x188 */
-	volatile u32 rfifo_cntrl;	/* MBAR_ETH + 0x18C */
-	volatile u32 rfifo_lrf_ptr;	/* MBAR_ETH + 0x190 */
-	volatile u32 rfifo_lwf_ptr;	/* MBAR_ETH + 0x194 */
-	volatile u32 rfifo_alarm;	/* MBAR_ETH + 0x198 */
-	volatile u32 rfifo_rdptr;	/* MBAR_ETH + 0x19C */
-	volatile u32 rfifo_wrptr;	/* MBAR_ETH + 0x1A0 */
-	volatile u32 tfifo_data;	/* MBAR_ETH + 0x1A4 */
-	volatile u32 tfifo_status;	/* MBAR_ETH + 0x1A8 */
-	volatile u32 tfifo_cntrl;	/* MBAR_ETH + 0x1AC */
-	volatile u32 tfifo_lrf_ptr;	/* MBAR_ETH + 0x1B0 */
-	volatile u32 tfifo_lwf_ptr;	/* MBAR_ETH + 0x1B4 */
-	volatile u32 tfifo_alarm;	/* MBAR_ETH + 0x1B8 */
-	volatile u32 tfifo_rdptr;	/* MBAR_ETH + 0x1BC */
-	volatile u32 tfifo_wrptr;	/* MBAR_ETH + 0x1C0 */
-
-	volatile u32 reset_cntrl;	/* MBAR_ETH + 0x1C4 */
-	volatile u32 xmit_fsm;		/* MBAR_ETH + 0x1C8 */
-
-	volatile u32 RES8[3];		/* MBAR_ETH + 0x1CC-1D4 */
-	volatile u32 rdes_data0;	/* MBAR_ETH + 0x1D8 */
-	volatile u32 rdes_data1;	/* MBAR_ETH + 0x1DC */
-	volatile u32 r_length;		/* MBAR_ETH + 0x1E0 */
-	volatile u32 x_length;		/* MBAR_ETH + 0x1E4 */
-	volatile u32 x_addr;		/* MBAR_ETH + 0x1E8 */
-	volatile u32 cdes_data;		/* MBAR_ETH + 0x1EC */
-	volatile u32 status;		/* MBAR_ETH + 0x1F0 */
-	volatile u32 dma_control;	/* MBAR_ETH + 0x1F4 */
-	volatile u32 des_cmnd;		/* MBAR_ETH + 0x1F8 */
-	volatile u32 data;		/* MBAR_ETH + 0x1FC */
-
-	/*  MIB COUNTERS (Offset 200-2FF) */
-
-	volatile u32 rmon_t_drop;	/* MBAR_ETH + 0x200 */
-	volatile u32 rmon_t_packets;	/* MBAR_ETH + 0x204 */
-	volatile u32 rmon_t_bc_pkt;	/* MBAR_ETH + 0x208 */
-	volatile u32 rmon_t_mc_pkt;	/* MBAR_ETH + 0x20C */
-	volatile u32 rmon_t_crc_align;	/* MBAR_ETH + 0x210 */
-	volatile u32 rmon_t_undersize;	/* MBAR_ETH + 0x214 */
-	volatile u32 rmon_t_oversize;	/* MBAR_ETH + 0x218 */
-	volatile u32 rmon_t_frag;	/* MBAR_ETH + 0x21C */
-	volatile u32 rmon_t_jab;	/* MBAR_ETH + 0x220 */
-	volatile u32 rmon_t_col;	/* MBAR_ETH + 0x224 */
-	volatile u32 rmon_t_p64;	/* MBAR_ETH + 0x228 */
-	volatile u32 rmon_t_p65to127;	/* MBAR_ETH + 0x22C */
-	volatile u32 rmon_t_p128to255;	/* MBAR_ETH + 0x230 */
-	volatile u32 rmon_t_p256to511;	/* MBAR_ETH + 0x234 */
-	volatile u32 rmon_t_p512to1023;	/* MBAR_ETH + 0x238 */
-	volatile u32 rmon_t_p1024to2047;/* MBAR_ETH + 0x23C */
-	volatile u32 rmon_t_p_gte2048;	/* MBAR_ETH + 0x240 */
-	volatile u32 rmon_t_octets;	/* MBAR_ETH + 0x244 */
-	volatile u32 ieee_t_drop;	/* MBAR_ETH + 0x248 */
-	volatile u32 ieee_t_frame_ok;	/* MBAR_ETH + 0x24C */
-	volatile u32 ieee_t_1col;	/* MBAR_ETH + 0x250 */
-	volatile u32 ieee_t_mcol;	/* MBAR_ETH + 0x254 */
-	volatile u32 ieee_t_def;	/* MBAR_ETH + 0x258 */
-	volatile u32 ieee_t_lcol;	/* MBAR_ETH + 0x25C */
-	volatile u32 ieee_t_excol;	/* MBAR_ETH + 0x260 */
-	volatile u32 ieee_t_macerr;	/* MBAR_ETH + 0x264 */
-	volatile u32 ieee_t_cserr;	/* MBAR_ETH + 0x268 */
-	volatile u32 ieee_t_sqe;	/* MBAR_ETH + 0x26C */
-	volatile u32 t_fdxfc;		/* MBAR_ETH + 0x270 */
-	volatile u32 ieee_t_octets_ok;	/* MBAR_ETH + 0x274 */
-
-	volatile u32 RES9[2];		/* MBAR_ETH + 0x278-27C */
-	volatile u32 rmon_r_drop;	/* MBAR_ETH + 0x280 */
-	volatile u32 rmon_r_packets;	/* MBAR_ETH + 0x284 */
-	volatile u32 rmon_r_bc_pkt;	/* MBAR_ETH + 0x288 */
-	volatile u32 rmon_r_mc_pkt;	/* MBAR_ETH + 0x28C */
-	volatile u32 rmon_r_crc_align;	/* MBAR_ETH + 0x290 */
-	volatile u32 rmon_r_undersize;	/* MBAR_ETH + 0x294 */
-	volatile u32 rmon_r_oversize;	/* MBAR_ETH + 0x298 */
-	volatile u32 rmon_r_frag;	/* MBAR_ETH + 0x29C */
-	volatile u32 rmon_r_jab;	/* MBAR_ETH + 0x2A0 */
-
-	volatile u32 rmon_r_resvd_0;	/* MBAR_ETH + 0x2A4 */
-
-	volatile u32 rmon_r_p64;	/* MBAR_ETH + 0x2A8 */
-	volatile u32 rmon_r_p65to127;	/* MBAR_ETH + 0x2AC */
-	volatile u32 rmon_r_p128to255;	/* MBAR_ETH + 0x2B0 */
-	volatile u32 rmon_r_p256to511;	/* MBAR_ETH + 0x2B4 */
-	volatile u32 rmon_r_p512to1023;	/* MBAR_ETH + 0x2B8 */
-	volatile u32 rmon_r_p1024to2047;/* MBAR_ETH + 0x2BC */
-	volatile u32 rmon_r_p_gte2048;	/* MBAR_ETH + 0x2C0 */
-	volatile u32 rmon_r_octets;	/* MBAR_ETH + 0x2C4 */
-	volatile u32 ieee_r_drop;	/* MBAR_ETH + 0x2C8 */
-	volatile u32 ieee_r_frame_ok;	/* MBAR_ETH + 0x2CC */
-	volatile u32 ieee_r_crc;	/* MBAR_ETH + 0x2D0 */
-	volatile u32 ieee_r_align;	/* MBAR_ETH + 0x2D4 */
-	volatile u32 r_macerr;		/* MBAR_ETH + 0x2D8 */
-	volatile u32 r_fdxfc;		/* MBAR_ETH + 0x2DC */
-	volatile u32 ieee_r_octets_ok;	/* MBAR_ETH + 0x2E0 */
-
-	volatile u32 RES10[6];		/* MBAR_ETH + 0x2E4-2FC */
-
-	volatile u32 RES11[64];		/* MBAR_ETH + 0x300-3FF */
-} ethernet_regs;
-
-/* Receive & Transmit Buffer Descriptor definitions */
-typedef struct BufferDescriptor {
-	u16 status;
-	u16 dataLength;
-	u32 dataPointer;
-} FEC_RBD;
-
-typedef struct {
-	u16 status;
-	u16 dataLength;
-	u32 dataPointer;
-} FEC_TBD;
-
-/* private structure */
-typedef enum {
-	SEVENWIRE,		/* 7-wire       */
-	MII10,			/* MII 10Mbps   */
-	MII100			/* MII 100Mbps  */
-} xceiver_type;
-
-typedef struct {
-	ethernet_regs *eth;
-	xceiver_type xcv_type;	/* transceiver type */
-	FEC_RBD *rbdBase;	/* RBD ring */
-	FEC_TBD *tbdBase;	/* TBD ring */
-	u16 rbdIndex;		/* next receive BD to read */
-	u16 tbdIndex;		/* next transmit BD to send */
-	u16 usedTbdIndex;	/* next transmit BD to clean */
-	u16 cleanTbdNum;	/* the number of available transmit BDs */
-} mpc8220_fec_priv;
-
-/* Ethernet parameter area */
-#define FEC_TBD_BASE	    (FEC_PARAM_BASE + 0x00)
-#define FEC_TBD_NEXT	    (FEC_PARAM_BASE + 0x04)
-#define FEC_RBD_BASE	    (FEC_PARAM_BASE + 0x08)
-#define FEC_RBD_NEXT	    (FEC_PARAM_BASE + 0x0c)
-
-/* BD Numer definitions */
-#define FEC_TBD_NUM	   48	/* The user can adjust this value */
-#define FEC_RBD_NUM	   32	/* The user can adjust this value */
-
-/* packet size limit */
-#define FEC_MAX_PKT_SIZE   1536
-
-/* RBD bits definitions */
-#define FEC_RBD_EMPTY	0x8000	/* Buffer is empty */
-#define FEC_RBD_WRAP	0x2000	/* Last BD in ring */
-#define FEC_RBD_INT	0x1000	/* Interrupt */
-#define FEC_RBD_LAST	0x0800	/* Buffer is last in frame(useless) */
-#define FEC_RBD_MISS	0x0100	/* Miss bit for prom mode */
-#define FEC_RBD_BC	0x0080	/* The received frame is broadcast frame */
-#define FEC_RBD_MC	0x0040	/* The received frame is multicast frame */
-#define FEC_RBD_LG	0x0020	/* Frame length violation */
-#define FEC_RBD_NO	0x0010	/* Nonoctet align frame */
-#define FEC_RBD_SH	0x0008	/* Short frame */
-#define FEC_RBD_CR	0x0004	/* CRC error */
-#define FEC_RBD_OV	0x0002	/* Receive FIFO overrun */
-#define FEC_RBD_TR	0x0001	/* Frame is truncated */
-#define FEC_RBD_ERR	(FEC_RBD_LG | FEC_RBD_NO | FEC_RBD_CR | \
-			 FEC_RBD_OV | FEC_RBD_TR)
-
-/* TBD bits definitions */
-#define FEC_TBD_READY	0x8000	/* Buffer is ready */
-#define FEC_TBD_WRAP	0x2000	/* Last BD in ring */
-#define FEC_TBD_INT	0x1000	/* Interrupt */
-#define FEC_TBD_LAST	0x0800	/* Buffer is last in frame */
-#define FEC_TBD_TC	0x0400	/* Transmit the CRC */
-#define FEC_TBD_ABC	0x0200	/* Append bad CRC */
-
-/* MII-related definitios */
-#define FEC_MII_DATA_ST		0x40000000	/* Start of frame delimiter */
-#define FEC_MII_DATA_OP_RD	0x20000000	/* Perform a read operation */
-#define FEC_MII_DATA_OP_WR	0x10000000	/* Perform a write operation */
-#define FEC_MII_DATA_PA_MSK	0x0f800000	/* PHY Address field mask */
-#define FEC_MII_DATA_RA_MSK	0x007c0000	/* PHY Register field mask */
-#define FEC_MII_DATA_TA		0x00020000	/* Turnaround */
-#define FEC_MII_DATA_DATAMSK	0x0000ffff	/* PHY data field */
-
-#define FEC_MII_DATA_RA_SHIFT	18	/* MII Register address bits */
-#define FEC_MII_DATA_PA_SHIFT	23	/* MII PHY address bits */
-
-#endif /* __MPC8220_FEC_H */
diff --git a/arch/powerpc/cpu/mpc8220/fec_dma_tasks.S b/arch/powerpc/cpu/mpc8220/fec_dma_tasks.S
deleted file mode 100644
index 3f8a03bf157..00000000000
--- a/arch/powerpc/cpu/mpc8220/fec_dma_tasks.S
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * Copyright (C) 2004, Freescale Semiconductor, Inc.
- *
- * This file contains microcode for the FEC controller of the MPC8220.
- */
-
-#include <config.h>
-
-#if defined(CONFIG_MPC8220)
-
-/* sas/sccg, gas target */
-.section        smartdmaInitData,"aw",@progbits	/* Initialized data for task variables */
-.section        smartdmaTaskTable,"aw",@progbits	/* Task tables */
-.align  9
-.globl taskTable
-taskTable:
-.globl scEthernetRecv_Entry
-scEthernetRecv_Entry:		/* Task 0 */
-.long   scEthernetRecv_TDT - taskTable	/* Task 0 Descriptor Table */
-.long   scEthernetRecv_TDT - taskTable + 0x00000094
-.long   scEthernetRecv_VarTab - taskTable	/* Task 0 Variable Table */
-.long   scEthernetRecv_FDT - taskTable + 0x03	/* Task 0 Function Descriptor Table & Flags */
-.long   0x00000000
-.long   0x00000000
-.long   scEthernetRecv_CSave - taskTable	/* Task 0 context save space */
-.long   0xf0000000
-.globl scEthernetXmit_Entry
-scEthernetXmit_Entry:		/* Task 1 */
-.long   scEthernetXmit_TDT - taskTable	/* Task 1 Descriptor Table */
-.long   scEthernetXmit_TDT - taskTable + 0x000000e0
-.long   scEthernetXmit_VarTab - taskTable	/* Task 1 Variable Table */
-.long   scEthernetXmit_FDT - taskTable + 0x03	/* Task 1 Function Descriptor Table & Flags */
-.long   0x00000000
-.long   0x00000000
-.long   scEthernetXmit_CSave - taskTable	/* Task 1 context save space */
-.long   0xf0000000
-
-
-.globl scEthernetRecv_TDT
-scEthernetRecv_TDT:	/* Task 0 Descriptor Table */
-.long   0xc4c50000	/* 0000(153):  LCDEXT: idx0 = var9 + var10; idx0 once var0; idx0 += inc0 */
-.long   0x84c5e000	/* 0004(153):  LCD: idx1 = var9 + var11; ; idx1 += inc0 */
-.long   0x10001f08	/* 0008(156):    DRD1A: var7 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x10000380	/* 000C(157):    DRD1A: var0 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x00000f88	/* 0010(158):    DRD1A: var3 = *idx1; FN=0 init=0 WS=0 RS=0 */
-.long   0x81980000	/* 0014(162):  LCD: idx0 = var3; idx0 once var0; idx0 += inc0 */
-.long   0x10000780	/* 0018(164):    DRD1A: var1 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x60000000	/* 001C(165):    DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long   0x010cf04c	/* 0020(165):    DRD2B1: var4 = EU3(); EU3(var1,var12)  */
-.long   0x82180349	/* 0024(169):  LCD: idx0 = var4; idx0 != var13; idx0 += inc1 */
-.long   0x81c68004	/* 0028(172):    LCD: idx1 = var3 + var13 + 4; idx1 once var0; idx1 += inc0 */
-.long   0x70000000	/* 002C(174):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long   0x018cf04e	/* 0030(174):      DRD2B1: var6 = EU3(); EU3(var1,var14)  */
-.long   0x70000000	/* 0034(175):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long   0x020cf04f	/* 0038(175):      DRD2B1: var8 = EU3(); EU3(var1,var15)  */
-.long   0x00000b88	/* 003C(176):      DRD1A: var2 = *idx1; FN=0 init=0 WS=0 RS=0 */
-.long   0x80025184	/* 0040(205):    LCDEXT: idx1 = 0xf0009184; ; */
-.long   0x86810412	/* 0044(205):    LCD: idx2 = var13, idx3 = var2; idx2 < var16; idx2 += inc2, idx3 += inc2 */
-.long   0x0200cf88	/* 0048(209):      DRD1A: *idx3 = *idx1; FN=0 init=16 WS=0 RS=0 */
-.long   0x80025184	/* 004C(217):    LCDEXT: idx1 = 0xf0009184; ; */
-.long   0x8681845b	/* 0050(217):    LCD: idx2 = var13, idx3 = var3; idx2 < var17; idx2 += inc3, idx3 += inc3 */
-.long   0x0000cf88	/* 0054(221):      DRD1A: *idx3 = *idx1; FN=0 init=0 WS=0 RS=0 */
-.long   0xc31883a4	/* 0058(225):    LCDEXT: idx1 = var6; idx1 == var14; idx1 += inc4 */
-.long   0x80190000	/* 005C(225):    LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */
-.long   0x04008468	/* 0060(227):      DRD1A: idx1 = var13; FN=0 INT init=0 WS=0 RS=0 */
-.long   0xc4038360	/* 0064(232):    LCDEXT: idx1 = var8, idx2 = var7; idx1 == var13; idx1 += inc4, idx2 += inc0 */
-.long   0x81c50000	/* 0068(233):    LCD: idx3 = var3 + var10; idx3 once var0; idx3 += inc0 */
-.long   0x1000cb18	/* 006C(235):      DRD1A: *idx2 = idx3; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x00000f18	/* 0070(236):      DRD1A: var3 = idx3; FN=0 init=0 WS=0 RS=0 */
-.long   0xc418836d	/* 0074(238):    LCDEXT: idx1 = var8; idx1 > var13; idx1 += inc5 */
-.long   0x83990000	/* 0078(238):    LCD: idx2 = var7; idx2 once var0; idx2 += inc0 */
-.long   0x10000c00	/* 007C(240):      DRD1A: var3 = var0; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x0000c800	/* 0080(241):      DRD1A: *idx2 = var0; FN=0 init=0 WS=0 RS=0 */
-.long   0x81988000	/* 0084(245):    LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
-.long   0x10000788	/* 0088(247):      DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x60000000	/* 008C(248):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long   0x080cf04c	/* 0090(248):      DRD2B1: idx0 = EU3(); EU3(var1,var12)  */
-.long   0x000001f8	/* 0094(:0):    NOP */
-
-
-.globl scEthernetXmit_TDT
-scEthernetXmit_TDT:	/* Task 1 Descriptor Table */
-.long   0x80095b00	/* 0000(280):  LCDEXT: idx0 = 0xf0025b00; ; */
-.long   0x85c60004	/* 0004(280):  LCD: idx1 = var11 + var12 + 4; idx1 once var0; idx1 += inc0 */
-.long   0x10002308	/* 0008(283):    DRD1A: var8 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x10000f88	/* 000C(284):    DRD1A: var3 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x00000380	/* 0010(285):    DRD1A: var0 = *idx0; FN=0 init=0 WS=0 RS=0 */
-.long   0x81980000	/* 0014(288):  LCD: idx0 = var3; idx0 once var0; idx0 += inc0 */
-.long   0x10000780	/* 0018(290):    DRD1A: var1 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x60000000	/* 001C(291):    DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long   0x024cf04d	/* 0020(291):    DRD2B1: var9 = EU3(); EU3(var1,var13)  */
-.long   0x84980309	/* 0024(294):  LCD: idx0 = var9; idx0 != var12; idx0 += inc1 */
-.long   0xc0004003	/* 0028(297):    LCDEXT: idx1 = 0x00000003; ; */
-.long   0x81c60004	/* 002C(297):    LCD: idx2 = var3 + var12 + 4; idx2 once var0; idx2 += inc0 */
-.long   0x70000000	/* 0030(299):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long   0x010cf04e	/* 0034(299):      DRD2B1: var4 = EU3(); EU3(var1,var14)  */
-.long   0x70000000	/* 0038(300):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long   0x014cf04f	/* 003C(300):      DRD2B1: var5 = EU3(); EU3(var1,var15)  */
-.long   0x70000000	/* 0040(301):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long   0x028cf050	/* 0044(301):      DRD2B1: var10 = EU3(); EU3(var1,var16)  */
-.long   0x70000000	/* 0048(302):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long   0x018cf051	/* 004C(302):      DRD2B1: var6 = EU3(); EU3(var1,var17)  */
-.long   0x10000b90	/* 0050(303):      DRD1A: var2 = *idx2; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x60000000	/* 0054(304):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long   0x01ccf0a1	/* 0058(304):      DRD2B1: var7 = EU3(); EU3(var2,idx1)  */
-.long   0xc2988312	/* 005C(308):    LCDEXT: idx1 = var5; idx1 > var12; idx1 += inc2 */
-.long   0x83490000	/* 0060(308):    LCD: idx2 = var6 + var18; idx2 once var0; idx2 += inc0 */
-.long   0x00001b10	/* 0064(310):      DRD1A: var6 = idx2; FN=0 init=0 WS=0 RS=0 */
-.long   0x800251a4	/* 0068(315):    LCDEXT: idx1 = 0xf00091a4; ; */
-.long   0xc30104dc	/* 006C(315):    LCDEXT: idx2 = var6, idx3 = var2; idx2 >= var19; idx2 += inc3, idx3 += inc4 */
-.long   0x839a032d	/* 0070(316):    LCD: idx4 = var7; idx4 == var12; idx4 += inc5 */
-.long   0x0220c798	/* 0074(321):      DRD1A: *idx1 = *idx3; FN=0 init=17 WS=0 RS=0 */
-.long   0x800251a4	/* 0078(329):    LCDEXT: idx1 = 0xf00091a4; ; */
-.long   0x99198337	/* 007C(329):    LCD: idx2 = idx2, idx3 = idx3; idx2 > var12; idx2 += inc6, idx3 += inc7 */
-.long   0x022ac798	/* 0080(333):      DRD1A: *idx1 = *idx3; FN=0 init=17 WS=1 RS=1 */
-.long   0x800251a4	/* 0084(350):    LCDEXT: idx1 = 0xf00091a4; ; */
-.long   0xc1430000	/* 0088(350):    LCDEXT: idx2 = var2 + var6; idx2 once var0; idx2 += inc0 */
-.long   0x82998312	/* 008C(351):    LCD: idx3 = var5; idx3 > var12; idx3 += inc2 */
-.long   0x0a2ac790	/* 0090(354):      DRD1A: *idx1 = *idx2; FN=0 TFD init=17 WS=1 RS=1 */
-.long   0x81988000	/* 0094(359):    LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
-.long   0x60000002	/* 0098(361):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=0 RS=0 */
-.long   0x0c4cfc4d	/* 009C(361):      DRD2B1: *idx1 = EU3(); EU3(*idx1,var13)  */
-.long   0xc21883ad	/* 00A0(365):    LCDEXT: idx1 = var4; idx1 == var14; idx1 += inc5 */
-.long   0x80190000	/* 00A4(365):    LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */
-.long   0x04008460	/* 00A8(367):      DRD1A: idx1 = var12; FN=0 INT init=0 WS=0 RS=0 */
-.long   0xc4052305	/* 00AC(371):    LCDEXT: idx1 = var8, idx2 = var10; idx2 == var12; idx1 += inc0, idx2 += inc5 */
-.long   0x81ca0000	/* 00B0(372):    LCD: idx3 = var3 + var20; idx3 once var0; idx3 += inc0 */
-.long   0x1000c718	/* 00B4(374):      DRD1A: *idx1 = idx3; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x00000f18	/* 00B8(375):      DRD1A: var3 = idx3; FN=0 init=0 WS=0 RS=0 */
-.long   0xc4188000	/* 00BC(378):    LCDEXT: idx1 = var8; idx1 once var0; idx1 += inc0 */
-.long   0x85190312	/* 00C0(378):    LCD: idx2 = var10; idx2 > var12; idx2 += inc2 */
-.long   0x10000c00	/* 00C4(380):      DRD1A: var3 = var0; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x1000c400	/* 00C8(381):      DRD1A: *idx1 = var0; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x00008860	/* 00CC(382):      DRD1A: idx2 = var12; FN=0 init=0 WS=0 RS=0 */
-.long   0x81988000	/* 00D0(386):    LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
-.long   0x10000788	/* 00D4(388):      DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long   0x60000000	/* 00D8(389):      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long   0x080cf04d	/* 00DC(389):      DRD2B1: idx0 = EU3(); EU3(var1,var13)  */
-.long   0x000001f8	/* 00E0(:0):    NOP */
-
-.align 8
-
-.globl scEthernetRecv_VarTab
-scEthernetRecv_VarTab:	/* Task 0 Variable Table */
-.long   0x00000000	/* var[0] */
-.long   0x00000000	/* var[1] */
-.long   0x00000000	/* var[2] */
-.long   0x00000000	/* var[3] */
-.long   0x00000000	/* var[4] */
-.long   0x00000000	/* var[5] */
-.long   0x00000000	/* var[6] */
-.long   0x00000000	/* var[7] */
-.long   0x00000000	/* var[8] */
-.long   0xf0025b00	/* var[9] */
-.long   0x00000008	/* var[10] */
-.long   0x0000000c	/* var[11] */
-.long   0x80000000	/* var[12] */
-.long   0x00000000	/* var[13] */
-.long   0x10000000	/* var[14] */
-.long   0x20000000	/* var[15] */
-.long   0x00000800	/* var[16] */
-.long   0x00000001	/* var[17] */
-.long   0x00000000	/* var[18] */
-.long   0x00000000	/* var[19] */
-.long   0x00000000	/* var[20] */
-.long   0x00000000	/* var[21] */
-.long   0x00000000	/* var[22] */
-.long   0x00000000	/* var[23] */
-.long   0x00000000	/* inc[0] */
-.long   0x60000000	/* inc[1] */
-.long   0x20000004	/* inc[2] */
-.long   0x20000001	/* inc[3] */
-.long   0x80000000	/* inc[4] */
-.long   0x40000000	/* inc[5] */
-.long   0x00000000	/* inc[6] */
-.long   0x00000000	/* inc[7] */
-
-.align  8
-
-.globl scEthernetXmit_VarTab
-scEthernetXmit_VarTab:	/* Task 1 Variable Table */
-.long   0x00000000	/* var[0] */
-.long   0x00000000	/* var[1] */
-.long   0x00000000	/* var[2] */
-.long   0x00000000	/* var[3] */
-.long   0x00000000	/* var[4] */
-.long   0x00000000	/* var[5] */
-.long   0x00000000	/* var[6] */
-.long   0x00000000	/* var[7] */
-.long   0x00000000	/* var[8] */
-.long   0x00000000	/* var[9] */
-.long   0x00000000	/* var[10] */
-.long   0xf0025b00	/* var[11] */
-.long   0x00000000	/* var[12] */
-.long   0x80000000	/* var[13] */
-.long   0x10000000	/* var[14] */
-.long   0x08000000	/* var[15] */
-.long   0x20000000	/* var[16] */
-.long   0x0000ffff	/* var[17] */
-.long   0xffffffff	/* var[18] */
-.long   0x00000004	/* var[19] */
-.long   0x00000008	/* var[20] */
-.long   0x00000000	/* var[21] */
-.long   0x00000000	/* var[22] */
-.long   0x00000000	/* var[23] */
-.long   0x00000000	/* inc[0] */
-.long   0x60000000	/* inc[1] */
-.long   0x40000000	/* inc[2] */
-.long   0xc000fffc	/* inc[3] */
-.long   0xe0000004	/* inc[4] */
-.long   0x80000000	/* inc[5] */
-.long   0x4000ffff	/* inc[6] */
-.long   0xe0000001	/* inc[7] */
-
-.align 8
-
-.globl scEthernetRecv_FDT
-scEthernetRecv_FDT:	/* Task 0 Function Descriptor Table */
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x21800000	/* and(), EU# 3 */
-.long   0x21e00000	/* or(), EU# 3 */
-.long   0x21400000	/* andn(), EU# 3 */
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-
-.align 8
-
-.globl scEthernetXmit_FDT
-scEthernetXmit_FDT:	/* Task 1 Function Descriptor Table */
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x21800000	/* and(), EU# 3 */
-.long   0x21e00000	/* or(), EU# 3 */
-.long   0x21400000	/* andn(), EU# 3 */
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-.long   0x00000000
-
-
-.globl scEthernetRecv_CSave
-scEthernetRecv_CSave:	/* Task 0 context save space */
-.space  128, 0x0
-
-
-.globl scEthernetXmit_CSave
-scEthernetXmit_CSave:	/* Task 1 context save space */
-.space  128, 0x0
-
-#endif
diff --git a/arch/powerpc/cpu/mpc8220/i2c.c b/arch/powerpc/cpu/mpc8220/i2c.c
deleted file mode 100644
index 2f35d20c87e..00000000000
--- a/arch/powerpc/cpu/mpc8220/i2c.c
+++ /dev/null
@@ -1,388 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale, Inc
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_HARD_I2C
-
-#include <mpc8220.h>
-#include <i2c.h>
-
-typedef struct mpc8220_i2c {
-	volatile u32 adr;	/* I2Cn + 0x00 */
-	volatile u32 fdr;	/* I2Cn + 0x04 */
-	volatile u32 cr;	/* I2Cn + 0x08 */
-	volatile u32 sr;	/* I2Cn + 0x0C */
-	volatile u32 dr;	/* I2Cn + 0x10 */
-} i2c_t;
-
-/* I2Cn control register bits */
-#define I2C_EN      0x80
-#define I2C_IEN     0x40
-#define I2C_STA     0x20
-#define I2C_TX      0x10
-#define I2C_TXAK    0x08
-#define I2C_RSTA    0x04
-#define I2C_INIT_MASK   (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA)
-
-/* I2Cn status register bits */
-#define I2C_CF      0x80
-#define I2C_AAS     0x40
-#define I2C_BB      0x20
-#define I2C_AL      0x10
-#define I2C_SRW     0x04
-#define I2C_IF      0x02
-#define I2C_RXAK    0x01
-
-#define I2C_TIMEOUT 100
-#define I2C_RETRIES 1
-
-struct mpc8220_i2c_tap {
-	int scl2tap;
-	int tap2tap;
-};
-
-static int mpc_reg_in (volatile u32 * reg);
-static void mpc_reg_out (volatile u32 * reg, int val, int mask);
-static int wait_for_bb (void);
-static int wait_for_pin (int *status);
-static int do_address (uchar chip, char rdwr_flag);
-static int send_bytes (uchar chip, char *buf, int len);
-static int receive_bytes (uchar chip, char *buf, int len);
-static int mpc_get_fdr (int);
-
-static int mpc_reg_in (volatile u32 * reg)
-{
-	int ret;
-	ret = *reg >> 24;
-	__asm__ __volatile__ ("eieio");
-	return ret;
-}
-
-static void mpc_reg_out (volatile u32 * reg, int val, int mask)
-{
-	int tmp;
-
-	if (!mask) {
-		*reg = val << 24;
-	} else {
-		tmp = mpc_reg_in (reg);
-		*reg = ((tmp & ~mask) | (val & mask)) << 24;
-	}
-	__asm__ __volatile__ ("eieio");
-
-	return;
-}
-
-static int wait_for_bb (void)
-{
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int timeout = I2C_TIMEOUT;
-	int status;
-
-	status = mpc_reg_in (&regs->sr);
-
-	while (timeout-- && (status & I2C_BB)) {
-
-		mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
-		(void)mpc_reg_in (&regs->dr);
-		mpc_reg_out (&regs->cr, 0, I2C_STA);
-		mpc_reg_out (&regs->cr, 0, 0);
-		mpc_reg_out (&regs->cr, I2C_EN, 0);
-
-		udelay (1000);
-		status = mpc_reg_in (&regs->sr);
-	}
-
-	return (status & I2C_BB);
-}
-
-static int wait_for_pin (int *status)
-{
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int timeout = I2C_TIMEOUT;
-
-	*status = mpc_reg_in (&regs->sr);
-
-	while (timeout-- && !(*status & I2C_IF)) {
-		udelay (1000);
-		*status = mpc_reg_in (&regs->sr);
-	}
-
-	if (!(*status & I2C_IF)) {
-		return -1;
-	}
-
-	mpc_reg_out (&regs->sr, 0, I2C_IF);
-	return 0;
-}
-
-static int do_address (uchar chip, char rdwr_flag)
-{
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int status;
-
-	chip <<= 1;
-
-	if (rdwr_flag)
-		chip |= 1;
-
-	mpc_reg_out (&regs->cr, I2C_TX, I2C_TX);
-	mpc_reg_out (&regs->dr, chip, 0);
-
-	if (wait_for_pin (&status))
-		return -2;
-	if (status & I2C_RXAK)
-		return -3;
-	return 0;
-}
-
-static int send_bytes (uchar chip, char *buf, int len)
-{
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int wrcount;
-	int status;
-
-	for (wrcount = 0; wrcount < len; ++wrcount) {
-
-		mpc_reg_out (&regs->dr, buf[wrcount], 0);
-
-		if (wait_for_pin (&status))
-			break;
-
-		if (status & I2C_RXAK)
-			break;
-
-	}
-
-	return !(wrcount == len);
-	return 0;
-}
-
-static int receive_bytes (uchar chip, char *buf, int len)
-{
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int dummy = 1;
-	int rdcount = 0;
-	int status;
-	int i;
-
-	mpc_reg_out (&regs->cr, 0, I2C_TX);
-
-	for (i = 0; i < len; ++i) {
-		buf[rdcount] = mpc_reg_in (&regs->dr);
-
-		if (dummy)
-			dummy = 0;
-		else
-			rdcount++;
-
-		if (wait_for_pin (&status))
-			return -4;
-	}
-
-	mpc_reg_out (&regs->cr, I2C_TXAK, I2C_TXAK);
-	buf[rdcount++] = mpc_reg_in (&regs->dr);
-
-	if (wait_for_pin (&status))
-		return -5;
-
-	mpc_reg_out (&regs->cr, 0, I2C_TXAK);
-	return 0;
-}
-
-/**************** I2C API ****************/
-
-void i2c_init (int speed, int saddr)
-{
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-
-	mpc_reg_out (&regs->cr, 0, 0);
-	mpc_reg_out (&regs->adr, saddr << 1, 0);
-
-	/* Set clock
-	 */
-	mpc_reg_out (&regs->fdr, mpc_get_fdr (speed), 0);
-
-	/* Enable module
-	 */
-	mpc_reg_out (&regs->cr, I2C_EN, I2C_INIT_MASK);
-	mpc_reg_out (&regs->sr, 0, I2C_IF);
-	return;
-}
-
-static int mpc_get_fdr (int speed)
-{
-	static int fdr = -1;
-
-	if (fdr == -1) {
-		ulong best_speed = 0;
-		ulong divider;
-		ulong ipb, scl;
-		ulong bestmatch = 0xffffffffUL;
-		int best_i = 0, best_j = 0, i, j;
-		int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8 };
-		struct mpc8220_i2c_tap scltap[] = {
-			{4, 1},
-			{4, 2},
-			{6, 4},
-			{6, 8},
-			{14, 16},
-			{30, 32},
-			{62, 64},
-			{126, 128}
-		};
-
-		ipb = gd->bus_clk;
-		for (i = 7; i >= 0; i--) {
-			for (j = 7; j >= 0; j--) {
-				scl = 2 * (scltap[j].scl2tap +
-					   (SCL_Tap[i] -
-					    1) * scltap[j].tap2tap + 2);
-				if (ipb <= speed * scl) {
-					if ((speed * scl - ipb) < bestmatch) {
-						bestmatch = speed * scl - ipb;
-						best_i = i;
-						best_j = j;
-						best_speed = ipb / scl;
-					}
-				}
-			}
-		}
-		divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
-		if (gd->flags & GD_FLG_RELOC) {
-			fdr = divider;
-		} else {
-			printf ("%ld kHz, ", best_speed / 1000);
-			return divider;
-		}
-	}
-
-	return fdr;
-}
-
-int i2c_probe (uchar chip)
-{
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int i;
-
-	for (i = 0; i < I2C_RETRIES; i++) {
-		mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
-
-		if (!do_address (chip, 0)) {
-			mpc_reg_out (&regs->cr, 0, I2C_STA);
-			break;
-		}
-
-		mpc_reg_out (&regs->cr, 0, I2C_STA);
-		udelay (50);
-	}
-
-	return (i == I2C_RETRIES);
-}
-
-int i2c_read (uchar chip, uint addr, int alen, uchar * buf, int len)
-{
-	uchar xaddr[4];
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int ret = -1;
-
-	xaddr[0] = (addr >> 24) & 0xFF;
-	xaddr[1] = (addr >> 16) & 0xFF;
-	xaddr[2] = (addr >> 8) & 0xFF;
-	xaddr[3] = addr & 0xFF;
-
-	if (wait_for_bb ()) {
-		printf ("i2c_read: bus is busy\n");
-		goto Done;
-	}
-
-	mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
-	if (do_address (chip, 0)) {
-		printf ("i2c_read: failed to address chip\n");
-		goto Done;
-	}
-
-	if (send_bytes (chip, (char *)&xaddr[4 - alen], alen)) {
-		printf ("i2c_read: send_bytes failed\n");
-		goto Done;
-	}
-
-	mpc_reg_out (&regs->cr, I2C_RSTA, I2C_RSTA);
-	if (do_address (chip, 1)) {
-		printf ("i2c_read: failed to address chip\n");
-		goto Done;
-	}
-
-	if (receive_bytes (chip, (char *)buf, len)) {
-		printf ("i2c_read: receive_bytes failed\n");
-		goto Done;
-	}
-
-	ret = 0;
-      Done:
-	mpc_reg_out (&regs->cr, 0, I2C_STA);
-	return ret;
-}
-
-int i2c_write (uchar chip, uint addr, int alen, uchar * buf, int len)
-{
-	uchar xaddr[4];
-	i2c_t *regs = (i2c_t *) MMAP_I2C;
-	int ret = -1;
-
-	xaddr[0] = (addr >> 24) & 0xFF;
-	xaddr[1] = (addr >> 16) & 0xFF;
-	xaddr[2] = (addr >> 8) & 0xFF;
-	xaddr[3] = addr & 0xFF;
-
-	if (wait_for_bb ()) {
-		printf ("i2c_write: bus is busy\n");
-		goto Done;
-	}
-
-	mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
-	if (do_address (chip, 0)) {
-		printf ("i2c_write: failed to address chip\n");
-		goto Done;
-	}
-
-	if (send_bytes (chip, (char *)&xaddr[4 - alen], alen)) {
-		printf ("i2c_write: send_bytes failed\n");
-		goto Done;
-	}
-
-	if (send_bytes (chip, (char *)buf, len)) {
-		printf ("i2c_write: send_bytes failed\n");
-		goto Done;
-	}
-
-	ret = 0;
-      Done:
-	mpc_reg_out (&regs->cr, 0, I2C_STA);
-	return ret;
-}
-
-#endif /* CONFIG_HARD_I2C */
diff --git a/arch/powerpc/cpu/mpc8220/i2cCore.c b/arch/powerpc/cpu/mpc8220/i2cCore.c
deleted file mode 100644
index b89ad034f49..00000000000
--- a/arch/powerpc/cpu/mpc8220/i2cCore.c
+++ /dev/null
@@ -1,627 +0,0 @@
-/* I2cCore.c - MPC8220 PPC I2C Library */
-
-/* Copyright 2004      Freescale Semiconductor, Inc. */
-
-/*
-modification history
---------------------
-01c,29jun04,tcl	 1.3	removed CR. Added two bytes offset support.
-01b,19jan04,tcl	 1.2	removed i2cMsDelay and sysDecGet. renamed i2cMsDelay
-			back to sysMsDelay
-01a,19jan04,tcl	 1.1	created and seperated from i2c.c
-*/
-
-/*
-DESCRIPTION
-This file contain I2C low level handling library functions
-*/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <vxWorks.h>
-#include <sysLib.h>
-#include <iosLib.h>
-#include <logLib.h>
-#include <tickLib.h>
-
-/* BSP Includes */
-#include "config.h"
-#include "mpc8220.h"
-#include "i2cCore.h"
-
-#ifdef DEBUG_I2CCORE
-int I2CCDbg = 0;
-#endif
-
-#define ABS(x)	((x < 0)? -x : x)
-
-char *I2CERR[16] = {
-	"Transfer in Progress\n",	/* 0 */
-	"Transfer complete\n",
-	"Not Addressed\n",		/* 2 */
-	"Addressed as a slave\n",
-	"Bus is Idle\n",		/* 4 */
-	"Bus is busy\n",
-	"Arbitration Lost\n",		/* 6 */
-	"Arbitration on Track\n",
-	"Slave receive, master writing to slave\n",	/* 8 */
-	"Slave transmit, master reading from slave\n",
-	"Interrupt is pending\n",	/* 10 */
-	"Interrupt complete\n",
-	"Acknowledge received\n",	/* 12 */
-	"No acknowledge received\n",
-	"Unknown status\n",		/* 14 */
-	"\n"
-};
-
-/******************************************************************************
- *
- * chk_status - Check I2C status bit
- *
- * RETURNS: OK, or ERROR if the bit encounter
- *
- */
-
-STATUS chk_status (PSI2C pi2c, UINT8 sta_bit, UINT8 truefalse)
-{
-	int i, status = 0;
-
-	for (i = 0; i < I2C_POLL_COUNT; i++) {
-		if ((pi2c->sr & sta_bit) == (truefalse ? sta_bit : 0))
-			return (OK);
-	}
-
-	I2CCDBG (L2, ("--- sr %x stabit %x truefalse %d\n",
-		      pi2c->sr, sta_bit, truefalse, 0, 0, 0));
-
-	if (i == I2C_POLL_COUNT) {
-		switch (sta_bit) {
-		case I2C_STA_CF:
-			status = 0;
-			break;
-		case I2C_STA_AAS:
-			status = 2;
-			break;
-		case I2C_STA_BB:
-			status = 4;
-			break;
-		case I2C_STA_AL:
-			status = 6;
-			break;
-		case I2C_STA_SRW:
-			status = 8;
-			break;
-		case I2C_STA_IF:
-			status = 10;
-			break;
-		case I2C_STA_RXAK:
-			status = 12;
-			break;
-		default:
-			status = 14;
-			break;
-		}
-
-		if (!truefalse)
-			status++;
-
-		I2CCDBG (NO, ("--- status %d\n", status, 0, 0, 0, 0, 0));
-		I2CCDBG (NO, (I2CERR[status], 0, 0, 0, 0, 0, 0));
-	}
-
-	return (ERROR);
-}
-
-/******************************************************************************
- *
- * I2C Enable - Enable the I2C Controller
- *
- */
-STATUS i2c_enable (SI2C * pi2c, PI2CSET pi2cSet)
-{
-	int fdr = pi2cSet->bit_rate;
-	UINT8 adr = pi2cSet->i2c_adr;
-
-	I2CCDBG (L2, ("i2c_enable fdr %d adr %x\n", fdr, adr, 0, 0, 0, 0));
-
-	i2c_clear (pi2c);	/* Clear FDR, ADR, SR and CR reg */
-
-	SetI2cFDR (pi2c, fdr);	/* Frequency			*/
-	pi2c->adr = adr;
-
-	pi2c->cr = I2C_CTL_EN;	/* Set Enable			*/
-
-	/*
-	   The I2C bus should be in Idle state. If the bus is busy,
-	   clear the STA bit in control register
-	 */
-	if (chk_status (pi2c, I2C_STA_BB, 0) != OK) {
-		if ((pi2c->cr & I2C_CTL_STA) == I2C_CTL_STA)
-			pi2c->cr &= ~I2C_CTL_STA;
-
-		/* Check again if it is still busy, return error if found */
-		if (chk_status (pi2c, I2C_STA_BB, 1) == OK)
-			return ERROR;
-	}
-
-	return (OK);
-}
-
-/******************************************************************************
- *
- * I2C Disable - Disable the I2C Controller
- *
- */
-STATUS i2c_disable (PSI2C pi2c)
-{
-	i2c_clear (pi2c);
-
-	pi2c->cr &= I2C_CTL_EN; /* Disable I2c			*/
-
-	if ((pi2c->cr & I2C_CTL_STA) == I2C_CTL_STA)
-		pi2c->cr &= ~I2C_CTL_STA;
-
-	if (chk_status (pi2c, I2C_STA_BB, 0) != OK)
-		return ERROR;
-
-	return (OK);
-}
-
-/******************************************************************************
- *
- * I2C Clear - Clear the I2C Controller
- *
- */
-STATUS i2c_clear (PSI2C pi2c)
-{
-	pi2c->adr = 0;
-	pi2c->fdr = 0;
-	pi2c->cr = 0;
-	pi2c->sr = 0;
-
-	return (OK);
-}
-
-
-STATUS i2c_start (PSI2C pi2c, PI2CSET pi2cSet)
-{
-#ifdef TWOBYTES
-	UINT16 ByteOffset = pi2cSet->str_adr;
-#else
-	UINT8 ByteOffset = pi2cSet->str_adr;
-#endif
-#if 1
-	UINT8 tmp = 0;
-#endif
-	UINT8 Addr = pi2cSet->slv_adr;
-
-	pi2c->cr |= I2C_CTL_STA;	/* Generate start signal	*/
-
-	if (chk_status (pi2c, I2C_STA_BB, 1) != OK)
-		return ERROR;
-
-	/* Write slave address */
-	if (i2c_writebyte (pi2c, &Addr) != OK) {
-		i2c_stop (pi2c);	/* Disable I2c			*/
-		return ERROR;
-	}
-#ifdef TWOBYTES
-#   if 0
-	/* Issue the offset to start */
-	if (i2c_write2byte (pi2c, &ByteOffset) != OK) {
-		i2c_stop (pi2c);	/* Disable I2c			*/
-		return ERROR;
-	}
-#endif
-	tmp = (ByteOffset >> 8) & 0xff;
-	if (i2c_writebyte (pi2c, &tmp) != OK) {
-		i2c_stop (pi2c);	/* Disable I2c			*/
-		return ERROR;
-	}
-	tmp = ByteOffset & 0xff;
-	if (i2c_writebyte (pi2c, &tmp) != OK) {
-		i2c_stop (pi2c);	/* Disable I2c			*/
-		return ERROR;
-	}
-#else
-	if (i2c_writebyte (pi2c, &ByteOffset) != OK) {
-		i2c_stop (pi2c);	/* Disable I2c			*/
-		return ERROR;
-	}
-#endif
-
-	return (OK);
-}
-
-STATUS i2c_stop (PSI2C pi2c)
-{
-	pi2c->cr &= ~I2C_CTL_STA;	/* Generate stop signal		*/
-	if (chk_status (pi2c, I2C_STA_BB, 0) != OK)
-		return ERROR;
-
-	return (OK);
-}
-
-/******************************************************************************
- *
- * Read Len bytes to the location pointed to by *Data from the device
- * with address Addr.
- */
-int i2c_readblock (SI2C * pi2c, PI2CSET pi2cSet, UINT8 * Data)
-{
-	int i = 0;
-	UINT8 Tmp;
-
-/*    UINT8 ByteOffset = pi2cSet->str_adr; not used? */
-	UINT8 Addr = pi2cSet->slv_adr;
-	int Length = pi2cSet->xfer_size;
-
-	I2CCDBG (L1, ("i2c_readblock addr %x data 0x%08x len %d offset %d\n",
-		      Addr, (int) Data, Length, ByteOffset, 0, 0));
-
-	if (pi2c->sr & I2C_STA_AL) {	/* Check if Arbitration lost	*/
-		I2CCDBG (FN, ("Arbitration lost\n", 0, 0, 0, 0, 0, 0));
-		pi2c->sr &= ~I2C_STA_AL;	/* Clear Arbitration status bit */
-		return ERROR;
-	}
-
-	pi2c->cr |= I2C_CTL_TX; /* Enable the I2c for TX, Ack	*/
-
-	if (i2c_start (pi2c, pi2cSet) == ERROR)
-		return ERROR;
-
-	pi2c->cr |= I2C_CTL_RSTA;	/* Repeat Start */
-
-	Tmp = Addr | 1;
-
-	if (i2c_writebyte (pi2c, &Tmp) != OK) {
-		i2c_stop (pi2c);	/* Disable I2c	*/
-		return ERROR;
-	}
-
-	if (((pi2c->sr & 0x07) == 0x07) || (pi2c->sr & 0x01))
-		return ERROR;
-
-	pi2c->cr &= ~I2C_CTL_TX;	/* Set receive mode	*/
-
-	if (((pi2c->sr & 0x07) == 0x07) || (pi2c->sr & 0x01))
-		return ERROR;
-
-	/* Dummy Read */
-	if (i2c_readbyte (pi2c, &Tmp, &i) != OK) {
-		i2c_stop (pi2c);	/* Disable I2c	*/
-		return ERROR;
-	}
-
-	i = 0;
-	while (Length) {
-		if (Length == 2)
-			pi2c->cr |= I2C_CTL_TXAK;
-
-		if (Length == 1)
-			pi2c->cr &= ~I2C_CTL_STA;
-
-		if (i2c_readbyte (pi2c, Data, &Length) != OK) {
-			return i2c_stop (pi2c);
-		}
-		i++;
-		Length--;
-		Data++;
-	}
-
-	if (i2c_stop (pi2c) == ERROR)
-		return ERROR;
-
-	return i;
-}
-
-STATUS i2c_writeblock (SI2C * pi2c, PI2CSET pi2cSet, UINT8 * Data)
-{
-	int Length = pi2cSet->xfer_size;
-
-#ifdef TWOBYTES
-	UINT16 ByteOffset = pi2cSet->str_adr;
-#else
-	UINT8 ByteOffset = pi2cSet->str_adr;
-#endif
-	int j, k;
-
-	I2CCDBG (L2, ("i2c_writeblock\n", 0, 0, 0, 0, 0, 0));
-
-	if (pi2c->sr & I2C_STA_AL) {
-		/* Check if arbitration lost */
-		I2CCDBG (L2, ("Arbitration lost\n", 0, 0, 0, 0, 0, 0));
-		pi2c->sr &= ~I2C_STA_AL;	/* Clear the condition	*/
-		return ERROR;
-	}
-
-	pi2c->cr |= I2C_CTL_TX; /* Enable the I2c for TX, Ack	*/
-
-	/* Do the not even offset first */
-	if ((ByteOffset % 8) != 0) {
-		int remain;
-
-		if (Length > 8) {
-			remain = 8 - (ByteOffset % 8);
-			Length -= remain;
-
-			pi2cSet->str_adr = ByteOffset;
-
-			if (i2c_start (pi2c, pi2cSet) == ERROR)
-				return ERROR;
-
-			for (j = ByteOffset; j < remain; j++) {
-				if (i2c_writebyte (pi2c, Data++) != OK)
-					return ERROR;
-			}
-
-			if (i2c_stop (pi2c) == ERROR)
-				return ERROR;
-
-			sysMsDelay (32);
-
-			/* Update the new ByteOffset */
-			ByteOffset += remain;
-		}
-	}
-
-	for (j = ByteOffset, k = 0; j < (Length + ByteOffset); j++) {
-		if ((j % 8) == 0) {
-			pi2cSet->str_adr = j;
-			if (i2c_start (pi2c, pi2cSet) == ERROR)
-				return ERROR;
-		}
-
-		k++;
-
-		if (i2c_writebyte (pi2c, Data++) != OK)
-			return ERROR;
-
-		if ((j == (Length - 1)) || ((k % 8) == 0)) {
-			if (i2c_stop (pi2c) == ERROR)
-				return ERROR;
-
-			sysMsDelay (50);
-		}
-
-	}
-
-	return k;
-}
-
-STATUS i2c_readbyte (SI2C * pi2c, UINT8 * readb, int *index)
-{
-	pi2c->sr &= ~I2C_STA_IF;	/* Clear Interrupt Bit	*/
-	*readb = pi2c->dr;		/* Read a byte		*/
-
-	/*
-	   Set I2C_CTRL_TXAK will cause Transfer pending and
-	   set I2C_CTRL_STA will cause Interrupt pending
-	 */
-	if (*index != 2) {
-		if (chk_status (pi2c, I2C_STA_CF, 1) != OK)	/* Transfer not complete?	*/
-			return ERROR;
-	}
-
-	if (*index != 1) {
-		if (chk_status (pi2c, I2C_STA_IF, 1) != OK)
-			return ERROR;
-	}
-
-	return (OK);
-}
-
-
-STATUS i2c_writebyte (SI2C * pi2c, UINT8 * writeb)
-{
-	pi2c->sr &= ~I2C_STA_IF;	/* Clear Interrupt	*/
-	pi2c->dr = *writeb;		/* Write a byte		*/
-
-	if (chk_status (pi2c, I2C_STA_CF, 1) != OK)	/* Transfer not complete?	*/
-		return ERROR;
-
-	if (chk_status (pi2c, I2C_STA_IF, 1) != OK)
-		return ERROR;
-
-	return OK;
-}
-
-STATUS i2c_write2byte (SI2C * pi2c, UINT16 * writeb)
-{
-	UINT8 data;
-
-	data = (UINT8) ((*writeb >> 8) & 0xff);
-	if (i2c_writebyte (pi2c, &data) != OK)
-		return ERROR;
-	data = (UINT8) (*writeb & 0xff);
-	if (i2c_writebyte (pi2c, &data) != OK)
-		return ERROR;
-	return OK;
-}
-
-/* FDR table base on 33MHz - more detail please refer to Odini2c_dividers.xls
-FDR FDR scl sda scl2tap2
-510 432 tap tap tap tap scl_per	    sda_hold	I2C Freq    0	1   2	3   4	5
-000 000 9   3	4   1	28 Clocks   9 Clocks	1190 KHz    0	0   0	0   0	0
-000 001 9   3	4   2	44 Clocks   11 Clocks	758 KHz	    0	0   1	0   0	0
-000 010 9   3	6   4	80 Clocks   17 Clocks	417 KHz	    0	0   0	1   0	0
-000 011 9   3	6   8	144 Clocks  25 Clocks	231 KHz	    0	0   1	1   0	0
-000 100 9   3	14  16	288 Clocks  49 Clocks	116 KHz	    0	0   0	0   1	0
-000 101 9   3	30  32	576 Clocks  97 Clocks	58 KHz	    0	0   1	0   1	0
-000 110 9   3	62  64	1152 Clocks 193 Clocks	29 KHz	    0	0   0	1   1	0
-000 111 9   3	126 128 2304 Clocks 385 Clocks	14 KHz	    0	0   1	1   1	0
-001 000 10  3	4   1	30 Clocks   9 Clocks	1111 KHz1   0	0   0	0   0
-001 001 10  3	4   2	48 Clocks   11 Clocks	694 KHz	    1	0   1	0   0	0
-001 010 10  3	6   4	88 Clocks   17 Clocks	379 KHz	    1	0   0	1   0	0
-001 011 10  3	6   8	160 Clocks  25 Clocks	208 KHz	    1	0   1	1   0	0
-001 100 10  3	14  16	320 Clocks  49 Clocks	104 KHz	    1	0   0	0   1	0
-001 101 10  3	30  32	640 Clocks  97 Clocks	52 KHz	    1	0   1	0   1	0
-001 110 10  3	62  64	1280 Clocks 193 Clocks	26 KHz	    1	0   0	1   1	0
-001 111 10  3	126 128 2560 Clocks 385 Clocks	13 KHz	    1	0   1	1   1	0
-010 000 12  4	4   1	34 Clocks   10 Clocks	980 KHz	    0	1   0	0   0	0
-010 001 12  4	4   2	56 Clocks   13 Clocks	595 KHz	    0	1   1	0   0	0
-010 010 12  4	6   4	104 Clocks  21 Clocks	321 KHz	    0	1   0	1   0	0
-010 011 12  4	6   8	192 Clocks  33 Clocks	174 KHz	    0	1   1	1   0	0
-010 100 12  4	14  16	384 Clocks  65 Clocks	87 KHz	    0	1   0	0   1	0
-010 101 12  4	30  32	768 Clocks  129 Clocks	43 KHz	    0	1   1	0   1	0
-010 110 12  4	62  64	1536 Clocks 257 Clocks	22 KHz	    0	1   0	1   1	0
-010 111 12  4	126 128 3072 Clocks 513 Clocks	11 KHz	    0	1   1	1   1	0
-011 000 15  4	4   1	40 Clocks   10 Clocks	833 KHz	    1	1   0	0   0	0
-011 001 15  4	4   2	68 Clocks   13 Clocks	490 KHz	    1	1   1	0   0	0
-011 010 15  4	6   4	128 Clocks  21 Clocks	260 KHz	    1	1   0	1   0	0
-011 011 15  4	6   8	240 Clocks  33 Clocks	139 KHz	    1	1   1	1   0	0
-011 100 15  4	14  16	480 Clocks  65 Clocks	69 KHz	    1	1   0	0   1	0
-011 101 15  4	30  32	960 Clocks  129 Clocks	35 KHz	    1	1   1	0   1	0
-011 110 15  4	62  64	1920 Clocks 257 Clocks	17 KHz	    1	1   0	1   1	0
-011 111 15  4	126 128 3840 Clocks 513 Clocks	9 KHz	    1	1   1	1   1	0
-100 000 5   1	4   1	20 Clocks   7 Clocks	1667 KHz    0	0   0	0   0	1
-100 001 5   1	4   2	28 Clocks   7 Clocks	1190 KHz    0	0   1	0   0	1
-100 010 5   1	6   4	48 Clocks   9 Clocks	694 KHz	    0	0   0	1   0	1
-100 011 5   1	6   8	80 Clocks   9 Clocks	417 KHz	    0	0   1	1   0	1
-100 100 5   1	14  16	160 Clocks  17 Clocks	208 KHz	    0	0   0	0   1	1
-100 101 5   1	30  32	320 Clocks  33 Clocks	104 KHz	    0	0   1	0   1	1
-100 110 5   1	62  64	640 Clocks  65 Clocks	52 KHz	    0	0   0	1   1	1
-100 111 5   1	126 128 1280 Clocks 129 Clocks	26 KHz	    0	0   1	1   1	1
-101 000 6   1	4   1	22 Clocks   7 Clocks	1515 KHz    1	0   0	0   0	1
-101 001 6   1	4   2	32 Clocks   7 Clocks	1042 KHz    1	0   1	0   0	1
-101 010 6   1	6   4	56 Clocks   9 Clocks	595 KHz	    1	0   0	1   0	1
-101 011 6   1	6   8	96 Clocks   9 Clocks	347 KHz	    1	0   1	1   0	1
-101 100 6   1	14  16	192 Clocks  17 Clocks	174 KHz	    1	0   0	0   1	1
-101 101 6   1	30  32	384 Clocks  33 Clocks	87 KHz	    1	0   1	0   1	1
-101 110 6   1	62  64	768 Clocks  65 Clocks	43 KHz	    1	0   0	1   1	1
-101 111 6   1	126 128 1536 Clocks 129 Clocks	22 KHz	    1	0   1	1   1	1
-110 000 7   2	4   1	24 Clocks   8 Clocks	1389 KHz    0	1   0	0   0	1
-110 001 7   2	4   2	36 Clocks   9 Clocks	926 KHz	    0	1   1	0   0	1
-110 010 7   2	6   4	64 Clocks   13 Clocks	521 KHz	    0	1   0	1   0	1
-110 011 7   2	6   8	112 Clocks  17 Clocks	298 KHz	    0	1   1	1   0	1
-110 100 7   2	14  16	224 Clocks  33 Clocks	149 KHz	    0	1   0	0   1	1
-110 101 7   2	30  32	448 Clocks  65 Clocks	74 KHz	    0	1   1	0   1	1
-110 110 7   2	62  64	896 Clocks  129 Clocks	37 KHz	    0	1   0	1   1	1
-110 111 7   2	126 128 1792 Clocks 257 Clocks	19 KHz	    0	1   1	1   1	1
-111 000 8   2	4   1	26 Clocks   8 Clocks	1282 KHz    1	1   0	0   0	1
-111 001 8   2	4   2	40 Clocks   9 Clocks	833 KHz	    1	1   1	0   0	1
-111 010 8   2	6   4	72 Clocks   13 Clocks	463 KHz	    1	1   0	1   0	1
-111 011 8   2	6   8	128 Clocks  17 Clocks	260 KHz	    1	1   1	1   0	1
-111 100 8   2	14  16	256 Clocks  33 Clocks	130 KHz	    1	1   0	0   1	1
-111 101 8   2	30  32	512 Clocks  65 Clocks	65 KHz	    1	1   1	0   1	1
-111 110 8   2	62  64	1024 Clocks 129 Clocks	33 KHz	    1	1   0	1   1	1
-111 111 8   2	126 128 2048 Clocks 257 Clocks	16 KHz	    1	1   1	1   1	1
-*/
-STATUS SetI2cFDR (PSI2C pi2cRegs, int bitrate)
-{
-/* Constants */
-	const UINT8 div_hold[8][3] = { {9, 3}, {10, 3},
-	{12, 4}, {15, 4},
-	{5, 1}, {6, 1},
-	{7, 2}, {8, 2}
-	};
-
-	const UINT8 scl_tap[8][2] = { {4, 1}, {4, 2},
-	{6, 4}, {6, 8},
-	{14, 16}, {30, 32},
-	{62, 64}, {126, 128}
-	};
-
-	UINT8 mfdr_bits;
-
-	int i = 0;
-	int j = 0;
-
-	int Diff, min;
-	int WhichFreq, iRec, jRec;
-	int SCL_Period;
-	int SCL_Hold;
-	int I2C_Freq;
-
-	I2CCDBG (L2, ("Entering getBitRate: bitrate %d pi2cRegs 0x%08x\n",
-		      bitrate, (int) pi2cRegs, 0, 0, 0, 0));
-
-	if (bitrate < 0) {
-		I2CCDBG (NO, ("Invalid bitrate\n", 0, 0, 0, 0, 0, 0));
-		return ERROR;
-	}
-
-	/* Initialize */
-	mfdr_bits = 0;
-	min = 0x7fffffff;
-	WhichFreq = iRec = jRec = 0;
-
-	for (i = 0; i < 8; i++) {
-		for (j = 0; j < 8; j++) {
-			/* SCL Period = 2 * (scl2tap + [(SCL_Tap - 1) * tap2tap] + 2)
-			 * SCL Hold   = scl2tap + ((SDA_Tap - 1) * tap2tap) + 3
-			 * Bit Rate (I2C Freq) = System Freq / SCL Period
-			 */
-			SCL_Period =
-				2 * (scl_tap[i][0] +
-				     ((div_hold[j][0] - 1) * scl_tap[i][1]) +
-				     2);
-
-			/* Now get the I2C Freq */
-			I2C_Freq = DEV_CLOCK_FREQ / SCL_Period;
-
-			/* Take equal or slower */
-			if (I2C_Freq > bitrate)
-				continue;
-
-			/* Take the differences */
-			Diff = I2C_Freq - bitrate;
-
-			Diff = ABS (Diff);
-
-			/* Find the closer value */
-			if (Diff < min) {
-				min = Diff;
-				WhichFreq = I2C_Freq;
-				iRec = i;
-				jRec = j;
-			}
-
-			I2CCDBG (L2,
-				 ("--- (%d,%d) I2C_Freq %d minDiff %d min %d\n",
-				  i, j, I2C_Freq, Diff, min, 0));
-		}
-	}
-
-	SCL_Period =
-		2 * (scl_tap[iRec][0] +
-		     ((div_hold[jRec][0] - 1) * scl_tap[iRec][1]) + 2);
-
-	I2CCDBG (L2, ("\nmin %d WhichFreq %d iRec %d jRec %d\n",
-		      min, WhichFreq, iRec, jRec, 0, 0));
-	I2CCDBG (L2, ("--- scl2tap %d SCL_Tap %d tap2tap %d\n",
-		      scl_tap[iRec][0], div_hold[jRec][0], scl_tap[iRec][1],
-		      0, 0, 0));
-
-	/* This may no require */
-	SCL_Hold =
-		scl_tap[iRec][0] +
-		((div_hold[jRec][1] - 1) * scl_tap[iRec][1]) + 3;
-	I2CCDBG (L2,
-		 ("--- SCL_Period %d SCL_Hold %d\n", SCL_Period, SCL_Hold, 0,
-		  0, 0, 0));
-
-	I2CCDBG (L2, ("--- mfdr_bits %x\n", mfdr_bits, 0, 0, 0, 0, 0));
-
-	/* FDR 4,3,2 */
-	if ((iRec & 1) == 1)
-		mfdr_bits |= 0x04;	/* FDR 2 */
-	if ((iRec & 2) == 2)
-		mfdr_bits |= 0x08;	/* FDR 3 */
-	if ((iRec & 4) == 4)
-		mfdr_bits |= 0x10;	/* FDR 4 */
-	/* FDR 5,1,0 */
-	if ((jRec & 1) == 1)
-		mfdr_bits |= 0x01;	/* FDR 0 */
-	if ((jRec & 2) == 2)
-		mfdr_bits |= 0x02;	/* FDR 1 */
-	if ((jRec & 4) == 4)
-		mfdr_bits |= 0x20;	/* FDR 5 */
-
-	I2CCDBG (L2, ("--- mfdr_bits %x\n", mfdr_bits, 0, 0, 0, 0, 0));
-
-	pi2cRegs->fdr = mfdr_bits;
-
-	return OK;
-}
diff --git a/arch/powerpc/cpu/mpc8220/i2cCore.h b/arch/powerpc/cpu/mpc8220/i2cCore.h
deleted file mode 100644
index 72783fd48b1..00000000000
--- a/arch/powerpc/cpu/mpc8220/i2cCore.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * i2cCore.h
- *
- * Prototypes, etc. for the Motorola MPC8220
- * embedded cpu chips
- *
- * 2004 (c) Freescale, Inc.
- * Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __INCi2ccoreh
-#define __INCi2ccoreh
-#ifndef __ASSEMBLY__
-/* device types */
-#define I2C_DEVICE_TYPE_EEPROM 0
-#define I2C_EEPROM_ADRS 0xa0
-#define I2C_CTRL_ADRS   I2C_EEPROM_ADRS
-#define EEPROM_ADDR0    0xA2	/* on Dimm SPD eeprom */
-#define EEPROM_ADDR1    0xA4	/* on Board SPD eeprom */
-#define EEPROM_ADDR2    0xD2	/* non-standard eeprom - clock generator */
-/* Control Register */
-#define I2C_CTL_EN      0x80	/* I2C Enable                   */
-#define I2C_CTL_IEN     0x40	/* I2C Interrupt Enable         */
-#define I2C_CTL_STA     0x20	/* Master/Slave Mode select     */
-#define I2C_CTL_TX      0x10	/* Transmit/Receive Mode Select */
-#define I2C_CTL_TXAK    0x08	/* Transmit Acknowledge Enable  */
-#define I2C_CTL_RSTA    0x04	/* Repeat Start                 */
-/* Status Register */
-#define I2C_STA_CF      0x80	/* Data Transfer       */
-#define I2C_STA_AAS     0x40	/* Adressed As Slave   */
-#define I2C_STA_BB      0x20	/* Bus Busy            */
-#define I2C_STA_AL      0x10	/* Arbitration Lost    */
-#define I2C_STA_SRW     0x04	/* Slave Read/Write    */
-#define I2C_STA_IF      0x02	/* I2C Interrupt       */
-#define I2C_STA_RXAK    0x01	/* Receive Acknowledge */
-/* Interrupt Contol Register */
-#define I2C_INT_BNBE2   0x80	/* Bus Not Busy Enable 2 */
-#define I2C_INT_TE2     0x40	/* Transmit Enable 2     */
-#define I2C_INT_RE2     0x20	/* Receive Enable 2      */
-#define I2C_INT_IE2     0x10	/* Interrupt Enable 2    */
-#define I2C_INT_BNBE1   0x08	/* Bus Not Busy Enable 1 */
-#define I2C_INT_TE1     0x04	/* Transmit Enable 1     */
-#define I2C_INT_RE1     0x02	/* Receive Enable 1      */
-#define I2C_INT_IE1     0x01	/* Interrupt Enable 1    */
-#define I2C_POLL_COUNT 0x100000
-#define I2C_ENABLE      0x00000001
-#define I2C_DISABLE     0x00000002
-#define I2C_START       0x00000004
-#define I2C_REPSTART    0x00000008
-#define I2C_STOP        0x00000010
-#define I2C_BITRATE     0x00000020
-#define I2C_SLAVEADR    0x00000040
-#define I2C_STARTADR    0x00000080
-#undef TWOBYTES
-typedef struct i2c_settings {
-	/* Device settings */
-	int bit_rate;		/* Device bit rate */
-	u8 i2c_adr;		/* I2C address */
-	u8 slv_adr;		/* Slave address */
-#ifdef TWOBYTES
-	u16 str_adr;		/* Start address */
-#else
-	u8 str_adr;		/* Start address */
-#endif
-	int xfer_size;		/* Transfer Size */
-
-	int bI2c_en;		/* Enable or Disable */
-	int cmdFlag;		/* I2c Command Flags */
-} i2cset_t;
-
-/*
-int check_status(PSI2C pi2c, u8 sta_bit, u8 truefalse);
-int i2c_enable(PSI2C pi2c, PI2CSET pi2cSet);
-int i2c_disable(PSI2C pi2c);
-int i2c_start(PSI2C pi2c, PI2CSET pi2cSet);
-int i2c_stop(PSI2C pi2c);
-int i2c_clear(PSI2C pi2c);
-int i2c_readblock (PSI2C pi2c, PI2CSET pi2cSet, u8 *Data);
-int i2c_writeblock (PSI2C pi2c, PI2CSET pi2cSet, u8 *Data);
-int i2c_readbyte(PSI2C pi2c, u8 *readb, int *index);
-int i2c_writebyte(PSI2C pi2c, u8 *writeb);
-int SetI2cFDR( PSI2C pi2cRegs, int bitrate );
-*/
-#endif /* __ASSEMBLY__ */
-
-#endif /* __INCi2ccoreh */
diff --git a/arch/powerpc/cpu/mpc8220/interrupts.c b/arch/powerpc/cpu/mpc8220/interrupts.c
deleted file mode 100644
index 9544d85b559..00000000000
--- a/arch/powerpc/cpu/mpc8220/interrupts.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * (C) Copyright -2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * interrupts.c - just enough support for the decrementer/timer
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-
-int interrupt_init_cpu (ulong * decrementer_count)
-{
-	*decrementer_count = get_tbclk () / CONFIG_SYS_HZ;
-
-	return (0);
-}
-
-/****************************************************************************/
-
-/*
- * Handle external interrupts
- */
-void external_interrupt (struct pt_regs *regs)
-{
-	puts ("external_interrupt (oops!)\n");
-}
-
-void timer_interrupt_cpu (struct pt_regs *regs)
-{
-	/* nothing to do here */
-	return;
-}
-
-/****************************************************************************/
-
-/*
- * Install and free a interrupt handler.
- */
-
-void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
-{
-
-}
-
-void irq_free_handler (int vec)
-{
-
-}
-
-/****************************************************************************/
-
-void
-do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
-{
-	puts ("IRQ related functions are unimplemented currently.\n");
-}
diff --git a/arch/powerpc/cpu/mpc8220/io.S b/arch/powerpc/cpu/mpc8220/io.S
deleted file mode 100644
index 5ecdf550a17..00000000000
--- a/arch/powerpc/cpu/mpc8220/io.S
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
- *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2001	Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *			Andreas Heppel <aheppel@sysgo.de>
- *  Copyright (C) 2003	Wolfgang Denk <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <ppc_asm.tmpl>
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  in8 */
-/*  Description:  Input 8 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	in8
-in8:
-	lbz	r3,0(r3)
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  in16 */
-/*  Description:  Input 16 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	in16
-in16:
-	lhz	r3,0(r3)
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  in16r */
-/*  Description:  Input 16 bits and byte reverse */
-/* ------------------------------------------------------------------------------- */
-	.globl	in16r
-in16r:
-	lhbrx	r3,0,r3
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  in32 */
-/*  Description:  Input 32 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	in32
-in32:
-	lwz	3,0(3)
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  in32r */
-/*  Description:  Input 32 bits and byte reverse */
-/* ------------------------------------------------------------------------------- */
-	.globl	in32r
-in32r:
-	lwbrx	r3,0,r3
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  out8 */
-/*  Description:  Output 8 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	out8
-out8:
-	stb	r4,0(r3)
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  out16 */
-/*  Description:  Output 16 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	out16
-out16:
-	sth	r4,0(r3)
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  out16r */
-/*  Description:  Byte reverse and output 16 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	out16r
-out16r:
-	sthbrx	r4,0,r3
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  out32 */
-/*  Description:  Output 32 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	out32
-out32:
-	stw	r4,0(r3)
-	sync
-	blr
-
-/* ------------------------------------------------------------------------------- */
-/*  Function:	  out32r */
-/*  Description:  Byte reverse and output 32 bits */
-/* ------------------------------------------------------------------------------- */
-	.globl	out32r
-out32r:
-	stwbrx	r4,0,r3
-	sync
-	blr
diff --git a/arch/powerpc/cpu/mpc8220/loadtask.c b/arch/powerpc/cpu/mpc8220/loadtask.c
deleted file mode 100644
index 6d8b627e8c6..00000000000
--- a/arch/powerpc/cpu/mpc8220/loadtask.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This file is based on code
- * (C) Copyright Motorola, Inc., 2000
- */
-
-#include <common.h>
-#include <mpc8220.h>
-
-/* Multichannel DMA microcode */
-extern int taskTable;
-
-void loadtask (int basetask, int tasks)
-{
-	int *sram = (int *) (MMAP_SRAM + 512);
-	int *task_org = &taskTable;
-	unsigned int start, offset, end;
-	int i;
-
-#ifdef DEBUG
-	printf ("basetask = %d, tasks = %d\n", basetask, tasks);
-	printf ("task_org = 0x%08x\n", (unsigned int) task_org);
-#endif
-
-	/* setup TaskBAR register */
-	*(vu_long *) MMAP_DMA = (MMAP_SRAM + 512);
-
-	/* relocate task table entries */
-	offset = (unsigned int) sram;
-	for (i = basetask; i < basetask + tasks; i++) {
-		sram[i * 8 + 0] = task_org[i * 8 + 0] + offset;
-		sram[i * 8 + 1] = task_org[i * 8 + 1] + offset;
-		sram[i * 8 + 2] = task_org[i * 8 + 2] + offset;
-		sram[i * 8 + 3] = task_org[i * 8 + 3] + offset;
-		sram[i * 8 + 4] = task_org[i * 8 + 4];
-		sram[i * 8 + 5] = task_org[i * 8 + 5];
-		sram[i * 8 + 6] = task_org[i * 8 + 6] + offset;
-		sram[i * 8 + 7] = task_org[i * 8 + 7];
-	}
-
-	/* relocate task descriptors */
-	start = (sram[basetask * 8] - (unsigned int) sram);
-	end = (sram[(basetask + tasks - 1) * 8 + 1] - (unsigned int) sram);
-
-#ifdef DEBUG
-	printf ("TDT start = 0x%08x, end = 0x%08x\n", start, end);
-#endif
-
-	start /= 4;
-	end /= 4;
-	for (i = start; i <= end; i++) {
-		sram[i] = task_org[i];
-	}
-
-	/* relocate variables */
-	start = (sram[basetask * 8 + 2] - (unsigned int) sram);
-	end = (sram[(basetask + tasks - 1) * 8 + 2] + 256 -
-	       (unsigned int) sram);
-	start /= 4;
-	end /= 4;
-	for (i = start; i < end; i++) {
-		sram[i] = task_org[i];
-	}
-
-	/* relocate function decriptors */
-	start = ((sram[basetask * 8 + 3] & 0xfffffffc) - (unsigned int) sram);
-	end = ((sram[(basetask + tasks - 1) * 8 + 3] & 0xfffffffc) + 256 -
-	       (unsigned int) sram);
-	start /= 4;
-	end /= 4;
-	for (i = start; i < end; i++) {
-		sram[i] = task_org[i];
-	}
-
-	asm volatile ("sync");
-}
diff --git a/arch/powerpc/cpu/mpc8220/pci.c b/arch/powerpc/cpu/mpc8220/pci.c
deleted file mode 100644
index 7ef43b72cd7..00000000000
--- a/arch/powerpc/cpu/mpc8220/pci.c
+++ /dev/null
@@ -1,191 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright (C) 2003 Motorola Inc.
- * Xianghua Xiao (x.xiao@motorola.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * PCI Configuration space access support for MPC8220 PCI Bridge
- */
-#include <common.h>
-#include <mpc8220.h>
-#include <pci.h>
-#include <asm/io.h>
-
-#if defined(CONFIG_PCI)
-
-/* System RAM mapped over PCI */
-#define CONFIG_PCI_SYS_MEM_BUS	 CONFIG_SYS_SDRAM_BASE
-#define CONFIG_PCI_SYS_MEM_PHYS	 CONFIG_SYS_SDRAM_BASE
-#define CONFIG_PCI_SYS_MEM_SIZE	 (1024 * 1024 * 1024)
-
-#define cfg_read(val, addr, type, op)		*val = op((type)(addr));
-#define cfg_write(val, addr, type, op)		op((type *)(addr), (val));
-
-#define PCI_OP(rw, size, type, op, mask)				\
-int mpc8220_pci_##rw##_config_##size(struct pci_controller *hose,	\
-	pci_dev_t dev, int offset, type val)				\
-{									\
-	u32 addr = 0;							\
-	u16 cfg_type = 0;						\
-	addr = ((offset & 0xfc) | cfg_type | (dev)  | 0x80000000);	\
-	out_be32(hose->cfg_addr, addr);					\
-	__asm__ __volatile__("sync");					\
-	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	\
-	out_be32(hose->cfg_addr, addr & 0x7fffffff);			\
-	__asm__ __volatile__("sync");					\
-	return 0;							\
-}
-
-PCI_OP(read, byte, u8 *, in_8, 3)
-PCI_OP(read, word, u16 *, in_le16, 2)
-PCI_OP(write, byte, u8, out_8, 3)
-PCI_OP(write, word, u16, out_le16, 2)
-PCI_OP(write, dword, u32, out_le32, 0)
-
-int mpc8220_pci_read_config_dword(struct pci_controller *hose, pci_dev_t dev,
-	int offset, u32 *val)
-{
-	u32 addr;
-	u32 tmpv;
-	u32 mask = 2;	 /* word access */
-	/* Read lower 16 bits */
-	addr = ((offset & 0xfc) | (dev) | 0x80000000);
-	out_be32(hose->cfg_addr, addr);
-	__asm__ __volatile__("sync");
-	*val = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask)));
-	out_be32(hose->cfg_addr, addr & 0x7fffffff);
-	__asm__ __volatile__("sync");
-
-	/* Read upper 16 bits */
-	offset += 2;
-	addr = ((offset & 0xfc) | 1 | (dev) | 0x80000000);
-	out_be32(hose->cfg_addr, addr);
-	__asm__ __volatile__("sync");
-	tmpv = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask)));
-	out_be32(hose->cfg_addr, addr & 0x7fffffff);
-	__asm__ __volatile__("sync");
-
-	/* combine results into dword value */
-	*val = (tmpv << 16) | *val;
-
-	return 0;
-}
-
-void
-pci_mpc8220_init(struct pci_controller *hose)
-{
-	u32 win0, win1, win2;
-	volatile mpc8220_xcpci_t *xcpci =
-		(volatile mpc8220_xcpci_t *) MMAP_XCPCI;
-
-	volatile pcfg8220_t *portcfg = (volatile pcfg8220_t *) MMAP_PCFG;
-
-	win0 = (u32) CONFIG_PCI_MEM_PHYS;
-	win1 = (u32) CONFIG_PCI_IO_PHYS;
-	win2 = (u32) CONFIG_PCI_CFG_PHYS;
-
-	/* Assert PCI reset */
-	out_be32 (&xcpci->glb_stat_ctl, PCI_GLB_STAT_CTRL_PR);
-
-	/* Disable prefetching but read-multiples will still prefetch */
-	out_be32 (&xcpci->target_ctrl, 0x00000000);
-
-	/* Initiator windows */
-	out_be32 (&xcpci->init_win0,  (win0 >> 16) | win0 | 0x003f0000);
-	out_be32 (&xcpci->init_win1, ((win1 >> 16) | win1 ));
-	out_be32 (&xcpci->init_win2, ((win2 >> 16) | win2 ));
-
-	out_be32 (&xcpci->init_win_cfg,
-		PCI_INIT_WIN_CFG_WIN0_CTRL_EN |
-		PCI_INIT_WIN_CFG_WIN1_CTRL_EN | PCI_INIT_WIN_CFG_WIN1_CTRL_IO |
-		PCI_INIT_WIN_CFG_WIN2_CTRL_EN | PCI_INIT_WIN_CFG_WIN2_CTRL_IO);
-
-	out_be32 (&xcpci->init_ctrl, 0x00000000);
-
-	/* Enable bus master and mem access */
-	out_be32 (&xcpci->stat_cmd_reg, PCI_STAT_CMD_B | PCI_STAT_CMD_M);
-
-	/* Cache line size and master latency */
-	out_be32 (&xcpci->bist_htyp_lat_cshl, (0xf8 << PCI_CFG1_LT_SHIFT));
-
-	out_be32 (&xcpci->base0, PCI_BASE_ADDR_REG0); /* 256MB - MBAR space */
-	out_be32 (&xcpci->base1, PCI_BASE_ADDR_REG1); /* 1GB - SDRAM space */
-
-	out_be32 (&xcpci->target_bar0,
-		PCI_TARGET_BASE_ADDR_REG0 | PCI_TARGET_BASE_ADDR_EN);
-	out_be32 (&xcpci->target_bar1,
-		PCI_TARGET_BASE_ADDR_REG1 | PCI_TARGET_BASE_ADDR_EN);
-
-	/* Deassert reset bit */
-	out_be32 (&xcpci->glb_stat_ctl, 0x00000000);
-
-	/* Enable PCI bus master support */
-	/* Set PCIGNT1, PCIREQ1, PCIREQ0/PCIGNTIN, PCIGNT0/PCIREQOUT,
-	       PCIREQ2, PCIGNT2 */
-	out_be32((volatile u32 *)&portcfg->pcfg3,
-		(in_be32((volatile u32 *)&portcfg->pcfg3) & 0xFC3FCE7F));
-	out_be32((volatile u32 *)&portcfg->pcfg3,
-		(in_be32((volatile u32 *)&portcfg->pcfg3) | 0x01400180));
-
-	hose->first_busno = 0;
-	hose->last_busno = 0xff;
-
-	pci_set_region(hose->regions + 0,
-		CONFIG_PCI_MEM_BUS,
-		CONFIG_PCI_MEM_PHYS,
-		CONFIG_PCI_MEM_SIZE,
-		PCI_REGION_MEM);
-
-	pci_set_region(hose->regions + 1,
-		CONFIG_PCI_IO_BUS,
-		CONFIG_PCI_IO_PHYS,
-		CONFIG_PCI_IO_SIZE,
-		PCI_REGION_IO);
-
-	pci_set_region(hose->regions + 2,
-		CONFIG_PCI_SYS_MEM_BUS,
-		CONFIG_PCI_SYS_MEM_PHYS,
-		CONFIG_PCI_SYS_MEM_SIZE,
-		PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-	hose->region_count = 3;
-
-	hose->cfg_addr = &(xcpci->cfg_adr);
-	hose->cfg_data = (volatile unsigned char *)CONFIG_PCI_CFG_BUS;
-
-	pci_set_ops(hose,
-		mpc8220_pci_read_config_byte,
-		mpc8220_pci_read_config_word,
-		mpc8220_pci_read_config_dword,
-		mpc8220_pci_write_config_byte,
-		mpc8220_pci_write_config_word,
-		mpc8220_pci_write_config_dword);
-
-	/* Hose scan */
-	pci_register_hose(hose);
-	hose->last_busno = pci_hose_scan(hose);
-
-	out_be32 (&xcpci->base0, PCI_BASE_ADDR_REG0); /* 256MB - MBAR space */
-	out_be32 (&xcpci->base1, PCI_BASE_ADDR_REG1); /* 1GB - SDRAM space */
-}
-
-#endif /* CONFIG_PCI */
diff --git a/arch/powerpc/cpu/mpc8220/speed.c b/arch/powerpc/cpu/mpc8220/speed.c
deleted file mode 100644
index bb72e5ce126..00000000000
--- a/arch/powerpc/cpu/mpc8220/speed.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale, Inc
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8220.h>
-#include <asm/processor.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-typedef struct pllmultiplier {
-	u8 hid1;
-	int multi;
-	int vco_div;
-} pllcfg_t;
-
-/* ------------------------------------------------------------------------- */
-
-/*
- *
- */
-
-int get_clocks (void)
-{
-	pllcfg_t bus2core[] = {
-		{0x02, 2, 8},	/* 1 */
-		{0x01, 2, 4},
-		{0x0C, 3, 8},	/* 1.5 */
-		{0x00, 3, 4},
-		{0x18, 3, 2},
-		{0x05, 4, 4},	/* 2 */
-		{0x04, 4, 2},
-		{0x11, 5, 4},	/* 2.5 */
-		{0x06, 5, 2},
-		{0x10, 6, 4},	/* 3 */
-		{0x08, 6, 2},
-		{0x0E, 7, 2},	/* 3.5 */
-		{0x0A, 8, 2},	/* 4 */
-		{0x07, 9, 2},	/* 4.5 */
-		{0x0B, 10, 2},	/* 5 */
-		{0x09, 11, 2},	/* 5.5 */
-		{0x0D, 12, 2},	/* 6 */
-		{0x12, 13, 2},	/* 6.5 */
-		{0x14, 14, 2},	/* 7 */
-		{0x16, 15, 2},	/* 7.5 */
-		{0x1C, 16, 2}	/* 8 */
-	};
-	u32 hid1;
-	int i, size, pci2bus;
-
-#if !defined(CONFIG_SYS_MPC8220_CLKIN)
-#error clock measuring not implemented yet - define CONFIG_SYS_MPC8220_CLKIN
-#endif
-
-	gd->arch.inp_clk = CONFIG_SYS_MPC8220_CLKIN;
-
-	/* Read XLB to PCI(INP) clock multiplier */
-	pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR) &
-		PCI_REG_PCIGSCR_PCI2XLB_CLK_MASK)>>PCI_REG_PCIGSCR_PCI2XLB_CLK_BIT;
-
-	/* XLB bus clock */
-	gd->bus_clk = CONFIG_SYS_MPC8220_CLKIN * pci2bus;
-
-	/* PCI clock is same as input clock */
-	gd->pci_clk = CONFIG_SYS_MPC8220_CLKIN;
-
-	/* FlexBus is temporary set as the same as input clock */
-	/* will do dynamic in the future */
-	gd->arch.flb_clk = CONFIG_SYS_MPC8220_CLKIN;
-
-	/* CPU Clock - Read HID1 */
-	asm volatile ("mfspr %0, 1009":"=r" (hid1):);
-
-	size = sizeof (bus2core) / sizeof (pllcfg_t);
-
-	hid1 >>= 27;
-
-	for (i = 0; i < size; i++)
-		if (hid1 == bus2core[i].hid1) {
-			gd->cpu_clk = (bus2core[i].multi * gd->bus_clk) >> 1;
-			gd->arch.vco_clk =
-				CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER *
-				(gd->pci_clk * bus2core[i].vco_div) / 2;
-			break;
-		}
-
-	/* hardcoded 81MHz for now */
-	gd->arch.pev_clk = 81000000;
-
-	return (0);
-}
-
-int prt_mpc8220_clks (void)
-{
-	char buf1[32], buf2[32], buf3[32], buf4[32];
-
-	printf ("       Bus %s MHz, CPU %s MHz, PCI %s MHz, VCO %s MHz\n",
-		strmhz(buf1, gd->bus_clk),
-		strmhz(buf2, gd->cpu_clk),
-		strmhz(buf3, gd->pci_clk),
-		strmhz(buf4, gd->arch.vco_clk)
-	);
-	return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/arch/powerpc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S
deleted file mode 100644
index 6295631913d..00000000000
--- a/arch/powerpc/cpu/mpc8220/start.S
+++ /dev/null
@@ -1,734 +0,0 @@
-/*
- *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
- *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000 - 2003 Wolfgang Denk <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- *  U-Boot - Startup Code for MPC8220 CPUs
- */
-#include <asm-offsets.h>
-#include <config.h>
-#include <mpc8220.h>
-#include <version.h>
-
-#define _LINUX_CONFIG_H 1   /* avoid reading Linux autoconf.h file  */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <asm/u-boot.h>
-
-/* We don't want the  MMU yet.
-*/
-#undef	MSR_KERNEL
-/* Floating Point enable, Machine Check and Recoverable Interr. */
-#ifdef DEBUG
-#define MSR_KERNEL (MSR_FP|MSR_RI)
-#else
-#define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI)
-#endif
-
-/*
- * Set up GOT: Global Offset Table
- *
- * Use r12 to access the GOT
- */
-	START_GOT
-	GOT_ENTRY(_GOT2_TABLE_)
-	GOT_ENTRY(_FIXUP_TABLE_)
-
-	GOT_ENTRY(_start)
-	GOT_ENTRY(_start_of_vectors)
-	GOT_ENTRY(_end_of_vectors)
-	GOT_ENTRY(transfer_to_handler)
-
-	GOT_ENTRY(__init_end)
-	GOT_ENTRY(__bss_end)
-	GOT_ENTRY(__bss_start)
-	END_GOT
-
-/*
- * Version string
- */
-	.data
-	.globl	version_string
-version_string:
-	.ascii U_BOOT_VERSION_STRING, "\0"
-
-/*
- * Exception vectors
- */
-	.text
-	. = EXC_OFF_SYS_RESET
-	.globl	_start
-_start:
-	mfmsr	r5		    /* save msr contents    */
-
-	/* replace default MBAR base address from 0x80000000
-	    to 0xf0000000 */
-
-#if defined(CONFIG_SYS_DEFAULT_MBAR) && !defined(CONFIG_SYS_RAMBOOT)
-	lis	r3, CONFIG_SYS_MBAR@h
-	ori	r3, r3, CONFIG_SYS_MBAR@l
-
-	/* MBAR is mirrored into the MBAR SPR */
-	mtspr	MBAR,r3
-	mtspr	SPRN_SPRG7W,r3
-	lis	r4, CONFIG_SYS_DEFAULT_MBAR@h
-	stw	r3, 0(r4)
-#endif /* CONFIG_SYS_DEFAULT_MBAR */
-
-	/* Initialise the MPC8220 processor core			*/
-	/*--------------------------------------------------------------*/
-
-	bl  init_8220_core
-
-	/* initialize some things that are hard to access from C	*/
-	/*--------------------------------------------------------------*/
-
-	/* set up stack in on-chip SRAM */
-	lis	r3, CONFIG_SYS_INIT_RAM_ADDR@h
-	ori	r3, r3, CONFIG_SYS_INIT_RAM_ADDR@l
-	ori	r1, r3, CONFIG_SYS_INIT_SP_OFFSET
-
-	li	r0, 0		/* Make room for stack frame header and */
-	stwu	r0, -4(r1)	/* clear final stack frame so that	*/
-	stwu	r0, -4(r1)	/* stack backtraces terminate cleanly	*/
-
-	/* let the C-code set up the rest				*/
-	/*								*/
-	/* Be careful to keep code relocatable !			*/
-	/*--------------------------------------------------------------*/
-
-	GET_GOT			/* initialize GOT access		*/
-
-	/* r3: IMMR */
-	bl	cpu_init_f	/* run low-level CPU init code (in Flash)*/
-
-	bl	board_init_f	/* run 1st part of board init code (in Flash)*/
-
-	/* NOTREACHED - board_init_f() does not return */
-
-/*
- * Vector Table
- */
-
-	.globl	_start_of_vectors
-_start_of_vectors:
-
-/* Machine check */
-	STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
-
-/* Data Storage exception. */
-	STD_EXCEPTION(0x300, DataStorage, UnknownException)
-
-/* Instruction Storage exception. */
-	STD_EXCEPTION(0x400, InstStorage, UnknownException)
-
-/* External Interrupt exception. */
-	STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
-
-/* Alignment exception. */
-	. = 0x600
-Alignment:
-	EXCEPTION_PROLOG(SRR0, SRR1)
-	mfspr	r4,DAR
-	stw	r4,_DAR(r21)
-	mfspr	r5,DSISR
-	stw	r5,_DSISR(r21)
-	addi	r3,r1,STACK_FRAME_OVERHEAD
-	EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
-
-/* Program check exception */
-	. = 0x700
-ProgramCheck:
-	EXCEPTION_PROLOG(SRR0, SRR1)
-	addi	r3,r1,STACK_FRAME_OVERHEAD
-	EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
-		MSR_KERNEL, COPY_EE)
-
-	STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
-
-	/* I guess we could implement decrementer, and may have
-	 * to someday for timekeeping.
-	 */
-	STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
-
-	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
-	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
-	STD_EXCEPTION(0xd00, SingleStep, UnknownException)
-
-	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
-	STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
-
-	STD_EXCEPTION(0x1000, InstructionTLBMiss, UnknownException)
-	STD_EXCEPTION(0x1100, DataLoadTLBMiss, UnknownException)
-	STD_EXCEPTION(0x1200, DataStoreTLBMiss, UnknownException)
-#ifdef DEBUG
-	. = 0x1300
-	/*
-	 * This exception occurs when the program counter matches the
-	 * Instruction Address Breakpoint Register (IABR).
-	 *
-	 * I want the cpu to halt if this occurs so I can hunt around
-	 * with the debugger and look at things.
-	 *
-	 * When DEBUG is defined, both machine check enable (in the MSR)
-	 * and checkstop reset enable (in the reset mode register) are
-	 * turned off and so a checkstop condition will result in the cpu
-	 * halting.
-	 *
-	 * I force the cpu into a checkstop condition by putting an illegal
-	 * instruction here (at least this is the theory).
-	 *
-	 * well - that didnt work, so just do an infinite loop!
-	 */
-1:	b	1b
-#else
-	STD_EXCEPTION(0x1300, InstructionBreakpoint, DebugException)
-#endif
-	STD_EXCEPTION(0x1400, SMI, UnknownException)
-
-	STD_EXCEPTION(0x1500, Trap_15, UnknownException)
-	STD_EXCEPTION(0x1600, Trap_16, UnknownException)
-	STD_EXCEPTION(0x1700, Trap_17, UnknownException)
-	STD_EXCEPTION(0x1800, Trap_18, UnknownException)
-	STD_EXCEPTION(0x1900, Trap_19, UnknownException)
-	STD_EXCEPTION(0x1a00, Trap_1a, UnknownException)
-	STD_EXCEPTION(0x1b00, Trap_1b, UnknownException)
-	STD_EXCEPTION(0x1c00, Trap_1c, UnknownException)
-	STD_EXCEPTION(0x1d00, Trap_1d, UnknownException)
-	STD_EXCEPTION(0x1e00, Trap_1e, UnknownException)
-	STD_EXCEPTION(0x1f00, Trap_1f, UnknownException)
-	STD_EXCEPTION(0x2000, Trap_20, UnknownException)
-	STD_EXCEPTION(0x2100, Trap_21, UnknownException)
-	STD_EXCEPTION(0x2200, Trap_22, UnknownException)
-	STD_EXCEPTION(0x2300, Trap_23, UnknownException)
-	STD_EXCEPTION(0x2400, Trap_24, UnknownException)
-	STD_EXCEPTION(0x2500, Trap_25, UnknownException)
-	STD_EXCEPTION(0x2600, Trap_26, UnknownException)
-	STD_EXCEPTION(0x2700, Trap_27, UnknownException)
-	STD_EXCEPTION(0x2800, Trap_28, UnknownException)
-	STD_EXCEPTION(0x2900, Trap_29, UnknownException)
-	STD_EXCEPTION(0x2a00, Trap_2a, UnknownException)
-	STD_EXCEPTION(0x2b00, Trap_2b, UnknownException)
-	STD_EXCEPTION(0x2c00, Trap_2c, UnknownException)
-	STD_EXCEPTION(0x2d00, Trap_2d, UnknownException)
-	STD_EXCEPTION(0x2e00, Trap_2e, UnknownException)
-	STD_EXCEPTION(0x2f00, Trap_2f, UnknownException)
-
-
-	.globl	_end_of_vectors
-_end_of_vectors:
-
-	. = 0x3000
-
-/*
- * This code finishes saving the registers to the exception frame
- * and jumps to the appropriate handler for the exception.
- * Register r21 is pointer into trap frame, r1 has new stack pointer.
- */
-	.globl	transfer_to_handler
-transfer_to_handler:
-	stw	r22,_NIP(r21)
-	lis	r22,MSR_POW@h
-	andc	r23,r23,r22
-	stw	r23,_MSR(r21)
-	SAVE_GPR(7, r21)
-	SAVE_4GPRS(8, r21)
-	SAVE_8GPRS(12, r21)
-	SAVE_8GPRS(24, r21)
-	mflr	r23
-	andi.	r24,r23,0x3f00	    /* get vector offset */
-	stw	r24,TRAP(r21)
-	li	r22,0
-	stw	r22,RESULT(r21)
-	lwz	r24,0(r23)		/* virtual address of handler */
-	lwz	r23,4(r23)		/* where to go when done */
-	mtspr	SRR0,r24
-	mtspr	SRR1,r20
-	mtlr	r23
-	SYNC
-	rfi			    /* jump to handler, enable MMU */
-
-int_return:
-	mfmsr	r28		    /* Disable interrupts */
-	li	r4,0
-	ori	r4,r4,MSR_EE
-	andc	r28,r28,r4
-	SYNC			    /* Some chip revs need this... */
-	mtmsr	r28
-	SYNC
-	lwz	r2,_CTR(r1)
-	lwz	r0,_LINK(r1)
-	mtctr	r2
-	mtlr	r0
-	lwz	r2,_XER(r1)
-	lwz	r0,_CCR(r1)
-	mtspr	XER,r2
-	mtcrf	0xFF,r0
-	REST_10GPRS(3, r1)
-	REST_10GPRS(13, r1)
-	REST_8GPRS(23, r1)
-	REST_GPR(31, r1)
-	lwz	r2,_NIP(r1)	    /* Restore environment */
-	lwz	r0,_MSR(r1)
-	mtspr	SRR0,r2
-	mtspr	SRR1,r0
-	lwz	r0,GPR0(r1)
-	lwz	r2,GPR2(r1)
-	lwz	r1,GPR1(r1)
-	SYNC
-	rfi
-
-/*
- * This code initialises the MPC8220 processor core
- * (conforms to PowerPC 603e spec)
- * Note: expects original MSR contents to be in r5.
- */
-
-	.globl	init_8220_core
-init_8220_core:
-
-	/* Initialize machine status; enable machine check interrupt	*/
-	/*--------------------------------------------------------------*/
-
-	li	r3, MSR_KERNEL	    /* Set ME and RI flags		*/
-	rlwimi	r3, r5, 0, 25, 25   /* preserve IP bit set by HRCW	*/
-#ifdef DEBUG
-	rlwimi	r3, r5, 0, 21, 22   /* debugger might set SE & BE bits	*/
-#endif
-	SYNC			    /* Some chip revs need this...	*/
-	mtmsr	r3
-	SYNC
-	mtspr	SRR1, r3	    /* Make SRR1 match MSR		*/
-
-	/* Initialize the Hardware Implementation-dependent Registers	*/
-	/* HID0 also contains cache control				*/
-	/*--------------------------------------------------------------*/
-
-	lis	r3, CONFIG_SYS_HID0_INIT@h
-	ori	r3, r3, CONFIG_SYS_HID0_INIT@l
-	SYNC
-	mtspr	HID0, r3
-
-	lis	r3, CONFIG_SYS_HID0_FINAL@h
-	ori	r3, r3, CONFIG_SYS_HID0_FINAL@l
-	SYNC
-	mtspr	HID0, r3
-
-	/* Enable Extra BATs */
-	mfspr	r3, 1011    /* HID2 */
-	lis	r4, 0x0004
-	ori	r4, r4, 0x0000
-	or	r4, r4, r3
-	mtspr	1011, r4
-	sync
-
-	/* clear all BAT's						*/
-	/*--------------------------------------------------------------*/
-
-	li	r0, 0
-	mtspr	DBAT0U, r0
-	mtspr	DBAT0L, r0
-	mtspr	DBAT1U, r0
-	mtspr	DBAT1L, r0
-	mtspr	DBAT2U, r0
-	mtspr	DBAT2L, r0
-	mtspr	DBAT3U, r0
-	mtspr	DBAT3L, r0
-	mtspr	DBAT4U, r0
-	mtspr	DBAT4L, r0
-	mtspr	DBAT5U, r0
-	mtspr	DBAT5L, r0
-	mtspr	DBAT6U, r0
-	mtspr	DBAT6L, r0
-	mtspr	DBAT7U, r0
-	mtspr	DBAT7L, r0
-	mtspr	IBAT0U, r0
-	mtspr	IBAT0L, r0
-	mtspr	IBAT1U, r0
-	mtspr	IBAT1L, r0
-	mtspr	IBAT2U, r0
-	mtspr	IBAT2L, r0
-	mtspr	IBAT3U, r0
-	mtspr	IBAT3L, r0
-	mtspr	IBAT4U, r0
-	mtspr	IBAT4L, r0
-	mtspr	IBAT5U, r0
-	mtspr	IBAT5L, r0
-	mtspr	IBAT6U, r0
-	mtspr	IBAT6L, r0
-	mtspr	IBAT7U, r0
-	mtspr	IBAT7L, r0
-	SYNC
-
-	/* invalidate all tlb's						*/
-	/*								*/
-	/* From the 603e User Manual: "The 603e provides the ability to */
-	/* invalidate a TLB entry. The TLB Invalidate Entry (tlbie)	*/
-	/* instruction invalidates the TLB entry indexed by the EA, and */
-	/* operates on both the instruction and data TLBs simultaneously*/
-	/* invalidating four TLB entries (both sets in each TLB). The	*/
-	/* index corresponds to bits 15-19 of the EA. To invalidate all */
-	/* entries within both TLBs, 32 tlbie instructions should be	*/
-	/* issued, incrementing this field by one each time."		*/
-	/*								*/
-	/* "Note that the tlbia instruction is not implemented on the	*/
-	/* 603e."							*/
-	/*								*/
-	/* bits 15-19 correspond to addresses 0x00000000 to 0x0001F000	*/
-	/* incrementing by 0x1000 each time. The code below is sort of	*/
-	/* based on code in "flush_tlbs" from arch/powerpc/kernel/head.S	*/
-	/*								*/
-	/*--------------------------------------------------------------*/
-
-	li	r3, 32
-	mtctr	r3
-	li	r3, 0
-1:	tlbie	r3
-	addi	r3, r3, 0x1000
-	bdnz	1b
-	SYNC
-
-	/* Done!							*/
-	/*--------------------------------------------------------------*/
-
-	blr
-
-/* Cache functions.
- *
- * Note: requires that all cache bits in
- * HID0 are in the low half word.
- */
-	.globl	icache_enable
-icache_enable:
-	lis	r4, 0
-	ori	r4, r4, CONFIG_SYS_HID0_INIT /* set ICE & ICFI bit		*/
-	rlwinm	r3, r4, 0, 21, 19     /* clear the ICFI bit		*/
-
-	/*
-	 * The setting of the instruction cache enable (ICE) bit must be
-	 * preceded by an isync instruction to prevent the cache from being
-	 * enabled or disabled while an instruction access is in progress.
-	 */
-	isync
-	mtspr	HID0, r4	      /* Enable Instr Cache & Inval cache */
-	mtspr	HID0, r3	      /* using 2 consec instructions	*/
-	isync
-	blr
-
-	.globl	icache_disable
-icache_disable:
-	mfspr	r3, HID0
-	rlwinm	r3, r3, 0, 17, 15     /* clear the ICE bit		*/
-	mtspr	HID0, r3
-	isync
-	blr
-
-	.globl	icache_status
-icache_status:
-	mfspr	r3, HID0
-	rlwinm	r3, r3, HID0_ICE_BITPOS + 1, 31, 31
-	blr
-
-	.globl	dcache_enable
-dcache_enable:
-	lis	r4, 0
-	ori	r4, r4, HID0_DCE|HID0_DCFI /* set DCE & DCFI bit	*/
-	rlwinm	r3, r4, 0, 22, 20     /* clear the DCFI bit		*/
-
-	/* Enable address translation in MSR bit */
-	mfmsr	r5
-	ori	r5, r5, 0x
-
-
-	/*
-	 * The setting of the instruction cache enable (ICE) bit must be
-	 * preceded by an isync instruction to prevent the cache from being
-	 * enabled or disabled while an instruction access is in progress.
-	 */
-	isync
-	mtspr	HID0, r4	      /* Enable Data Cache & Inval cache*/
-	mtspr	HID0, r3	      /* using 2 consec instructions	*/
-	isync
-	blr
-
-	.globl	dcache_disable
-dcache_disable:
-	mfspr	r3, HID0
-	rlwinm	r3, r3, 0, 18, 16     /* clear the DCE bit */
-	mtspr	HID0, r3
-	isync
-	blr
-
-	.globl	dcache_status
-dcache_status:
-	mfspr	r3, HID0
-	rlwinm	r3, r3, HID0_DCE_BITPOS + 1, 31, 31
-	blr
-
-	.globl	get_pvr
-get_pvr:
-	mfspr	r3, PVR
-	blr
-
-/*------------------------------------------------------------------------------*/
-
-/*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
- * r3 = dest
- * r4 = src
- * r5 = length in bytes
- * r6 = cachelinesize
- */
-	.globl	relocate_code
-relocate_code:
-	mr	r1,  r3	    /* Set new stack pointer		*/
-	mr	r9,  r4	    /* Save copy of Global Data pointer */
-	mr	r10, r5	    /* Save copy of Destination Address */
-
-	GET_GOT
-	mr	r3,  r5	    /* Destination Address		*/
-	lis	r4, CONFIG_SYS_MONITOR_BASE@h	/* Source Address	*/
-	ori	r4, r4, CONFIG_SYS_MONITOR_BASE@l
-	lwz	r5, GOT(__init_end)
-	sub	r5, r5, r4
-	li	r6, CONFIG_SYS_CACHELINE_SIZE	/* Cache Line Size	*/
-
-	/*
-	 * Fix GOT pointer:
-	 *
-	 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
-	 *
-	 * Offset:
-	 */
-	sub	r15, r10, r4
-
-	/* First our own GOT */
-	add	r12, r12, r15
-	/* then the one used by the C code */
-	add	r30, r30, r15
-
-	/*
-	 * Now relocate code
-	 */
-
-	cmplw	cr1,r3,r4
-	addi	r0,r5,3
-	srwi.	r0,r0,2
-	beq	cr1,4f	    /* In place copy is not necessary	*/
-	beq	7f	    /* Protect against 0 count		*/
-	mtctr	r0
-	bge	cr1,2f
-
-	la	r8,-4(r4)
-	la	r7,-4(r3)
-1:	lwzu	r0,4(r8)
-	stwu	r0,4(r7)
-	bdnz	1b
-	b	4f
-
-2:	slwi	r0,r0,2
-	add	r8,r4,r0
-	add	r7,r3,r0
-3:	lwzu	r0,-4(r8)
-	stwu	r0,-4(r7)
-	bdnz	3b
-
-/*
- * Now flush the cache: note that we must start from a cache aligned
- * address. Otherwise we might miss one cache line.
- */
-4:	cmpwi	r6,0
-	add	r5,r3,r5
-	beq	7f	    /* Always flush prefetch queue in any case	*/
-	subi	r0,r6,1
-	andc	r3,r3,r0
-	mfspr	r7,HID0	    /* don't do dcbst if dcache is disabled	*/
-	rlwinm	r7,r7,HID0_DCE_BITPOS+1,31,31
-	cmpwi	r7,0
-	beq	9f
-	mr	r4,r3
-5:	dcbst	0,r4
-	add	r4,r4,r6
-	cmplw	r4,r5
-	blt	5b
-	sync		    /* Wait for all dcbst to complete on bus	*/
-9:	mfspr	r7,HID0	    /* don't do icbi if icache is disabled	*/
-	rlwinm	r7,r7,HID0_ICE_BITPOS+1,31,31
-	cmpwi	r7,0
-	beq	7f
-	mr	r4,r3
-6:	icbi	0,r4
-	add	r4,r4,r6
-	cmplw	r4,r5
-	blt	6b
-7:	sync		    /* Wait for all icbi to complete on bus	*/
-	isync
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-
-	addi	r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
-	mtlr	r0
-	blr
-
-in_ram:
-
-	/*
-	 * Relocation Function, r12 point to got2+0x8000
-	 *
-	 * Adjust got2 pointers, no need to check for 0, this code
-	 * already puts a few entries in the table.
-	 */
-	li	r0,__got2_entries@sectoff@l
-	la	r3,GOT(_GOT2_TABLE_)
-	lwz	r11,GOT(_GOT2_TABLE_)
-	mtctr	r0
-	sub	r11,r3,r11
-	addi	r3,r3,-4
-1:	lwzu	r0,4(r3)
-	cmpwi	r0,0
-	beq-	2f
-	add	r0,r0,r11
-	stw	r0,0(r3)
-2:	bdnz	1b
-
-	/*
-	 * Now adjust the fixups and the pointers to the fixups
-	 * in case we need to move ourselves again.
-	 */
-	li	r0,__fixup_entries@sectoff@l
-	lwz	r3,GOT(_FIXUP_TABLE_)
-	cmpwi	r0,0
-	mtctr	r0
-	addi	r3,r3,-4
-	beq	4f
-3:	lwzu	r4,4(r3)
-	lwzux	r0,r4,r11
-	cmpwi	r0,0
-	add	r0,r0,r11
-	stw	r4,0(r3)
-	beq-	5f
-	stw	r0,0(r4)
-5:	bdnz	3b
-4:
-clear_bss:
-	/*
-	 * Now clear BSS segment
-	 */
-	lwz	r3,GOT(__bss_start)
-	lwz	r4,GOT(__bss_end)
-
-	cmplw	0, r3, r4
-	beq	6f
-
-	li	r0, 0
-5:
-	stw	r0, 0(r3)
-	addi	r3, r3, 4
-	cmplw	0, r3, r4
-	bne	5b
-6:
-
-	mr	r3, r9	    /* Global Data pointer	*/
-	mr	r4, r10	    /* Destination Address	*/
-	bl	board_init_r
-
-	/*
-	 * Copy exception vector code to low memory
-	 *
-	 * r3: dest_addr
-	 * r7: source address, r8: end address, r9: target address
-	 */
-	.globl	trap_init
-trap_init:
-	mflr	r4	    /* save link register		*/
-	GET_GOT
-	lwz	r7, GOT(_start)
-	lwz	r8, GOT(_end_of_vectors)
-
-	li	r9, 0x100   /* reset vector always at 0x100	*/
-
-	cmplw	0, r7, r8
-	bgelr		    /* return if r7>=r8 - just in case	*/
-1:
-	lwz	r0, 0(r7)
-	stw	r0, 0(r9)
-	addi	r7, r7, 4
-	addi	r9, r9, 4
-	cmplw	0, r7, r8
-	bne	1b
-
-	/*
-	 * relocate `hdlr' and `int_return' entries
-	 */
-	li	r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
-	li	r8, Alignment - _start + EXC_OFF_SYS_RESET
-2:
-	bl	trap_reloc
-	addi	r7, r7, 0x100	    /* next exception vector	    */
-	cmplw	0, r7, r8
-	blt	2b
-
-	li	r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
-	bl	trap_reloc
-
-	li	r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
-	bl	trap_reloc
-
-	li	r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
-	li	r8, SystemCall - _start + EXC_OFF_SYS_RESET
-3:
-	bl	trap_reloc
-	addi	r7, r7, 0x100	    /* next exception vector	    */
-	cmplw	0, r7, r8
-	blt	3b
-
-	li	r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
-	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
-4:
-	bl	trap_reloc
-	addi	r7, r7, 0x100	    /* next exception vector	    */
-	cmplw	0, r7, r8
-	blt	4b
-
-	mfmsr	r3		    /* now that the vectors have    */
-	lis	r7, MSR_IP@h	    /* relocated into low memory    */
-	ori	r7, r7, MSR_IP@l    /* MSR[IP] can be turned off    */
-	andc	r3, r3, r7	    /* (if it was on)		    */
-	SYNC			    /* Some chip revs need this...  */
-	mtmsr	r3
-	SYNC
-
-	mtlr	r4		    /* restore link register	    */
-	blr
diff --git a/arch/powerpc/cpu/mpc8220/traps.c b/arch/powerpc/cpu/mpc8220/traps.c
deleted file mode 100644
index 19d6cb57cfd..00000000000
--- a/arch/powerpc/cpu/mpc8220/traps.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * linux/arch/powerpc/kernel/traps.c
- *
- * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
- *
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- * and Paul Mackerras (paulus@cs.anu.edu.au)
- * fixed Machine Check Reasons by Reinhard Meyer (r.meyer@emk-elektronik.de)
- *
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * This file handles the architecture-dependent parts of hardware exceptions
- */
-
-#include <common.h>
-#include <command.h>
-#include <kgdb.h>
-#include <asm/processor.h>
-
-/* Returns 0 if exception not found and fixup otherwise.  */
-extern unsigned long search_exception_table(unsigned long);
-
-/* THIS NEEDS CHANGING to use the board info structure.
-*/
-#define END_OF_MEM      0x02000000
-
-/*
- * Trap & Exception support
- */
-
-static void print_backtrace(unsigned long *sp)
-{
-	int cnt = 0;
-	unsigned long i;
-
-	printf("Call backtrace: ");
-	while (sp) {
-		if ((uint) sp > END_OF_MEM)
-			break;
-
-		i = sp[1];
-		if (cnt++ % 7 == 0)
-			printf("\n");
-		printf("%08lX ", i);
-		if (cnt > 32)
-			break;
-		sp = (unsigned long *) *sp;
-	}
-	printf("\n");
-}
-
-void show_regs(struct pt_regs *regs)
-{
-	int i;
-
-	printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
-		regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
-	printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
-		regs->msr,
-		regs->msr & MSR_EE ? 1 : 0, regs->msr & MSR_PR ? 1 : 0,
-		regs->msr & MSR_FP ? 1 : 0, regs->msr & MSR_ME ? 1 : 0,
-		regs->msr & MSR_IR ? 1 : 0, regs->msr & MSR_DR ? 1 : 0);
-
-	printf("\n");
-	for (i = 0; i < 32; i++) {
-		if ((i % 8) == 0) {
-			printf("GPR%02d: ", i);
-		}
-
-		printf("%08lX ", regs->gpr[i]);
-		if ((i % 8) == 7) {
-			printf("\n");
-		}
-	}
-}
-
-
-static void _exception(int signr, struct pt_regs *regs)
-{
-	show_regs(regs);
-	print_backtrace((unsigned long *) regs->gpr[1]);
-	panic("Exception in kernel pc %lx signal %d", regs->nip, signr);
-}
-
-void MachineCheckException(struct pt_regs *regs)
-{
-	unsigned long fixup = search_exception_table(regs->nip);
-
-	/* Probing PCI using config cycles cause this exception
-	 * when a device is not present.  Catch it and return to
-	 * the PCI exception handler.
-	 */
-	if (fixup) {
-		regs->nip = fixup;
-		return;
-	}
-#if defined(CONFIG_CMD_KGDB)
-	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
-		return;
-#endif
-
-	printf("Machine check in kernel mode.\n");
-	printf("Caused by (from msr): ");
-	printf("regs %p ", regs);
-	/* refer to 603e Manual (MPC603EUM/AD), chapter 4.5.2.1 */
-	switch (regs->msr & 0x000F0000) {
-	case (0x80000000 >> 12):
-		printf("Machine check signal - probably due to mm fault\n"
-			"with mmu off\n");
-		break;
-	case (0x80000000 >> 13):
-		printf("Transfer error ack signal\n");
-		break;
-	case (0x80000000 >> 14):
-		printf("Data parity signal\n");
-		break;
-	case (0x80000000 >> 15):
-		printf("Address parity signal\n");
-		break;
-	default:
-		printf("Unknown values in msr\n");
-	}
-	show_regs(regs);
-	print_backtrace((unsigned long *) regs->gpr[1]);
-	panic("machine check");
-}
-
-void AlignmentException(struct pt_regs *regs)
-{
-#if defined(CONFIG_CMD_KGDB)
-	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
-		return;
-#endif
-	show_regs(regs);
-	print_backtrace((unsigned long *) regs->gpr[1]);
-	panic("Alignment Exception");
-}
-
-void ProgramCheckException(struct pt_regs *regs)
-{
-#if defined(CONFIG_CMD_KGDB)
-	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
-		return;
-#endif
-	show_regs(regs);
-	print_backtrace((unsigned long *) regs->gpr[1]);
-	panic("Program Check Exception");
-}
-
-void SoftEmuException(struct pt_regs *regs)
-{
-#if defined(CONFIG_CMD_KGDB)
-	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
-		return;
-#endif
-	show_regs(regs);
-	print_backtrace((unsigned long *) regs->gpr[1]);
-	panic("Software Emulation Exception");
-}
-
-
-void UnknownException(struct pt_regs *regs)
-{
-#if defined(CONFIG_CMD_KGDB)
-	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
-		return;
-#endif
-	printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
-		regs->nip, regs->msr, regs->trap);
-	_exception(0, regs);
-}
-
-#if defined(CONFIG_CMD_BEDBUG)
-extern void do_bedbug_breakpoint(struct pt_regs *);
-#endif
-
-void DebugException(struct pt_regs *regs)
-{
-
-	printf("Debugger trap at @ %lx\n", regs->nip);
-	show_regs(regs);
-#if defined(CONFIG_CMD_BEDBUG)
-	do_bedbug_breakpoint(regs);
-#endif
-}
-
-/* Probe an address by reading.  If not present, return -1, otherwise
- * return 0.
- */
-int addr_probe(uint *addr)
-{
-#if 0
-	int retval;
-
-	__asm__ __volatile__ ("1: lwz %0,0(%1)\n"
-			      "   eieio\n"
-			      "   li %0,0\n"
-			      "2:\n"
-			      ".section .fixup,\"ax\"\n"
-			      "3: li %0,-1\n"
-			      "   b 2b\n"
-			      ".section __ex_table,\"a\"\n"
-			      "   .align 2\n"
-			      "   .long 1b,3b\n"
-			      ".text":"=r" (retval):"r" (addr));
-
-	return (retval);
-#endif
-	return 0;
-}
diff --git a/arch/powerpc/cpu/mpc8220/u-boot.lds b/arch/powerpc/cpu/mpc8220/u-boot.lds
deleted file mode 100644
index dc63d2081bd..00000000000
--- a/arch/powerpc/cpu/mpc8220/u-boot.lds
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * (C) Copyright 2003-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  .text      :
-  {
-    arch/powerpc/cpu/mpc8220/start.o	(.text*)
-    *(.text*)
-    . = ALIGN(16);
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    KEEP(*(.got))
-    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/arch/powerpc/cpu/mpc8220/uart.c b/arch/powerpc/cpu/mpc8220/uart.c
deleted file mode 100644
index 772528f82c3..00000000000
--- a/arch/powerpc/cpu/mpc8220/uart.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale, Inc
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Minimal serial functions needed to use one of the PSC ports
- * as serial console interface.
- */
-
-#include <common.h>
-#include <mpc8220.h>
-#include <serial.h>
-#include <linux/compiler.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define PSC_BASE   MMAP_PSC1
-
-#if defined(CONFIG_PSC_CONSOLE)
-static int mpc8220_serial_init(void)
-{
-	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
-	u32 counter;
-
-	/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
-	psc->cr = 0;
-	psc->ipcr_acr = 0;
-	psc->isr_imr = 0;
-
-	/* write to CSR: RX/TX baud rate from timers */
-	psc->sr_csr = 0xdd000000;
-
-	psc->mr1_2 = PSC_MR1_BITS_CHAR_8 | PSC_MR1_NO_PARITY | PSC_MR2_STOP_BITS_1;
-
-	/* Setting up BaudRate */
-	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
-	counter++;
-
-	/* write to CTUR: divide counter upper byte */
-	psc->ctur = ((counter & 0xff00) << 16);
-	/* write to CTLR: divide counter lower byte */
-	psc->ctlr = ((counter & 0x00ff) << 24);
-
-	psc->cr = PSC_CR_RST_RX_CMD;
-	psc->cr = PSC_CR_RST_TX_CMD;
-	psc->cr = PSC_CR_RST_ERR_STS_CMD;
-	psc->cr = PSC_CR_RST_BRK_INT_CMD;
-	psc->cr = PSC_CR_RST_MR_PTR_CMD;
-
-	psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
-	return (0);
-}
-
-static void mpc8220_serial_putc(const char c)
-{
-	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
-
-	if (c == '\n')
-		serial_putc ('\r');
-
-	/* Wait for last character to go. */
-	while (!(psc->sr_csr & PSC_SR_TXRDY));
-
-	psc->xmitbuf[0] = c;
-}
-
-static int mpc8220_serial_getc(void)
-{
-	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
-
-	/* Wait for a character to arrive. */
-	while (!(psc->sr_csr & PSC_SR_RXRDY));
-	return psc->xmitbuf[2];
-}
-
-static int mpc8220_serial_tstc(void)
-{
-	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
-
-	return (psc->sr_csr & PSC_SR_RXRDY);
-}
-
-static void mpc8220_serial_setbrg(void)
-{
-	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
-	u32 counter;
-
-	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
-	counter++;
-
-	/* write to CTUR: divide counter upper byte */
-	psc->ctur = ((counter & 0xff00) << 16);
-	/* write to CTLR: divide counter lower byte */
-	psc->ctlr = ((counter & 0x00ff) << 24);
-
-	psc->cr = PSC_CR_RST_RX_CMD;
-	psc->cr = PSC_CR_RST_TX_CMD;
-
-	psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
-}
-
-static struct serial_device mpc8220_serial_drv = {
-	.name	= "mpc8220_serial",
-	.start	= mpc8220_serial_init,
-	.stop	= NULL,
-	.setbrg	= mpc8220_serial_setbrg,
-	.putc	= mpc8220_serial_putc,
-	.puts	= default_serial_puts,
-	.getc	= mpc8220_serial_getc,
-	.tstc	= mpc8220_serial_tstc,
-};
-
-void mpc8220_serial_initialize(void)
-{
-	serial_register(&mpc8220_serial_drv);
-}
-
-__weak struct serial_device *default_serial_console(void)
-{
-	return &mpc8220_serial_drv;
-}
-#endif /* CONFIG_PSC_CONSOLE */
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 6776c85e499..2318064a478 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -83,10 +83,12 @@ COBJS-$(CONFIG_PPC_P4080)	+= ddr-gen3.o
 COBJS-$(CONFIG_PPC_P5020)	+= ddr-gen3.o
 COBJS-$(CONFIG_PPC_P5040)	+= ddr-gen3.o
 COBJS-$(CONFIG_PPC_T4240)	+= ddr-gen3.o
+COBJS-$(CONFIG_PPC_T4160)	+= ddr-gen3.o
 COBJS-$(CONFIG_PPC_B4420)	+= ddr-gen3.o
 COBJS-$(CONFIG_PPC_B4860)	+= ddr-gen3.o
 COBJS-$(CONFIG_BSC9131)		+= ddr-gen3.o
 COBJS-$(CONFIG_BSC9132)		+= ddr-gen3.o
+COBJS-$(CONFIG_PPC_T1040)	+= ddr-gen3.o
 
 COBJS-$(CONFIG_CPM2)	+= ether_fcc.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
@@ -102,8 +104,10 @@ COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
 COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
 COBJS-$(CONFIG_PPC_P5040) += p5040_ids.o
 COBJS-$(CONFIG_PPC_T4240) += t4240_ids.o
+COBJS-$(CONFIG_PPC_T4160) += t4240_ids.o
 COBJS-$(CONFIG_PPC_B4420) += b4860_ids.o
 COBJS-$(CONFIG_PPC_B4860) += b4860_ids.o
+COBJS-$(CONFIG_PPC_T1040) += t1040_ids.o
 
 COBJS-$(CONFIG_QE)	+= qe_io.o
 COBJS-$(CONFIG_CPM2)	+= serial_scc.o
@@ -137,9 +141,11 @@ COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
 COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
 COBJS-$(CONFIG_PPC_P5040) += p5040_serdes.o
 COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o
+COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o
 COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o
 COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o
 COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o
+COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o
 
 COBJS-y	+= cpu.o
 COBJS-y	+= cpu_init.o
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 53713e31d42..4067f053757 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -337,7 +337,7 @@ int enable_cluster_l2(void)
 			while ((in_be32(&l2cache->l2csr0)
 				& (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0)
 					;
-			out_be32(&l2cache->l2csr0, L2CSR0_L2E);
+			out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE);
 		}
 		i++;
 	} while (!(cluster & TP_CLUSTER_EOC));
@@ -637,6 +637,28 @@ skip_l2:
 	}
 #endif
 
+#if defined(CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE)
+		ccsr_usb_phy_t *usb_phy =
+			(void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
+		setbits_be32(&usb_phy->pllprg[1],
+			     CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN |
+			     CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN |
+			     CONFIG_SYS_FSL_USB_PLLPRG2_MFI |
+			     CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN);
+		setbits_be32(&usb_phy->port1.ctrl,
+			     CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+		setbits_be32(&usb_phy->port1.drvvbuscfg,
+			     CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+		setbits_be32(&usb_phy->port1.pwrfltcfg,
+			     CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+		setbits_be32(&usb_phy->port2.ctrl,
+			     CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+		setbits_be32(&usb_phy->port2.drvvbuscfg,
+			     CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+		setbits_be32(&usb_phy->port2.pwrfltcfg,
+			     CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+#endif
+
 #ifdef CONFIG_FMAN_ENET
 	fman_enet_init();
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index dacfdd15ea8..234fde48465 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -180,12 +180,5 @@ void cpu_init_early_f(void)
 
 	invalidate_tlb(1);
 
-#if defined(CONFIG_SECURE_BOOT)
-	/* Disable the TLBs created by ISBC */
-	for (i = CONFIG_SYS_ISBC_START_TLB;
-	     i < CONFIG_SYS_ISBC_START_TLB + CONFIG_SYS_ISBC_NUM_TLBS; i++)
-			disable_tlb(i);
-#endif
-
 	init_tlbs();
 }
diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
index ef0dd1da64c..c5b47200e08 100644
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
@@ -142,7 +142,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 		}
 	}
 #ifdef CONFIG_SYS_FSL_ERRATUM_A_004934
-	out_be32(&ddr->debug[28], 0x00003000);
+	out_be32(&ddr->debug[28], 0x30003000);
 #endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003474
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index 01dcdf6bc1a..93eca766920 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -164,7 +164,7 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)
 	}
 
 	cfg >>= sd_prctl_shift;
-	printf("Using SERDES%d Protocol: 0x%x\n", sd + 1, cfg);
+	printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg);
 	if (!is_serdes_prtcl_valid(sd, cfg))
 		printf("SERDES%d[PRTCL] = 0x%x is not valid\n", sd + 1, cfg);
 
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 43d4836303d..861c8e02872 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -80,6 +80,8 @@ int cpu_status(int nr)
 	if (nr == id) {
 		table = (u32 *)&__spin_table;
 		printf("table base @ 0x%p\n", table);
+	} else if (is_core_disabled(nr)) {
+		puts("Disabled\n");
 	} else {
 		table = (u32 *)&__spin_table + nr * NUM_BOOT_ENTRY;
 		printf("Running on cpu %d\n", id);
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c
index d529095ee8c..672edde455e 100644
--- a/arch/powerpc/cpu/mpc85xx/portals.c
+++ b/arch/powerpc/cpu/mpc85xx/portals.c
@@ -128,24 +128,32 @@ static int fdt_qportal(void *blob, int off, int id, char *name,
 
 	childoff = fdt_subnode_offset(blob, off, name);
 	if (create) {
-		if (childoff <= 0)
-			childoff = fdt_add_subnode(blob, off, name);
+		char handle[64], *p;
 
-		if (childoff > 0) {
-			char handle[64], *p;
+		strncpy(handle, name, sizeof(handle));
+		p = strchr(handle, '@');
+		if (!strncmp(name, "fman", 4)) {
+			*p = *(p + 1);
+			p++;
+		}
+		*p = '\0';
 
-			strncpy(handle, name, sizeof(handle));
-			p = strchr(handle, '@');
-			if (!strncmp(name, "fman", 4)) {
-				*p = *(p + 1);
-				p++;
-			}
-			*p = '\0';
+		dev_off = fdt_path_offset(blob, handle);
+		/* skip this node if alias is not found */
+		if (dev_off == -FDT_ERR_BADPATH)
+			return 0;
+		if (dev_off < 0)
+			return dev_off;
 
-			dev_off = fdt_path_offset(blob, handle);
-			if (dev_off < 0)
-				return dev_off;
+		if (childoff <= 0)
+			childoff = fdt_add_subnode(blob, off, name);
 
+		/* need to update the dev_off after adding a subnode */
+		dev_off = fdt_path_offset(blob, handle);
+		if (dev_off < 0)
+			return dev_off;
+
+		if (childoff > 0) {
 			dev_handle = fdt_get_phandle(blob, dev_off);
 			if (dev_handle <= 0) {
 				dev_handle = fdt_alloc_phandle(blob);
diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S
index 5c4b1e3b754..a4a21b037c6 100644
--- a/arch/powerpc/cpu/mpc85xx/release.S
+++ b/arch/powerpc/cpu/mpc85xx/release.S
@@ -69,9 +69,9 @@ __secondary_start_page:
 #endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_CPU_A003999
-	mfspr	r3,977
+	mfspr	r3,SPRN_HDBCR1
 	oris	r3,r3,0x0100
-	mtspr	977,r3
+	mtspr	SPRN_HDBCR1,r3
 #endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A004510
@@ -93,10 +93,10 @@ __secondary_start_page:
 1:	/* Erratum says set bits 55:60 to 001001 */
 	msync
 	isync
-	mfspr	r3,976
+	mfspr	r3,SPRN_HDBCR0
 	li	r4,0x48
 	rlwimi	r3,r4,0,0x1f8
-	mtspr	976,r3
+	mtspr	SPRN_HDBCR0,r3
 	isync
 2:
 #endif
@@ -154,16 +154,12 @@ __secondary_start_page:
 	ori	r3,r3,toreset(__spin_table_addr)@l
 	lwz	r3,0(r3)
 
-	/*
-	 * r10 has the base address for the entry.
-	 * we cannot access it yet before setting up a new TLB
-	 */
 	mfspr	r0,SPRN_PIR
-#if	defined(CONFIG_E6500)
+#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
 /*
- * PIR definition for E6500
+ * PIR definition for Chassis 2
  * 0-17 Reserved (logic 0s)
- * 8-19 CHIP_ID,    2'b00      - SoC 1
+ * 18-19 CHIP_ID,    2'b00      - SoC 1
  *                  all others - reserved
  * 20-24 CLUSTER_ID 5'b00000   - CCM 1
  *                  all others - reserved
@@ -177,32 +173,33 @@ __secondary_start_page:
  *                       2'b11 - core 3
  * 29-31 THREAD_ID       3'b000 - thread 0
  *                       3'b001 - thread 1
+ *
+ * Power-on PIR increments threads by 0x01, cores within a cluster by 0x08
+ * and clusters by 0x20.
+ *
+ * We renumber PIR so that all threads in the system are consecutive.
  */
-	rlwinm  r4,r0,29,25,31
+
+	rlwinm	r8,r0,29,0x03	/* r8 = core within cluster */
+	srwi	r10,r0,5	/* r10 = cluster */
+
+	mulli	r5,r10,CONFIG_SYS_FSL_CORES_PER_CLUSTER
+	add	r5,r5,r8	/* for spin table index */
+	mulli	r4,r5,CONFIG_SYS_FSL_THREADS_PER_CORE	/* for PIR */
 #elif	defined(CONFIG_E500MC)
 	rlwinm	r4,r0,27,27,31
+	mr	r5,r4
 #else
 	mr	r4,r0
+	mr	r5,r4
 #endif
-	slwi	r8,r4,6	/* spin table is padded to 64 byte */
-	add	r10,r3,r8
 
-#ifdef CONFIG_E6500
-	mfspr	r0,SPRN_PIR
 	/*
-	 * core 0 thread 0: pir reset value 0x00, new pir 0
-	 * core 0 thread 1: pir reset value 0x01, new pir 1
-	 * core 1 thread 0: pir reset value 0x08, new pir 2
-	 * core 1 thread 1: pir reset value 0x09, new pir 3
-	 * core 2 thread 0: pir reset value 0x10, new pir 4
-	 * core 2 thread 1: pir reset value 0x11, new pir 5
-	 * etc.
-	 *
-	 * Only thread 0 of each core will be running, updating PIR doesn't
-	 * need to deal with the thread bits.
+	 * r10 has the base address for the entry.
+	 * we cannot access it yet before setting up a new TLB
 	 */
-	rlwinm	r4,r0,30,24,30
-#endif
+	slwi	r8,r5,6	/* spin table is padded to 64 byte */
+	add	r10,r3,r8
 
 	mtspr	SPRN_PIR,r4	/* write to PIR register */
 
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 297f2ed4739..a4d6e9cc738 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -112,30 +112,32 @@ void get_sys_info (sys_info_t * sysInfo)
 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
 	/*
 	 * Each cluster has up to 4 cores, sharing the same PLL selection.
-	 * The cluster assignment is fixed per SoC. There is no way identify the
-	 * assignment so far, presuming the "first configuration" which is to
-	 * fill the lower cluster group first before moving up to next group.
-	 * PLL1, PLL2, PLL3 are cluster group A, feeding core 0~3 on cluster 1
-	 * and core 4~7 on cluster 2
-	 * PLL4, PLL5, PLL6 are cluster group B, feeding core 8~11 on cluster 3
-	 * and core 12~15 on cluster 4 if existing
+	 * The cluster assignment is fixed per SoC. PLL1, PLL2, PLL3 are
+	 * cluster group A, feeding cores on cluster 1 and cluster 2.
+	 * PLL4, PLL5, PLL6 are cluster group B, feeding cores on cluster 3
+	 * and cluster 4 if existing.
 	 */
 	for_each_cpu(i, cpu, cpu_numcores(), cpu_mask()) {
-		u32 c_pll_sel = (in_be32(&clk->clkc0csr + (cpu / 4) * 8) >> 27)
+		int cluster = fsl_qoriq_core_to_cluster(cpu);
+		u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27)
 				& 0xf;
 		u32 cplx_pll = core_cplx_PLL[c_pll_sel];
 		if (cplx_pll > 3)
 			printf("Unsupported architecture configuration"
 				" in function %s\n", __func__);
-		cplx_pll += (cpu / 8) * 3;
-
+		cplx_pll += (cluster / 2) * 3;
 		sysInfo->freqProcessor[cpu] =
 			 freqCC_PLL[cplx_pll] / core_cplx_PLL_div[c_pll_sel];
 	}
+#ifdef CONFIG_PPC_B4860
+#define FM1_CLK_SEL	0xe0000000
+#define FM1_CLK_SHIFT	29
+#else
 #define PME_CLK_SEL	0xe0000000
 #define PME_CLK_SHIFT	29
 #define FM1_CLK_SEL	0x1c000000
 #define FM1_CLK_SHIFT	26
+#endif
 	rcw_tmp = in_be32(&gur->rcwsr[7]);
 
 #ifdef CONFIG_SYS_DPAA_PME
@@ -185,6 +187,9 @@ void get_sys_info (sys_info_t * sysInfo)
 	case 4:
 		sysInfo->freqFMan[0] = freqCC_PLL[3] / 4;
 		break;
+	case 5:
+		sysInfo->freqFMan[0] = sysInfo->freqSystemBus;
+		break;
 	case 6:
 		sysInfo->freqFMan[0] = freqCC_PLL[4] / 2;
 		break;
@@ -232,7 +237,8 @@ void get_sys_info (sys_info_t * sysInfo)
 #else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
 	for_each_cpu(i, cpu, cpu_numcores(), cpu_mask()) {
-		u32 c_pll_sel = (in_be32(&clk->clkc0csr + cpu*8) >> 27) & 0xf;
+		u32 c_pll_sel = (in_be32(&clk->clkcsr[cpu].clkcncsr) >> 27)
+				& 0xf;
 		u32 cplx_pll = core_cplx_PLL[c_pll_sel];
 
 		sysInfo->freqProcessor[cpu] =
@@ -285,6 +291,10 @@ void get_sys_info (sys_info_t * sysInfo)
 #endif
 #endif
 
+#ifdef CONFIG_SYS_DPAA_QBMAN
+	sysInfo->freqQMAN = sysInfo->freqSystemBus / 2;
+#endif
+
 #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
 #else /* CONFIG_FSL_CORENET */
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 3f76ee66cfb..4f0480b7689 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -116,10 +116,10 @@ _start_e500:
 	/* Erratum says set bits 55:60 to 001001 */
 	msync
 	isync
-	mfspr	r3,976
+	mfspr	r3,SPRN_HDBCR0
 	li	r4,0x48
 	rlwimi	r3,r4,0,0x1f8
-	mtspr	976,r3
+	mtspr	SPRN_HDBCR0,r3
 	isync
 2:
 #endif
@@ -173,52 +173,6 @@ l2_disabled:
 	mfspr	r1,DBSR
 	mtspr	DBSR,r1		/* Clear all valid bits */
 
-	/*
-	 *	Enable L1 Caches early
-	 *
-	 */
-
-#ifdef CONFIG_SYS_CACHE_STASHING
-	/* set stash id to (coreID) * 2 + 32 + L1 CT (0) */
-	li	r2,(32 + 0)
-	mtspr	L1CSR2,r2
-#endif
-
-	/* Enable/invalidate the I-Cache */
-	lis	r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@h
-	ori	r2,r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
-	mtspr	SPRN_L1CSR1,r2
-1:
-	mfspr	r3,SPRN_L1CSR1
-	and.	r1,r3,r2
-	bne	1b
-
-	lis	r3,(L1CSR1_CPE|L1CSR1_ICE)@h
-	ori	r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
-	mtspr	SPRN_L1CSR1,r3
-	isync
-2:
-	mfspr	r3,SPRN_L1CSR1
-	andi.	r1,r3,L1CSR1_ICE@l
-	beq	2b
-
-	/* Enable/invalidate the D-Cache */
-	lis	r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
-	ori	r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
-	mtspr	SPRN_L1CSR0,r2
-1:
-	mfspr	r3,SPRN_L1CSR0
-	and.	r1,r3,r2
-	bne	1b
-
-	lis	r3,(L1CSR0_CPE|L1CSR0_DCE)@h
-	ori	r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
-	mtspr	SPRN_L1CSR0,r3
-	isync
-2:
-	mfspr	r3,SPRN_L1CSR0
-	andi.	r1,r3,L1CSR0_DCE@l
-	beq	2b
 
 	.macro	create_tlb1_entry esel ts tsize epn wimg rpn perm phy_high scratch
 	lis	\scratch, FSL_BOOKE_MAS0(1, \esel, 0)@h
@@ -372,9 +326,9 @@ l2_disabled:
 #endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_CPU_A003999
-	mfspr	r3,977
+	mfspr	r3,SPRN_HDBCR1
 	oris	r3,r3,0x0100
-	mtspr	977,r3
+	mtspr	SPRN_HDBCR1,r3
 #endif
 
 	/* Enable Branch Prediction */
@@ -780,13 +734,60 @@ enable_l2_cluster_l2:
 	isync
 	and.	r1, r0, r4
 	bne	1b
-	lis	r4, L2CSR0_L2E@h
+	lis	r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
+	ori	r4, r4, (L2CSR0_L2REP_MODE)@l
 	sync
-	stw	r4, 0(r3)	/* eanble L2 */
+	stw	r4, 0(r3)	/* enable L2 */
 delete_ccsr_l2_tlb:
 	delete_tlb0_entry 0, CONFIG_SYS_CCSRBAR + 0xC20000, MAS2_I|MAS2_G, r3
 #endif
 
+	/*
+	 * Enable the L1. On e6500, this has to be done
+	 * after the L2 is up.
+	 */
+
+#ifdef CONFIG_SYS_CACHE_STASHING
+	/* set stash id to (coreID) * 2 + 32 + L1 CT (0) */
+	li	r2,(32 + 0)
+	mtspr	L1CSR2,r2
+#endif
+
+	/* Enable/invalidate the I-Cache */
+	lis	r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@h
+	ori	r2,r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
+	mtspr	SPRN_L1CSR1,r2
+1:
+	mfspr	r3,SPRN_L1CSR1
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR1_CPE|L1CSR1_ICE)@h
+	ori	r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
+	mtspr	SPRN_L1CSR1,r3
+	isync
+2:
+	mfspr	r3,SPRN_L1CSR1
+	andi.	r1,r3,L1CSR1_ICE@l
+	beq	2b
+
+	/* Enable/invalidate the D-Cache */
+	lis	r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
+	ori	r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
+	mtspr	SPRN_L1CSR0,r2
+1:
+	mfspr	r3,SPRN_L1CSR0
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR0_CPE|L1CSR0_DCE)@h
+	ori	r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
+	mtspr	SPRN_L1CSR0,r3
+	isync
+2:
+	mfspr	r3,SPRN_L1CSR0
+	andi.	r1,r3,L1CSR0_DCE@l
+	beq	2b
 #ifdef CONFIG_SYS_FSL_ERRATUM_A004510
 #define DCSR_LAWBARH0	(CONFIG_SYS_CCSRBAR + 0x1000)
 #define LAW_SIZE_1M	0x13
@@ -1905,6 +1906,7 @@ unlock_ram_in_cache:
 	slwi	r4,r4,(10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r4
 1:	dcbi	r0,r3
+	dcblc	r0,r3
 	addi	r3,r3,CONFIG_SYS_CACHELINE_SIZE
 	bdnz	1b
 	sync
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
new file mode 100644
index 00000000000..ed615996f11
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
@@ -0,0 +1,135 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fsl_portals.h>
+#include <asm/fsl_liodn.h>
+
+#ifdef CONFIG_SYS_DPAA_QBMAN
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+	/* dqrr liodn, frame data liodn, liodn off, sdest */
+	SET_QP_INFO(1, 27, 1, 0),
+	SET_QP_INFO(2, 28, 1, 0),
+	SET_QP_INFO(3, 29, 1, 1),
+	SET_QP_INFO(4, 30, 1, 1),
+	SET_QP_INFO(5, 31, 1, 2),
+	SET_QP_INFO(6, 32, 1, 2),
+	SET_QP_INFO(7, 33, 1, 3),
+	SET_QP_INFO(8, 34, 1, 3),
+	SET_QP_INFO(9, 35, 1, 0),
+	SET_QP_INFO(10, 36, 1, 0),
+	SET_QP_INFO(11, 37, 1, 1),
+	SET_QP_INFO(12, 38, 1, 1),
+	SET_QP_INFO(13, 39, 1, 2),
+	SET_QP_INFO(14, 40, 1, 2),
+	SET_QP_INFO(15, 41, 1, 3),
+	SET_QP_INFO(16, 42, 1, 3),
+	SET_QP_INFO(17, 43, 1, 0),
+	SET_QP_INFO(18, 44, 1, 0),
+	SET_QP_INFO(19, 45, 1, 1),
+	SET_QP_INFO(20, 46, 1, 1),
+	SET_QP_INFO(21, 47, 1, 2),
+	SET_QP_INFO(22, 48, 1, 2),
+	SET_QP_INFO(23, 49, 1, 3),
+	SET_QP_INFO(24, 50, 1, 3),
+	SET_QP_INFO(25, 51, 1, 0),
+};
+#endif
+
+struct srio_liodn_id_table srio_liodn_tbl[] = {
+	SET_SRIO_LIODN_1(1, 307),
+	SET_SRIO_LIODN_1(2, 387),
+};
+int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
+
+struct liodn_id_table liodn_tbl[] = {
+#ifdef CONFIG_SYS_DPAA_QBMAN
+	SET_QMAN_LIODN(62),
+	SET_BMAN_LIODN(63),
+#endif
+
+	SET_SDHC_LIODN(1, 552),
+
+	SET_USB_LIODN(1, "fsl-usb2-mph", 553),
+
+	SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 148),
+
+	SET_DMA_LIODN(1, 147),
+	SET_DMA_LIODN(2, 227),
+
+	SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
+	SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
+	SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
+	SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
+
+	/* SET_NEXUS_LIODN(557), -- not yet implemented */
+};
+int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct liodn_id_table fman1_liodn_tbl[] = {
+	SET_FMAN_RX_1G_LIODN(1, 0, 88),
+	SET_FMAN_RX_1G_LIODN(1, 1, 89),
+	SET_FMAN_RX_1G_LIODN(1, 2, 90),
+	SET_FMAN_RX_1G_LIODN(1, 3, 91),
+	SET_FMAN_RX_1G_LIODN(1, 4, 92),
+	SET_FMAN_RX_1G_LIODN(1, 5, 93),
+	SET_FMAN_RX_10G_LIODN(1, 0, 94),
+	SET_FMAN_RX_10G_LIODN(1, 1, 95),
+};
+int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
+#endif
+
+struct liodn_id_table sec_liodn_tbl[] = {
+	SET_SEC_JR_LIODN_ENTRY(0, 454, 458),
+	SET_SEC_JR_LIODN_ENTRY(1, 455, 459),
+	SET_SEC_JR_LIODN_ENTRY(2, 456, 460),
+	SET_SEC_JR_LIODN_ENTRY(3, 457, 461),
+	SET_SEC_RTIC_LIODN_ENTRY(a, 453),
+	SET_SEC_RTIC_LIODN_ENTRY(b, 549),
+	SET_SEC_RTIC_LIODN_ENTRY(c, 550),
+	SET_SEC_RTIC_LIODN_ENTRY(d, 551),
+	SET_SEC_DECO_LIODN_ENTRY(0, 541, 610),
+	SET_SEC_DECO_LIODN_ENTRY(1, 542, 611),
+};
+int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
+
+#ifdef CONFIG_SYS_DPAA_RMAN
+struct liodn_id_table rman_liodn_tbl[] = {
+	/* Set RMan block 0-3 liodn offset */
+	SET_RMAN_LIODN(0, 678),
+	SET_RMAN_LIODN(1, 679),
+	SET_RMAN_LIODN(2, 680),
+	SET_RMAN_LIODN(3, 681),
+};
+int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
+#endif
+
+struct liodn_id_table liodn_bases[] = {
+	[FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(462, 558),
+#ifdef CONFIG_SYS_DPAA_FMAN
+	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973),
+#endif
+#ifdef CONFIG_SYS_DPAA_RMAN
+	[FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(922),
+#endif
+};
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
new file mode 100644
index 00000000000..8261e034767
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fsl_serdes.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include "fsl_corenet2_serdes.h"
+
+static u8 serdes_cfg_tbl[MAX_SERDES][0xC4][SRDS_MAX_LANES] = {
+	{	/* SerDes 1 */
+	[0x69] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
+		PCIE2, PCIE3, SGMII_FM1_DTSEC4, SATA1},
+	[0x66] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
+		PCIE2, PCIE3, PCIE4, SATA1},
+	[0x67] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
+		PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5},
+	[0x60] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
+		PCIE2, PCIE2, PCIE2, PCIE2},
+	[0x8D] = {PCIE1, SGMII_SW1_DTSEC3, SGMII_SW1_DTSEC1, SGMII_SW1_DTSEC2,
+		PCIE2, SGMII_SW1_DTSEC6, SGMII_SW1_DTSEC4, SGMII_SW1_DTSEC5},
+	[0x89] = {PCIE1, SGMII_SW1_DTSEC3, SGMII_SW1_DTSEC1, SGMII_SW1_DTSEC2,
+		PCIE2, PCIE3, SGMII_SW1_DTSEC4, SATA1},
+	[0x86] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		PCIE2, PCIE3, PCIE4, SATA1},
+	[0x87] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5},
+	[0xA7] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		 PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5},
+	[0xAA] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		 PCIE2, PCIE3, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5},
+	[0x40] = {PCIE1, PCIE1, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		PCIE2, PCIE2, PCIE2, PCIE2},
+	[0x06] = {PCIE1, PCIE1, PCIE1, PCIE1,
+		PCIE2, PCIE3, PCIE4, SATA1},
+	[0x08] = {PCIE1, PCIE1, PCIE1, PCIE1,
+		PCIE2, PCIE3, SATA2, SATA1},
+	[0x8F] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		AURORA, NONE, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5},
+	[0x85] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5},
+	[0xA5] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5},
+	[0x00] = {PCIE1, PCIE1, PCIE1, PCIE1,
+		PCIE2, PCIE2, PCIE2, PCIE2},
+	},
+	{
+	},
+	{
+	},
+	{
+	},
+};
+
+
+enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
+{
+	return serdes_cfg_tbl[serdes][cfg][lane];
+}
+
+int is_serdes_prtcl_valid(int serdes, u32 prtcl)
+{
+	int i;
+
+	if (prtcl > (ARRAY_SIZE(serdes_cfg_tbl[serdes])))
+		return 0;
+
+	for (i = 0; i < SRDS_MAX_LANES; i++) {
+		if (serdes_cfg_tbl[serdes][prtcl][i] != NONE)
+			return 1;
+	}
+
+	return 0;
+}
diff --git a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
index 102defa5606..c001780ca96 100644
--- a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
@@ -31,7 +31,8 @@ struct serdes_config {
 	u8 lanes[SRDS_MAX_LANES];
 };
 
-static struct serdes_config serdes1_cfg_tbl[] = {
+#ifdef CONFIG_PPC_T4240
+static const struct serdes_config serdes1_cfg_tbl[] = {
 	/* SerDes 1 */
 	{1, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
 		XAUI_FM1_MAC9, XAUI_FM1_MAC9,
@@ -66,7 +67,7 @@ static struct serdes_config serdes1_cfg_tbl[] = {
 		NONE, NONE, QSGMII_FM1_A, NONE}},
 	{}
 };
-static struct serdes_config serdes2_cfg_tbl[] = {
+static const struct serdes_config serdes2_cfg_tbl[] = {
 	/* SerDes 2 */
 	{1, {XAUI_FM2_MAC9, XAUI_FM2_MAC9,
 		XAUI_FM2_MAC9, XAUI_FM2_MAC9,
@@ -150,7 +151,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
 		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4}},
 	{}
 };
-static struct serdes_config serdes3_cfg_tbl[] = {
+static const struct serdes_config serdes3_cfg_tbl[] = {
 	/* SerDes 3 */
 	{2, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1}},
 	{4, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}},
@@ -174,20 +175,151 @@ static struct serdes_config serdes3_cfg_tbl[] = {
 		SRIO1, SRIO1, SRIO1, SRIO1}},
 	{}
 };
-static struct serdes_config serdes4_cfg_tbl[] = {
+static const struct serdes_config serdes4_cfg_tbl[] = {
 	/* SerDes 4 */
 	{2, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3}},
 	{4, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4}},
 	{6, {PCIE3, PCIE3, PCIE3, PCIE3, SRIO2, SRIO2, SRIO2, SRIO2}},
 	{8, {PCIE3, PCIE3, PCIE3, PCIE3, SRIO2, SRIO2, SRIO2, SRIO2}},
-	{10, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SATA1, SATA1}},
-	{12, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, SATA1, SATA1}},
+	{10, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SATA1, SATA2} },
+	{12, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, SATA1, SATA2} },
 	{14, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, SRIO2, SRIO2}},
 	{16, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, SRIO2, SRIO2}},
 	{18, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, AURORA, AURORA}},
 	{}
 };
-static struct serdes_config *serdes_cfg_tbl[] = {
+#elif defined(CONFIG_PPC_T4160)
+static const struct serdes_config serdes1_cfg_tbl[] = {
+	/* SerDes 1 */
+	{1, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
+		XAUI_FM1_MAC9, XAUI_FM1_MAC9,
+		XAUI_FM1_MAC10, XAUI_FM1_MAC10,
+		XAUI_FM1_MAC10, XAUI_FM1_MAC10} },
+	{2, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+		HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+		HIGIG_FM1_MAC10, HIGIG_FM1_MAC10,
+		HIGIG_FM1_MAC10, HIGIG_FM1_MAC10} },
+	{4, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+		HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+		HIGIG_FM1_MAC10, HIGIG_FM1_MAC10,
+		HIGIG_FM1_MAC10, HIGIG_FM1_MAC10} },
+	{28, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
+		SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC9,
+		SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4} },
+	{36, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
+		SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC9,
+		SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4} },
+	{38, {NONE, NONE, QSGMII_FM1_B, NONE,
+		NONE, NONE, QSGMII_FM1_A, NONE} },
+	{}
+};
+static const struct serdes_config serdes2_cfg_tbl[] = {
+	/* SerDes 2 */
+	{7, {XAUI_FM2_MAC9, XAUI_FM2_MAC9,
+		XAUI_FM2_MAC9, XAUI_FM2_MAC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{13, {XAUI_FM2_MAC9, XAUI_FM2_MAC9,
+		XAUI_FM2_MAC9, XAUI_FM2_MAC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{16, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{22, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{25, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{26, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		NONE, NONE} },
+	{28, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
+		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{36, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
+		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{38, {NONE, NONE, QSGMII_FM2_B, NONE,
+		NONE, QSGMII_FM1_A, NONE, NONE} },
+	{40, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
+		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
+		NONE, QSGMII_FM1_A, NONE, NONE} },
+	{46, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
+		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
+		NONE, QSGMII_FM1_A, NONE, NONE} },
+	{48, {SGMII_FM2_DTSEC5, SGMII_FM2_DTSEC6,
+		SGMII_FM2_DTSEC10, SGMII_FM2_DTSEC9,
+		NONE, QSGMII_FM1_A, NONE, NONE} },
+	{50, {XAUI_FM2_MAC9, XAUI_FM2_MAC9,
+		XAUI_FM2_MAC9, XAUI_FM2_MAC9,
+		NONE, NONE, NONE, NONE} },
+	{52, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		NONE, NONE, NONE, NONE} },
+	{54, {HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		HIGIG_FM2_MAC9, HIGIG_FM2_MAC9,
+		NONE, NONE, NONE, NONE} },
+	{56, {NONE, XFI_FM1_MAC10,
+		XFI_FM2_MAC10, NONE,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		SGMII_FM2_DTSEC3, SGMII_FM2_DTSEC4} },
+	{57, {NONE, XFI_FM1_MAC10,
+		XFI_FM2_MAC10, NONE,
+		SGMII_FM2_DTSEC1, SGMII_FM2_DTSEC2,
+		NONE, NONE} },
+	{}
+};
+static const struct serdes_config serdes3_cfg_tbl[] = {
+	/* SerDes 3 */
+	{2, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1} },
+	{4, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2} },
+	{6, {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1} },
+	{8, {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, NONE, NONE, NONE} },
+	{9, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+		INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN} },
+	{10, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+		INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN} },
+	{12, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+		PCIE2, PCIE2, PCIE2, PCIE2} },
+	{14, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+		PCIE2, PCIE2, PCIE2, PCIE2} },
+	{16, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+		SRIO1, SRIO1, SRIO1, SRIO1} },
+	{17, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+		SRIO1, SRIO1, SRIO1, SRIO1} },
+	{19, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+		SRIO1, SRIO1, SRIO1, SRIO1} },
+	{20, {INTERLAKEN, INTERLAKEN, INTERLAKEN, INTERLAKEN,
+			NONE, NONE, NONE, NONE} },
+	{}
+};
+static const struct serdes_config serdes4_cfg_tbl[] = {
+	/* SerDes 4 */
+	{4, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4} },
+	{6, {SRIO2, SRIO2, SRIO2, SRIO2, SRIO2, SRIO2, SRIO2, SRIO2} },
+	{8, {SRIO2, SRIO2, SRIO2, SRIO2, SRIO2, SRIO2, SRIO2, SRIO2} },
+	{10, {PCIE3, PCIE3, PCIE3, PCIE3, SATA1, SATA1, SATA2, SATA2} },
+	{12, {AURORA, AURORA, AURORA, AURORA, SATA1, SATA1, SATA2, SATA2} },
+	{14, {AURORA, AURORA, AURORA, AURORA, SRIO2, SRIO2, SRIO2, SRIO2} },
+	{16, {AURORA, AURORA, AURORA, AURORA, SRIO2, SRIO2, SRIO2, SRIO2} },
+	{18, {AURORA, AURORA, AURORA, AURORA, AURORA, AURORA, AURORA, AURORA} },
+	{}
+}
+;
+#else
+#error "Need to define SerDes protocol"
+#endif
+static const struct serdes_config *serdes_cfg_tbl[] = {
 	serdes1_cfg_tbl,
 	serdes2_cfg_tbl,
 	serdes3_cfg_tbl,
@@ -196,7 +328,7 @@ static struct serdes_config *serdes_cfg_tbl[] = {
 
 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
 {
-	struct serdes_config *ptr;
+	const struct serdes_config *ptr;
 
 	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
 		return 0;
@@ -213,7 +345,7 @@ enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
 int is_serdes_prtcl_valid(int serdes, u32 prtcl)
 {
 	int i;
-	struct serdes_config *ptr;
+	const struct serdes_config *ptr;
 
 	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
 		return 0;
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 39525fb29d5..bc2685544e8 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -77,6 +77,7 @@ static struct cpu_type cpu_type_list[] = {
 	CPU_TYPE_ENTRY(P5040, P5040, 4),
 	CPU_TYPE_ENTRY(T4240, T4240, 0),
 	CPU_TYPE_ENTRY(T4120, T4120, 0),
+	CPU_TYPE_ENTRY(T4160, T4160, 0),
 	CPU_TYPE_ENTRY(B4860, B4860, 0),
 	CPU_TYPE_ENTRY(G4860, G4860, 0),
 	CPU_TYPE_ENTRY(G4060, G4060, 0),
@@ -84,6 +85,12 @@ static struct cpu_type cpu_type_list[] = {
 	CPU_TYPE_ENTRY(G4440, G4440, 0),
 	CPU_TYPE_ENTRY(B4420, B4420, 0),
 	CPU_TYPE_ENTRY(B4220, B4220, 0),
+	CPU_TYPE_ENTRY(T1040, T1040, 0),
+	CPU_TYPE_ENTRY(T1041, T1041, 0),
+	CPU_TYPE_ENTRY(T1042, T1042, 0),
+	CPU_TYPE_ENTRY(T1020, T1020, 0),
+	CPU_TYPE_ENTRY(T1021, T1021, 0),
+	CPU_TYPE_ENTRY(T1022, T1022, 0),
 	CPU_TYPE_ENTRY(BSC9130, 9130, 1),
 	CPU_TYPE_ENTRY(BSC9131, 9131, 1),
 	CPU_TYPE_ENTRY(BSC9132, 9132, 2),
@@ -96,35 +103,70 @@ static struct cpu_type cpu_type_list[] = {
 };
 
 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+static inline u32 init_type(u32 cluster, int init_id)
+{
+	ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	u32 idx = (cluster >> (init_id * 8)) & TP_CLUSTER_INIT_MASK;
+	u32 type = in_be32(&gur->tp_ityp[idx]);
+
+	if (type & TP_ITYP_AV)
+		return type;
+
+	return 0;
+}
+
 u32 compute_ppc_cpumask(void)
 {
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 	int i = 0, count = 0;
-	u32 cluster, mask = 0;
+	u32 cluster, type, mask = 0;
 
 	do {
 		int j;
-		cluster = in_be32(&gur->tp_cluster[i++].lower);
-		for (j = 0; j < 4; j++) {
-			u32 idx = (cluster >> (j*8)) & TP_CLUSTER_INIT_MASK;
-			u32 type = in_be32(&gur->tp_ityp[idx]);
-
-			if (type & TP_ITYP_AV) {
+		cluster = in_be32(&gur->tp_cluster[i].lower);
+		for (j = 0; j < TP_INIT_PER_CLUSTER; j++) {
+			type = init_type(cluster, j);
+			if (type) {
 				if (TP_ITYP_TYPE(type) == TP_ITYP_TYPE_PPC)
 					mask |= 1 << count;
+				count++;
 			}
-			count++;
 		}
+		i++;
 	} while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC);
 
 	return mask;
 }
+
+int fsl_qoriq_core_to_cluster(unsigned int core)
+{
+	ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	int i = 0, count = 0;
+	u32 cluster;
+
+	do {
+		int j;
+		cluster = in_be32(&gur->tp_cluster[i].lower);
+		for (j = 0; j < TP_INIT_PER_CLUSTER; j++) {
+			if (init_type(cluster, j)) {
+				if (count == core)
+					return i;
+				count++;
+			}
+		}
+		i++;
+	} while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC);
+
+	return -1;	/* cannot identify the cluster */
+}
+
 #else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 /*
  * Before chassis genenration 2, the cpumask should be hard-coded.
  * In case of cpu type unknown or cpumask unset, use 1 as fail save.
  */
 #define compute_ppc_cpumask()	1
+#define fsl_qoriq_core_to_cluster(x) x
 #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
 static struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 0);
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index 9adde310109..e958e138dda 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -44,7 +44,6 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
 		printf("DDR clock (MCLK cycle %u ps) is faster than "
 			"the slowest DIMM(s) (tCKmin %u ps) can support.\n",
 			mclk_ps, tCKmin_X_ps);
-		return 1;
 	}
 	/* determine the acutal cas latency */
 	caslat_actual = (tAAmin_ps + mclk_ps - 1) / mclk_ps;
@@ -60,7 +59,6 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
 	if (caslat_actual * mclk_ps > 20000) {
 		printf("The choosen cas latency %d is too large\n",
 			caslat_actual);
-		return 1;
 	}
 	outpdimm->lowest_common_SPD_caslat = caslat_actual;
 
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 5311a262a29..7a8636de166 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -186,7 +186,7 @@ const char * step_to_string(unsigned int step) {
 	return step_string_tbl[s];
 }
 
-unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
+static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo,
 			  unsigned int dbw_cap_adj[])
 {
 	int i, j;
@@ -354,6 +354,11 @@ unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
 	return total_mem;
 }
 
+/* Use weak function to allow board file to override the address assignment */
+__attribute__((weak, alias("__step_assign_addresses")))
+unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
+			  unsigned int dbw_cap_adj[]);
+
 unsigned long long
 fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
 				       unsigned int size_only)
@@ -541,14 +546,17 @@ phys_size_t fsl_ddr_sdram(void)
 		total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 0);
 
 	/* setup 3-way interleaving before enabling DDRC */
-	switch (info.memctl_opts[0].memctl_interleaving_mode) {
-	case FSL_DDR_3WAY_1KB_INTERLEAVING:
-	case FSL_DDR_3WAY_4KB_INTERLEAVING:
-	case FSL_DDR_3WAY_8KB_INTERLEAVING:
-		fsl_ddr_set_intl3r(info.memctl_opts[0].memctl_interleaving_mode);
-		break;
-	default:
-		break;
+	if (info.memctl_opts[0].memctl_interleaving) {
+		switch (info.memctl_opts[0].memctl_interleaving_mode) {
+		case FSL_DDR_3WAY_1KB_INTERLEAVING:
+		case FSL_DDR_3WAY_4KB_INTERLEAVING:
+		case FSL_DDR_3WAY_8KB_INTERLEAVING:
+			fsl_ddr_set_intl3r(
+				info.memctl_opts[0].memctl_interleaving_mode);
+			break;
+		default:
+			break;
+		}
 	}
 
 	/* Program configuration registers. */
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 7267611cbcc..1009a31b339 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -512,23 +512,34 @@
 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
 
-#elif defined(CONFIG_PPC_T4240)
+#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
+#define CONFIG_E6500
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
+#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
+#ifdef CONFIG_PPC_T4240
 #define CONFIG_MAX_CPUS			12
+#define CONFIG_SYS_NUM_FM1_DTSEC	8
+#define CONFIG_SYS_NUM_FM1_10GEC	2
+#define CONFIG_SYS_NUM_FM2_DTSEC	8
+#define CONFIG_SYS_NUM_FM2_10GEC	2
+#define CONFIG_NUM_DDR_CONTROLLERS	3
+#else
+#define CONFIG_MAX_CPUS			8
+#define CONFIG_SYS_NUM_FM1_DTSEC	7
+#define CONFIG_SYS_NUM_FM1_10GEC	1
+#define CONFIG_SYS_NUM_FM2_DTSEC	7
+#define CONFIG_SYS_NUM_FM2_10GEC	1
+#define CONFIG_NUM_DDR_CONTROLLERS	2
+#endif
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	5
 #define CONFIG_SYS_FSL_NUM_LAWS		32
 #define CONFIG_SYS_FSL_SRDS_3
 #define CONFIG_SYS_FSL_SRDS_4
 #define CONFIG_SYS_FSL_SEC_COMPAT	4
 #define CONFIG_SYS_NUM_FMAN		2
-#define CONFIG_SYS_NUM_FM1_DTSEC	8
-#define CONFIG_SYS_NUM_FM1_10GEC	2
-#define CONFIG_SYS_NUM_FM2_DTSEC	8
-#define CONFIG_SYS_NUM_FM2_10GEC	2
-#define CONFIG_NUM_DDR_CONTROLLERS	3
 #define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_4_7
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FM_MURAM_SIZE	0x60000
@@ -537,26 +548,23 @@
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
-#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
-#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
+#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_SYS_FSL_ERRATUM_A004468
 #define CONFIG_SYS_FSL_ERRATUM_A_004934
 #define CONFIG_SYS_FSL_ERRATUM_A005871
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000
+#define CONFIG_SYS_FSL_PCI_VER_3_X
 
-#elif defined(CONFIG_PPC_B4420)
+#elif defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_B4420)
+#define CONFIG_E6500
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
-#define CONFIG_MAX_CPUS			2
-#define CONFIG_SYS_FSL_NUM_CC_PLLS	4
 #define CONFIG_SYS_FSL_NUM_LAWS		32
 #define CONFIG_SYS_FSL_SEC_COMPAT	4
 #define CONFIG_SYS_NUM_FMAN		1
-#define CONFIG_SYS_NUM_FM1_DTSEC	4
-#define CONFIG_NUM_DDR_CONTROLLERS	1
 #define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_4_7
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FM_MURAM_SIZE	0x60000
@@ -567,30 +575,50 @@
 #define CONFIG_SYS_FSL_ERRATUM_A005871
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000
 
-#elif defined(CONFIG_PPC_B4860)
-#define CONFIG_SYS_PPC64		/* 64-bit core */
+#ifdef CONFIG_PPC_B4860
+#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
+#define CONFIG_MAX_CPUS			4
+#define CONFIG_SYS_FSL_NUM_CC_PLLS	4
+#define CONFIG_SYS_NUM_FM1_DTSEC	6
+#define CONFIG_SYS_NUM_FM1_10GEC	2
+#define CONFIG_NUM_DDR_CONTROLLERS	2
+#define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
+#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
+#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
+#else
+#define CONFIG_MAX_CPUS			2
+#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
+#define CONFIG_SYS_FSL_NUM_CC_PLLS	4
+#define CONFIG_SYS_NUM_FM1_DTSEC	4
+#define CONFIG_SYS_NUM_FM1_10GEC	0
+#define CONFIG_NUM_DDR_CONTROLLERS	1
+#endif
+
+#elif defined(CONFIG_PPC_T1040)
+#define CONFIG_E5500
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
+#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 #define CONFIG_MAX_CPUS			4
-#define CONFIG_SYS_FSL_NUM_CC_PLLS	4
-#define CONFIG_SYS_FSL_NUM_LAWS		32
+#define CONFIG_SYS_FSL_NUM_CC_PLLS	5
+#define CONFIG_SYS_FSL_NUM_LAWS		16
 #define CONFIG_SYS_FSL_SEC_COMPAT	4
 #define CONFIG_SYS_NUM_FMAN		1
-#define CONFIG_SYS_NUM_FM1_DTSEC	6
-#define CONFIG_SYS_NUM_FM1_10GEC	2
-#define CONFIG_NUM_DDR_CONTROLLERS	2
+#define CONFIG_SYS_NUM_FM1_DTSEC	5
+#define CONFIG_NUM_DDR_CONTROLLERS	1
 #define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_4_7
+#define CONFIG_SYS_FSL_IFC_BANK_COUNT	4
 #define CONFIG_SYS_FMAN_V3
-#define CONFIG_SYS_FM_MURAM_SIZE	0x60000
-#define CONFIG_SYS_FSL_TBCLK_DIV	16
+#define CONFIG_SYS_FM_MURAM_SIZE	0x28000
+#define CONFIG_SYS_FSL_TBCLK_DIV	32
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.4"
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
-#define CONFIG_SYS_FSL_ERRATUM_A_004934
-#define CONFIG_SYS_FSL_ERRATUM_A005871
+#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
+#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000
 
 #else
@@ -601,4 +629,10 @@
 #error "CONFIG_SYS_CCSRBAR_DEFAULT is not defined for this platform."
 #endif
 
+#ifdef CONFIG_E6500
+#define CONFIG_SYS_FSL_THREADS_PER_CORE 2
+#else
+#define CONFIG_SYS_FSL_THREADS_PER_CORE 1
+#endif
+
 #endif /* _ASM_MPC85xx_CONFIG_H_ */
diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index f9cec8ea441..90b264d35e7 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -70,6 +70,8 @@ enum law_trgt_if {
 	LAW_TRGT_IF_DCSR = 0x1d,
 	LAW_TRGT_IF_LBC = 0x1f,
 	LAW_TRGT_IF_QMAN = 0x3c,
+
+	LAW_TRGT_IF_MAPLE = 0x50,
 };
 #define LAW_TRGT_IF_DDR		LAW_TRGT_IF_DDR_1
 #define LAW_TRGT_IF_IFC		LAW_TRGT_IF_LBC
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index d1c1967d1d6..2bc6ed1cf00 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -23,16 +23,6 @@
 #ifndef __FSL_SECURE_BOOT_H
 #define __FSL_SECURE_BOOT_H
 
-/* Starting TLB number for the TLB entried for 3.5 G space created by ISBC */
-#if defined(CONFIG_FSL_CORENET)
-#define CONFIG_SYS_ISBC_START_TLB		3
-#else
-#define CONFIG_SYS_ISBC_START_TLB		0
-#endif
-
-/* Number fo TLB's created by ISBC */
-#define CONFIG_SYS_ISBC_NUM_TLBS		5
-
 #if defined(CONFIG_FSL_CORENET)
 #define CONFIG_SYS_PBI_FLASH_BASE		0xc0000000
 #else
diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index 6cd7379c8f5..ccb91fb0624 100644
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -80,6 +80,14 @@ enum srds_prtcl {
 	XFI_FM2_MAC9,
 	XFI_FM2_MAC10,
 	INTERLAKEN,
+	SGMII_SW1_DTSEC1,	/* SW indicates on L2 switch */
+	SGMII_SW1_DTSEC2,
+	SGMII_SW1_DTSEC3,
+	SGMII_SW1_DTSEC4,
+	SGMII_SW1_DTSEC5,
+	SGMII_SW1_DTSEC6,
+	QSGMII_SW1_A,		/* SW indicates on L2 swtich */
+	QSGMII_SW1_B,
 };
 
 enum srds {
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index d5db8549cc9..c02447fd281 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -104,12 +104,6 @@ struct arch_global_data {
 	u32 ips_clk;
 	u32 csb_clk;
 #endif /* CONFIG_MPC512X */
-#if defined(CONFIG_MPC8220)
-	unsigned long inp_clk;
-	unsigned long vco_clk;
-	unsigned long pev_clk;
-	unsigned long flb_clk;
-#endif
 	unsigned long reset_status;	/* reset status register at boot */
 #if defined(CONFIG_MPC83xx)
 	unsigned long arbiter_event_attributes;
diff --git a/arch/powerpc/include/asm/immap_8220.h b/arch/powerpc/include/asm/immap_8220.h
deleted file mode 100644
index f9595f42d9b..00000000000
--- a/arch/powerpc/include/asm/immap_8220.h
+++ /dev/null
@@ -1,246 +0,0 @@
-/*
- * MPC8220 Internal Memory Map
- * Copyright (c) 2004 TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * The Internal Memory Map of the 8220.
- *
- */
-#ifndef __IMMAP_MPC8220__
-#define __IMMAP_MPC8220__
-
-/*
- * System configuration registers.
- */
-typedef struct sys_conf {
-    u16     mbar;       /* 0x00 */
-    u16     res1;
-
-    u16     res2;       /* 0x04 */
-    u16     sdramds;
-
-    u32     res3[6];    /* 0x08 */
-
-    u32     cscfg[6];   /* 0x20 */
-
-    u32     res4[2];    /* 0x38 */
-
-    u8      res5[3];    /* 0x40 */
-    u8      rstctrl;
-
-    u8      res6[3];    /* 0x44 */
-    u8      rststat;
-
-    u32     res7[2];    /* 0x48 */
-
-    u32     jtagid;     /* 0x50 */
-} sysconf8220_t;
-
-
-/*
- * Memory controller registers.
- */
-typedef struct mem_ctlr {
-    ushort  mode;           /* 0x100 */
-    ushort  res1;
-    u32     ctrl;           /* 0x104 */
-    u32     cfg1;           /* 0x108 */
-    u32     cfg2;           /* 0x10c */
-} memctl8220_t;
-
-/*
- * XLB Arbitration registers
- */
-typedef struct xlb_arb
-{
-    uint    res1[16];       /* 0x200 */
-    uint    config;         /* 0x240 */
-    uint    version;        /* 0x244 */
-    uint    status;         /* 0x248 */
-    uint    intEnable;      /* 0x24c */
-    uint    addrCap;        /* 0x250 */
-    uint    busSigCap;      /* 0x254 */
-    uint    addrTenTimeOut; /* 0x258 */
-    uint    dataTenTimeOut; /* 0x25c */
-    uint    busActTimeOut;  /* 0x260 */
-    uint    mastPriEn;      /* 0x264 */
-    uint    mastPriority;   /* 0x268 */
-    uint    baseAddr;       /* 0x26c */
-} xlbarb8220_t;
-
-/*
- * Flexbus registers
- */
-typedef struct flexbus
-{
-    ushort  csar0;          /* 0x00 */
-    ushort  res1;
-    uint    csmr0;          /* 0x04 */
-    uint    cscr0;          /* 0x08 */
-
-    ushort  csar1;          /* 0x0c */
-    ushort  res2;
-    uint    csmr1;          /* 0x10 */
-    uint    cscr1;          /* 0x14 */
-
-    ushort  csar2;          /* 0x18 */
-    ushort  res3;
-    uint    csmr2;          /* 0x1c */
-    uint    cscr2;          /* 0x20 */
-
-    ushort  csar3;          /* 0x24 */
-    ushort  res4;
-    uint    csmr3;          /* 0x28 */
-    uint    cscr3;          /* 0x2c */
-
-    ushort  csar4;          /* 0x30 */
-    ushort  res5;
-    uint    csmr4;          /* 0x34 */
-    uint    cscr4;          /* 0x38 */
-
-    ushort  csar5;          /* 0x3c */
-    ushort  res6;
-    uint    csmr5;          /* 0x40 */
-    uint    cscr5;          /* 0x44 */
-} flexbus8220_t;
-
-/*
- * GPIO registers
- */
-typedef struct gpio
-{
-    u32     out;        /* 0x00 */
-    u32     obs;        /* 0x04 */
-    u32     obc;        /* 0x08 */
-    u32     obt;        /* 0x0c */
-    u32     en;         /* 0x10 */
-    u32     ebs;        /* 0x14 */
-    u32     ebc;        /* 0x18 */
-    u32     ebt;        /* 0x1c */
-    u32     mc;         /* 0x20 */
-    u32     st;         /* 0x24 */
-    u32     intr;       /* 0x28 */
-} gpio8220_t;
-
-/*
- * General Purpose Timer registers
- */
-typedef struct gptimer
-{
-    u8  OCPW;
-    u8  OctIct;
-    u8  Control;
-    u8  Mode;
-
-    u16 Prescl;  /* Prescale */
-    u16 Count;   /* Count */
-
-    u16 PwmWid;  /* PWM Width */
-    u8  PwmOp;   /* Output Polarity */
-    u8  PwmLd;   /* Immediate Update */
-
-    u16 Capture; /* Capture internal counter */
-    u8  OvfPin;  /* Ovf and Pin */
-    u8  Int;     /* Interrupts */
-} gptmr8220_t;
-
-/*
- * PSC registers
- */
-typedef struct psc
-{
-    u32 mr1_2;             /* 0x00 Mode reg 1 & 2 */
-    u32 sr_csr;            /* 0x04 Status/Clock Select reg */
-    u32 cr;                /* 0x08 Command reg */
-    u8  xmitbuf[4];        /* 0x0c Receive/Transmit Buffer */
-    u32 ipcr_acr;          /* 0x10 Input Port Change/Auxiliary Control reg */
-    u32 isr_imr;           /* 0x14 Interrupt Status/Mask reg */
-    u32 ctur;              /* 0x18 Counter Timer Upper reg */
-    u32 ctlr;              /* 0x1c Counter Timer Lower reg */
-    u32 rsvd1[4];          /* 0x20 ... 0x2c */
-    u32 ivr;               /* 0x30 Interrupt Vector reg */
-    u32 ipr;               /* 0x34 Input Port reg */
-    u32 opsetr;            /* 0x38 Output Port Set reg */
-    u32 opresetr;          /* 0x3c Output Port Reset reg */
-    u32 sicr;              /* 0x40 PSC/IrDA control reg */
-    u32 ircr1;             /* 0x44 IrDA control reg 1*/
-    u32 ircr2;             /* 0x48 IrDA control reg 2*/
-    u32 irsdr;             /* 0x4c IrDA SIR Divide reg */
-    u32 irmdr;             /* 0x50 IrDA MIR Divide reg */
-    u32 irfdr;             /* 0x54 PSC IrDA FIR Divide reg */
-    u32 rfnum;             /* 0x58 RX-FIFO counter */
-    u32 txnum;             /* 0x5c TX-FIFO counter */
-    u32 rfdata;            /* 0x60 RX-FIFO data */
-    u32 rfstat;            /* 0x64 RX-FIFO status */
-    u32 rfcntl;            /* 0x68 RX-FIFO control */
-    u32 rfalarm;           /* 0x6c RX-FIFO alarm */
-    u32 rfrptr;            /* 0x70 RX-FIFO read pointer */
-    u32 rfwptr;            /* 0x74 RX-FIFO write pointer */
-    u32 rflfrptr;          /* 0x78 RX-FIFO last read frame pointer */
-    u32 rflfwptr;          /* 0x7c RX-FIFO last write frame pointer */
-
-    u32 tfdata;            /* 0x80 TX-FIFO data */
-    u32 tfstat;            /* 0x84 TX-FIFO status */
-    u32 tfcntl;            /* 0x88 TX-FIFO control */
-    u32 tfalarm;           /* 0x8c TX-FIFO alarm */
-    u32 tfrptr;            /* 0x90 TX-FIFO read pointer */
-    u32 tfwptr;            /* 0x94 TX-FIFO write pointer */
-    u32 tflfrptr;          /* 0x98 TX-FIFO last read frame pointer */
-    u32 tflfwptr;          /* 0x9c TX-FIFO last write frame pointer */
-} psc8220_t;
-
-/*
- * Interrupt Controller registers
- */
-typedef struct interrupt_controller {
-} intctl8220_t;
-
-
-/* Fast controllers
-*/
-
-/*
- * I2C registers
- */
-typedef struct i2c
-{
-    u8   adr;            /* 0x00 */
-    u8   res1[3];
-    u8   fdr;            /* 0x04 */
-    u8   res2[3];
-    u8   cr;             /* 0x08 */
-    u8   res3[3];
-    u8   sr;             /* 0x0C */
-    u8   res4[3];
-    u8   dr;             /* 0x10 */
-    u8   res5[3];
-    u32  reserved0;      /* 0x14 */
-    u32  reserved1;      /* 0x18 */
-    u32  reserved2;      /* 0x1c */
-    u8   icr;            /* 0x20 */
-    u8   res6[3];
-} i2c8220_t;
-
-/*
- * Port Configuration Registers
- */
-typedef struct pcfg
-{
-    uint    pcfg0;          /* 0x00 */
-    uint    pcfg1;          /* 0x04 */
-    uint    pcfg2;          /* 0x08 */
-    uint    pcfg3;          /* 0x0c */
-} pcfg8220_t;
-
-/* ...and the whole thing wrapped up....
-*/
-typedef struct immap {
-    sysconf8220_t   im_sysconf; /* System Configuration */
-    memctl8220_t    im_memctl;  /* Memory Controller */
-    xlbarb8220_t    im_xlbarb;  /* XLB Arbitration */
-    psc8220_t       im_psc;     /* PSC controller */
-    flexbus8220_t   im_fb;      /* FlexBus Controller */
-    i2c8220_t       im_i2c;     /* I2C control/status */
-    pcfg8220_t      im_pcfg;    /* Port configuration */
-} immap_t;
-
-#endif /* __IMMAP_MPC8220__ */
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index baaa9fee534..4052037f56f 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1676,18 +1676,17 @@ typedef struct cpc_corenet {
 /* Global Utilities Block */
 #ifdef CONFIG_FSL_CORENET
 typedef struct ccsr_gur {
-	u32	porsr1;		/* POR status */
-	u8	res1[28];
+	u32	porsr1;		/* POR status 1 */
+	u32	porsr2;		/* POR status 2 */
+	u8	res_008[0x20-0x8];
 	u32	gpporcr1;	/* General-purpose POR configuration */
-	u8	res2[12];
-	u32	gpiocr;		/* GPIO control */
-	u8	res3[12];
-	u32	gpoutdr;	/* General-purpose output data */
-	u8	res4[12];
-	u32	gpindr;		/* General-purpose input data */
-	u8	res5[12];
-	u32	alt_pmuxcr;	/* Alt function signal multiplex control */
-	u8	res6[12];
+	u32	gpporcr2;	/* General-purpose POR configuration 2 */
+	u32	dcfg_fusesr;	/* Fuse status register */
+#define FSL_CORENET_DCFG_FUSESR_VID_SHIFT	25
+#define FSL_CORENET_DCFG_FUSESR_VID_MASK	0x1F
+#define FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT	20
+#define FSL_CORENET_DCFG_FUSESR_ALTVID_MASK	0x1F
+	u8	res_02c[0x70-0x2c];
 	u32	devdisr;	/* Device disable control */
 	u32	devdisr2;	/* Device disable control 2 */
 	u32	devdisr3;	/* Device disable control 3 */
@@ -1831,7 +1830,7 @@ typedef struct ccsr_gur {
 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
 #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT	16
 #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK	0x3f
-#if defined(CONFIG_PPC_T4240)
+#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL		0xfc000000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT	26
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL		0x00fe0000
@@ -1845,6 +1844,11 @@ typedef struct ccsr_gur {
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT	25
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL	0x00ff0000
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT	16
+#elif defined(CONFIG_PPC_T1040)
+#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL	0xff000000
+#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT	24
+#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL	0x00fe0000
+#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT	17
 #endif
 #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S1_PLL1	0x00800000
 #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S1_PLL2	0x00400000
@@ -1899,7 +1903,7 @@ typedef struct ccsr_gur {
 #define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_MII          0x00100000
 #define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_NONE         0x00180000
 #endif
-#if defined(CONFIG_PPC_T4240)
+#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
 #define FSL_CORENET_RCWSR13_EC1			0x60000000 /* bits 417..418 */
 #define FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII	0x00000000
 #define FSL_CORENET_RCWSR13_EC1_FM2_GPIO		0x40000000
@@ -1992,6 +1996,7 @@ typedef struct ccsr_gur {
 
 #define TP_CLUSTER_EOC		0x80000000	/* end of clusters */
 #define TP_CLUSTER_INIT_MASK	0x0000003f	/* initiator mask */
+#define TP_INIT_PER_CLUSTER	4
 
 #define FSL_CORENET_DCSR_SZ_MASK	0x00000003
 #define FSL_CORENET_DCSR_SZ_4M		0x0
@@ -2004,22 +2009,13 @@ typedef struct ccsr_gur {
 #define rmuliodnr rio1maintliodnr
 
 typedef struct ccsr_clk {
-	u32	clkc0csr;	/* 0x000 Core 0 Clock control/status */
-	u8	res1[0x1c];
-	u32	clkc1csr;	/* 0x020 Core 1 Clock control/status */
-	u8	res2[0x1c];
-	u32	clkc2csr;	/* 0x040 Core 2 Clock control/status */
-	u8	res3[0x1c];
-	u32	clkc3csr;	/* 0x060 Core 3 Clock control/status */
-	u8	res4[0x1c];
-	u32	clkc4csr;	/* 0x080 Core 4 Clock control/status */
-	u8	res5[0x1c];
-	u32	clkc5csr;	/* 0x0a0 Core 5 Clock control/status */
-	u8	res6[0x1c];
-	u32	clkc6csr;	/* 0x0c0 Core 6 Clock control/status */
-	u8	res7[0x1c];
-	u32	clkc7csr;	/* 0x0e0 Core 7 Clock control/status */
-	u8	res8[0x71c];
+	struct {
+		u32 clkcncsr;	/* core cluster n clock control status */
+		u8  res_004[0x0c];
+		u32 clkcgnhwacsr;/* clock generator n hardware accelerator */
+		u8  res_014[0x0c];
+	} clkcsr[8];
+	u8	res_100[0x700]; /* 0x100 */
 	u32	pllc1gsr;	/* 0x800 Cluster PLL 1 General Status */
 	u8	res10[0x1c];
 	u32	pllc2gsr;	/* 0x820 Cluster PLL 2 General Status */
@@ -2829,12 +2825,53 @@ typedef struct ccsr_pme {
 	u8	res4[0x400];
 } ccsr_pme_t;
 
+#ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
+struct ccsr_usb_port_ctrl {
+	u32	ctrl;
+	u32	drvvbuscfg;
+	u32	pwrfltcfg;
+	u32	sts;
+	u8	res_14[0xc];
+	u32	bistcfg;
+	u32	biststs;
+	u32	abistcfg;
+	u32	abiststs;
+	u8	res_30[0x10];
+	u32	xcvrprg;
+	u32	anaprg;
+	u32	anadrv;
+	u32	anasts;
+};
+
+typedef struct ccsr_usb_phy {
+	u32	id;
+	struct  ccsr_usb_port_ctrl port1;
+	u8	res_50[0xc];
+	u32	tvr;
+	u32	pllprg[4];
+	u8	res_70[0x4];
+	u32	anaccfg;
+	u32	dbg;
+	u8	res_7c[0x4];
+	struct  ccsr_usb_port_ctrl port2;
+	u8	res_dc[0x334];
+} ccsr_usb_phy_t;
+
+#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0)
+#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1)
+#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21)
+#else
 typedef struct ccsr_usb_phy {
 	u8	res0[0x18];
 	u32	usb_enable_override;
 	u8	res[0xe4];
 } ccsr_usb_phy_t;
 #define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1
+#endif
 
 #ifdef CONFIG_SYS_FSL_RAID_ENGINE
 struct ccsr_raide {
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 8c91f0849b8..56b22d840ad 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -507,6 +507,15 @@
 #define   L2CSR0_L2IO		0x00100000	/* L2 Cache Instruction Only */
 #define   L2CSR0_L2DO		0x00010000	/* L2 Cache Data Only */
 #define   L2CSR0_L2REP		0x00003000	/* L2 Line Replacement Algo */
+
+/* e6500 */
+#define   L2CSR0_L2REP_SPLRUAGE	0x00000000	/* L2REP Streaming PLRU with Aging */
+#define   L2CSR0_L2REP_FIFO	0x00001000	/* L2REP FIFO */
+#define   L2CSR0_L2REP_SPLRU	0x00002000	/* L2REP Streaming PLRU */
+#define   L2CSR0_L2REP_PLRU	0x00003000	/* L2REP PLRU */
+
+#define   L2CSR0_L2REP_MODE	L2CSR0_L2REP_SPLRUAGE
+
 #define   L2CSR0_L2FL		0x00000800	/* L2 Cache Flush */
 #define   L2CSR0_L2LFC		0x00000400	/* L2 Cache Lock Flash Clear */
 #define   L2CSR0_L2LOA		0x00000080	/* L2 Cache Lock Overflow Allocate */
@@ -575,6 +584,16 @@
 #define SPRN_MSSSR0	0x3f7
 #endif
 
+#define SPRN_HDBCR0	0x3d0
+#define SPRN_HDBCR1	0x3d1
+#define SPRN_HDBCR2	0x3d2
+#define SPRN_HDBCR3	0x3d3
+#define SPRN_HDBCR4	0x3d4
+#define SPRN_HDBCR5	0x3d5
+#define SPRN_HDBCR6	0x3d6
+#define SPRN_HDBCR7	0x277
+#define SPRN_HDBCR8	0x278
+
 /* Short-hand versions for a number of the above SPRNs */
 
 #define CTR	SPRN_CTR	/* Counter Register */
@@ -1099,6 +1118,7 @@
 #define SVR_P5040	0x820400
 #define SVR_T4240	0x824000
 #define SVR_T4120	0x824001
+#define SVR_T4160	0x824100
 #define SVR_B4860	0X868000
 #define SVR_G4860	0x868001
 #define SVR_G4060	0x868003
@@ -1106,6 +1126,12 @@
 #define SVR_G4440	0x868101
 #define SVR_B4420	0x868102
 #define SVR_B4220	0x868103
+#define SVR_T1040	0x852000
+#define SVR_T1041	0x852001
+#define SVR_T1042	0x852002
+#define SVR_T1020	0x852100
+#define SVR_T1021	0x852101
+#define SVR_T1022	0x852102
 
 #define SVR_8610	0x80A000
 #define SVR_8641	0x809000
@@ -1174,6 +1200,8 @@ struct cpu_type {
 struct cpu_type *identify_cpu(u32 ver);
 int fixup_cpu(void);
 
+int fsl_qoriq_core_to_cluster(unsigned int core);
+
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 #define CPU_TYPE_ENTRY(n, v, nc) \
 	{ .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), \
diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h
index cf972d20ce9..93496a079d9 100644
--- a/arch/powerpc/include/asm/u-boot.h
+++ b/arch/powerpc/include/asm/u-boot.h
@@ -59,14 +59,6 @@ typedef struct bd_info {
 #if defined(CONFIG_MPC83xx)
 	unsigned long	bi_immrbar;
 #endif
-#if defined(CONFIG_MPC8220)
-	unsigned long	bi_mbar_base;	/* base of internal registers */
-	unsigned long   bi_inpfreq;     /* Input Freq, In MHz */
-	unsigned long   bi_pcifreq;     /* PCI Freq, in MHz */
-	unsigned long   bi_pevfreq;     /* PEV Freq, in MHz */
-	unsigned long   bi_flbfreq;     /* Flexbus Freq, in MHz */
-	unsigned long   bi_vcofreq;     /* VCO Freq, in MHz */
-#endif
 	unsigned long	bi_bootflags;	/* boot / reboot flag (Unused) */
 	unsigned long	bi_ip_addr;	/* IP Address */
 	unsigned char	bi_enetaddr[6];	/* OLD: see README.enetaddr */
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 41b22949ff9..fc4c1d58121 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -301,9 +301,6 @@ static init_fnc_t *init_sequence[] = {
 #if defined(CONFIG_MPC5xxx)
 	prt_mpc5xxx_clks,
 #endif /* CONFIG_MPC5xxx */
-#if defined(CONFIG_MPC8220)
-	prt_mpc8220_clks,
-#endif
 	checkboard,
 	INIT_FUNC_WATCHDOG_INIT
 #if defined(CONFIG_MISC_INIT_F)
@@ -548,27 +545,6 @@ void board_init_f(ulong bootflag)
 #if defined(CONFIG_MPC83xx)
 	bd->bi_immrbar = CONFIG_SYS_IMMR;
 #endif
-#if defined(CONFIG_MPC8220)
-	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
-	bd->bi_inpfreq = gd->arch.inp_clk;
-	bd->bi_pcifreq = gd->pci_clk;
-	bd->bi_vcofreq = gd->arch.vco_clk;
-	bd->bi_pevfreq = gd->arch.pev_clk;
-	bd->bi_flbfreq = gd->arch.flb_clk;
-
-	/* store bootparam to sram (backward compatible), here? */
-	{
-		u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
-
-		*sram++ = gd->ram_size;
-		*sram++ = gd->bus_clk;
-		*sram++ = gd->arch.inp_clk;
-		*sram++ = gd->cpu_clk;
-		*sram++ = gd->arch.vco_clk;
-		*sram++ = gd->arch.flb_clk;
-		*sram++ = 0xb8c3ba11;	/* boot signature */
-	}
-#endif
 
 	WATCHDOG_RESET();
 	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 0119a7b6ebf..dd6c98cdb48 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -220,101 +220,19 @@ static int boot_bd_t_linux(bootm_headers_t *images)
 	return ret;
 }
 
-/*
- * Verify the device tree.
- *
- * This function is called after all device tree fix-ups have been enacted,
- * so that the final device tree can be verified.  The definition of "verified"
- * is up to the specific implementation.  However, it generally means that the
- * addresses of some of the devices in the device tree are compared with the
- * actual addresses at which U-Boot has placed them.
- *
- * Returns 1 on success, 0 on failure.  If 0 is returned, U-boot will halt the
- * boot process.
- */
-static int __ft_verify_fdt(void *fdt)
-{
-	return 1;
-}
-__attribute__((weak, alias("__ft_verify_fdt"))) int ft_verify_fdt(void *fdt);
-
 static int boot_body_linux(bootm_headers_t *images)
 {
-	ulong rd_len;
-	struct lmb *lmb = &images->lmb;
-	ulong *initrd_start = &images->initrd_start;
-	ulong *initrd_end = &images->initrd_end;
-#if defined(CONFIG_OF_LIBFDT)
-	ulong of_size = images->ft_len;
-	char **of_flat_tree = &images->ft_addr;
-#endif
-
 	int ret;
 
-#if defined(CONFIG_OF_LIBFDT)
-	boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree);
-#endif
-
-	/* allocate space and init command line */
-	ret = boot_cmdline_linux(images);
-	if (ret)
-		return ret;
-
 	/* allocate space for kernel copy of board info */
 	ret = boot_bd_t_linux(images);
 	if (ret)
 		return ret;
 
-	rd_len = images->rd_end - images->rd_start;
-	ret = boot_ramdisk_high (lmb, images->rd_start, rd_len, initrd_start, initrd_end);
+	ret = image_setup_linux(images);
 	if (ret)
 		return ret;
 
-#if defined(CONFIG_OF_LIBFDT)
-	ret = boot_relocate_fdt(lmb, of_flat_tree, &of_size);
-	if (ret)
-		return ret;
-
-	/*
-	 * Add the chosen node if it doesn't exist, add the env and bd_t
-	 * if the user wants it (the logic is in the subroutines).
-	 */
-	if (of_size) {
-		if (fdt_chosen(*of_flat_tree, 1) < 0) {
-			puts ("ERROR: ");
-			puts ("/chosen node create failed");
-			puts (" - must RESET the board to recover.\n");
-			return -1;
-		}
-#ifdef CONFIG_OF_BOARD_SETUP
-		/* Call the board-specific fixup routine */
-		ft_board_setup(*of_flat_tree, gd->bd);
-#endif
-
-		/* Delete the old LMB reservation */
-		lmb_free(lmb, (phys_addr_t)(u32)*of_flat_tree,
-				(phys_size_t)fdt_totalsize(*of_flat_tree));
-
-		ret = fdt_resize(*of_flat_tree);
-		if (ret < 0)
-			return ret;
-		of_size = ret;
-
-		if (*initrd_start && *initrd_end) {
-			of_size += FDT_RAMDISK_OVERHEAD;
-			fdt_set_totalsize(*of_flat_tree, of_size);
-		}
-		/* Create a new LMB reservation */
-		lmb_reserve(lmb, (ulong)*of_flat_tree, of_size);
-
-		/* fixup the initrd now that we know where it should be */
-		if (*initrd_start && *initrd_end)
-			fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1);
-
-		if (!ft_verify_fdt(*of_flat_tree))
-			return -1;
-	}
-#endif	/* CONFIG_OF_LIBFDT */
 	return 0;
 }
 
@@ -368,13 +286,6 @@ static void set_clocks_in_mhz (bd_t *kbd)
 		/* convert all clock information to MHz */
 		kbd->bi_intfreq /= 1000000L;
 		kbd->bi_busfreq /= 1000000L;
-#if defined(CONFIG_MPC8220)
-		kbd->bi_inpfreq /= 1000000L;
-		kbd->bi_pcifreq /= 1000000L;
-		kbd->bi_pevfreq /= 1000000L;
-		kbd->bi_flbfreq /= 1000000L;
-		kbd->bi_vcofreq /= 1000000L;
-#endif
 #if defined(CONFIG_CPM2)
 		kbd->bi_cpmfreq /= 1000000L;
 		kbd->bi_brgfreq /= 1000000L;
diff --git a/arch/sparc/lib/bootm.c b/arch/sparc/lib/bootm.c
index bcc63584bfe..1a9343c1082 100644
--- a/arch/sparc/lib/bootm.c
+++ b/arch/sparc/lib/bootm.c
@@ -95,10 +95,8 @@ void arch_lmb_reserve(struct lmb *lmb)
 int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t * images)
 {
 	char *bootargs;
-	ulong initrd_start, initrd_end;
 	ulong rd_len;
 	void (*kernel) (struct linux_romvec *, void *);
-	struct lmb *lmb = &images->lmb;
 	int ret;
 
 	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
@@ -131,24 +129,23 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t * im
 	 * extracted and is writeable.
 	 */
 
+	ret = image_setup_linux(images);
+	if (ret) {
+		puts("### Failed to relocate RAM disk\n");
+		goto error;
+	}
+
 	/* Calc length of RAM disk, if zero no ramdisk available */
 	rd_len = images->rd_end - images->rd_start;
 
 	if (rd_len) {
-		ret = boot_ramdisk_high(lmb, images->rd_start, rd_len,
-					&initrd_start, &initrd_end);
-		if (ret) {
-			puts("### Failed to relocate RAM disk\n");
-			goto error;
-		}
-
 		/* Update SPARC kernel header so that Linux knows
 		 * what is going on and where to find RAM disk.
 		 *
 		 * Set INITRD Image address relative to RAM Start
 		 */
 		linux_hdr->hdr_input.ver_0203.sparc_ramdisk_image =
-		    initrd_start - CONFIG_SYS_RAM_BASE;
+			images->initrd_start - CONFIG_SYS_RAM_BASE;
 		linux_hdr->hdr_input.ver_0203.sparc_ramdisk_size = rd_len;
 		/* Clear READ ONLY flag if set to non-zero */
 		linux_hdr->hdr_input.ver_0203.root_flags = 1;
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 7b520f8dca1..cddf0dd2bcd 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -30,7 +30,7 @@ LIB	= $(obj)lib$(CPU).o
 
 START-y	= start.o
 START-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
-COBJS	= interrupts.o cpu.o timer.o
+COBJS	= interrupts.o cpu.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index f8e28f0c829..14cb6994cfa 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -26,6 +26,7 @@
 #include <asm/u-boot-x86.h>
 #include <flash.h>
 #include <netdev.h>
+#include <ns16550.h>
 #include <asm/msr.h>
 #include <asm/cache.h>
 #include <asm/io.h>
@@ -90,6 +91,9 @@ void show_boot_progress(int val)
 
 int last_stage_init(void)
 {
+	if (gd->flags & GD_FLG_COLD_BOOT)
+		timestamp_add_to_bootstage();
+
 	return 0;
 }
 
@@ -135,3 +139,12 @@ int board_final_cleanup(void)
 
 	return 0;
 }
+
+void panic_puts(const char *str)
+{
+	NS16550_t port = (NS16550_t)0x3f8;
+
+	NS16550_init(port, 1);
+	while (*str)
+		NS16550_putc(port, *str++);
+}
diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
index 2ca7a57bce5..bd3558a0214 100644
--- a/arch/x86/cpu/coreboot/timestamp.c
+++ b/arch/x86/cpu/coreboot/timestamp.c
@@ -39,7 +39,9 @@ static struct timestamp_table *ts_table  __attribute__((section(".data")));
 void timestamp_init(void)
 {
 	ts_table = lib_sysinfo.tstamp_table;
-	timer_set_tsc_base(ts_table->base_time);
+#ifdef CONFIG_SYS_X86_TSC_TIMER
+	timer_set_base(ts_table->base_time);
+#endif
 	timestamp_add_now(TS_U_BOOT_INITTED);
 }
 
@@ -59,3 +61,41 @@ void timestamp_add_now(enum timestamp_id id)
 {
 	timestamp_add(id, rdtsc());
 }
+
+int timestamp_add_to_bootstage(void)
+{
+	uint i;
+
+	if (!ts_table)
+		return -1;
+
+	for (i = 0; i < ts_table->num_entries; i++) {
+		struct timestamp_entry *tse = &ts_table->entries[i];
+		const char *name = NULL;
+
+		switch (tse->entry_id) {
+		case TS_START_ROMSTAGE:
+			name = "start-romstage";
+			break;
+		case TS_BEFORE_INITRAM:
+			name = "before-initram";
+			break;
+		case TS_DEVICE_INITIALIZE:
+			name = "device-initialize";
+			break;
+		case TS_DEVICE_DONE:
+			name = "device-done";
+			break;
+		case TS_SELFBOOT_JUMP:
+			name = "selfboot-jump";
+			break;
+		}
+		if (name) {
+			bootstage_add_record(0, name, BOOTSTAGEF_ALLOC,
+					     tse->entry_stamp /
+							get_tbclk_mhz());
+		}
+	}
+
+	return 0;
+}
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 1a2f85c1fe2..7a914a57515 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -120,6 +120,11 @@ void setup_gdt(gd_t *id, u64 *gdt_addr)
 
 int __weak x86_cleanup_before_linux(void)
 {
+#ifdef CONFIG_BOOTSTAGE_STASH
+	bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH,
+			CONFIG_BOOTSTAGE_STASH_SIZE);
+#endif
+
 	return 0;
 }
 
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index 6dc74e34c60..e733bcb3027 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -37,6 +37,8 @@
 #include <asm/msr.h>
 #include <asm/u-boot-x86.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define DECLARE_INTERRUPT(x) \
 	".globl irq_"#x"\n" \
 	".hidden irq_"#x"\n" \
diff --git a/arch/x86/cpu/timer.c b/arch/x86/cpu/timer.c
deleted file mode 100644
index 149109d4f45..00000000000
--- a/arch/x86/cpu/timer.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- */
-
-#include <common.h>
-
-unsigned long timer_get_us(void)
-{
-	printf("timer_get_us used but not implemented.\n");
-	return 0;
-}
diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds
index 2d6911aa419..b4ecd4bd4a5 100644
--- a/arch/x86/cpu/u-boot.lds
+++ b/arch/x86/cpu/u-boot.lds
@@ -79,18 +79,6 @@ SECTIONS
 	/DISCARD/ : { *(.interp*) }
 	/DISCARD/ : { *(.gnu*) }
 
-	/* 16bit realmode trampoline code */
-	.realmode REALMODE_BASE : AT ( LOADADDR(.rel.dyn) + SIZEOF(.rel.dyn) ) { KEEP(*(.realmode)) }
-
-	__realmode_start = LOADADDR(.realmode);
-	__realmode_size = SIZEOF(.realmode);
-
-	/* 16bit BIOS emulation code (just enough to boot Linux) */
-	.bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { KEEP(*(.bios)) }
-
-	__bios_start = LOADADDR(.bios);
-	__bios_size = SIZEOF(.bios);
-
 #ifdef CONFIG_X86_RESET_VECTOR
 
 	/*
diff --git a/arch/x86/include/asm/arch-coreboot/timestamp.h b/arch/x86/include/asm/arch-coreboot/timestamp.h
index d104912e066..fcfc1d54425 100644
--- a/arch/x86/include/asm/arch-coreboot/timestamp.h
+++ b/arch/x86/include/asm/arch-coreboot/timestamp.h
@@ -49,4 +49,11 @@ void timestamp_init(void);
 void timestamp_add(enum timestamp_id id, uint64_t ts_time);
 void timestamp_add_now(enum timestamp_id id);
 
+/**
+ * timestamp_add_to_bootstage - Add important coreboot timestamps to bootstage
+ *
+ * @return 0 if ok, -1 if no timestamps were found
+ */
+int timestamp_add_to_bootstage(void);
+
 #endif
diff --git a/arch/x86/include/asm/init_helpers.h b/arch/x86/include/asm/init_helpers.h
index d018b290c1b..0a6a6755d22 100644
--- a/arch/x86/include/asm/init_helpers.h
+++ b/arch/x86/include/asm/init_helpers.h
@@ -24,19 +24,10 @@
 #ifndef _INIT_HELPERS_H_
 #define _INIT_HELPERS_H_
 
-int display_banner(void);
-int display_dram_config(void);
-int init_baudrate_f(void);
 int calculate_relocation_address(void);
 
 int init_cache_f_r(void);
-
-int set_reloc_flag_r(void);
-int mem_malloc_init_r(void);
 int init_bd_struct_r(void);
-int flash_init_r(void);
-int status_led_set_r(void);
-int set_load_addr_r(void);
 int init_func_spi(void);
 int find_fdt(void);
 int prepare_fdt(void);
diff --git a/arch/x86/include/asm/init_wrappers.h b/arch/x86/include/asm/init_wrappers.h
deleted file mode 100644
index 899ffb15446..00000000000
--- a/arch/x86/include/asm/init_wrappers.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * (C) Copyright 2011
- * Graeme Russ, <graeme.russ@gmail.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _INIT_WRAPPERS_H_
-#define _INIT_WRAPPERS_H_
-
-int serial_initialize_r(void);
-int env_relocate_r(void);
-int pci_init_r(void);
-int jumptable_init_r(void);
-int pcmcia_init_r(void);
-int kgdb_init_r(void);
-int enable_interrupts_r(void);
-int eth_initialize_r(void);
-int reset_phy_r(void);
-int ide_init_r(void);
-int scsi_init_r(void);
-int doc_init_r(void);
-int bb_miiphy_init_r(void);
-int post_run_r(void);
-
-#endif	/* !_INIT_WRAPPERS_H_ */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 6d68ab6c926..9cc2034737d 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -30,8 +30,4 @@
 	const struct pci_device_id _table[]
 
 void pci_setup_type1(struct pci_controller *hose);
-int pci_enable_legacy_video_ports(struct pci_controller* hose);
-int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
-void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
-u32 pci_get_rom_window(struct pci_controller* hose, int size);
 #endif
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index ae0c3883e41..22e093427fd 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -33,11 +33,15 @@ void init_gd(gd_t *id, u64 *gdt_addr);
 void setup_gdt(gd_t *id, u64 *gdt_addr);
 int init_cache(void);
 int cleanup_before_linux(void);
+void panic_puts(const char *str);
 
 /* cpu/.../timer.c */
 void timer_isr(void *);
 typedef void (timer_fnc_t) (void);
 int register_timer_isr (timer_fnc_t *isr_func);
+unsigned long get_tbclk_mhz(void);
+void timer_set_base(uint64_t base);
+int pcat_timer_init(void);
 
 /* Architecture specific - can be in arch/x86/cpu/, arch/x86/lib/, or $(BOARD)/ */
 int dram_init_f(void);
diff --git a/arch/x86/include/asm/u-boot.h b/arch/x86/include/asm/u-boot.h
index df759faec40..006232bcf8d 100644
--- a/arch/x86/include/asm/u-boot.h
+++ b/arch/x86/include/asm/u-boot.h
@@ -36,40 +36,8 @@
 #ifndef _U_BOOT_H_
 #define _U_BOOT_H_	1
 
-#include <config.h>
-#include <compiler.h>
-
-#ifdef CONFIG_SYS_GENERIC_BOARD
 /* Use the generic board which requires a unified bd_info */
 #include <asm-generic/u-boot.h>
-#else
-
-#ifndef __ASSEMBLY__
-
-typedef struct bd_info {
-	unsigned long	bi_memstart;	/* start of DRAM memory */
-	phys_size_t	bi_memsize;	/* size	 of DRAM memory in bytes */
-	unsigned long	bi_flashstart;	/* start of FLASH memory */
-	unsigned long	bi_flashsize;	/* size	 of FLASH memory */
-	unsigned long	bi_flashoffset; /* reserved area for startup monitor */
-	unsigned long	bi_sramstart;	/* start of SRAM memory */
-	unsigned long	bi_sramsize;	/* size	 of SRAM memory */
-	unsigned long	bi_bootflags;	/* boot / reboot flag (for LynxOS) */
-	unsigned short	bi_ethspeed;	/* Ethernet speed in Mbps */
-	unsigned long	bi_intfreq;	/* Internal Freq, in MHz */
-	unsigned long	bi_busfreq;	/* Bus Freq, in MHz */
-	unsigned int	bi_baudrate;	/* Console Baudrate */
-	unsigned long   bi_boot_params;	/* where this board expects params */
-	struct				/* RAM configuration */
-	{
-		ulong start;
-		ulong size;
-	}bi_dram[CONFIG_NR_DRAM_BANKS];
-} bd_t;
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* !CONFIG_SYS_GENERIC_BOARD */
 
 /* For image.h:image_check_target_arch() */
 #define IH_ARCH_DEFAULT IH_ARCH_I386
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index ee893548086..f66ad30741e 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -25,24 +25,18 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(ARCH).o
 
-ifeq ($(CONFIG_SYS_GENERIC_BOARD),)
-COBJS-y	+= board.o
-endif
-
 COBJS-y	+= bootm.o
 COBJS-y	+= cmd_boot.o
 COBJS-y	+= gcc.o
 COBJS-y	+= init_helpers.o
-COBJS-y	+= init_wrappers.o
 COBJS-y	+= interrupts.o
 COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
-COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o
-COBJS-$(CONFIG_PCI) += pci.o
+COBJS-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o
 COBJS-$(CONFIG_PCI) += pci_type1.o
 COBJS-y	+= relocate.o
 COBJS-y += physmem.o
 COBJS-y	+= string.o
-COBJS-$(CONFIG_SYS_X86_ISR_TIMER)	+= timer.o
+COBJS-$(CONFIG_SYS_X86_TSC_TIMER)	+= tsc_timer.o
 COBJS-$(CONFIG_VIDEO_VGA)	+= video.o
 COBJS-$(CONFIG_CMD_ZBOOT)	+= zimage.o
 
diff --git a/arch/x86/lib/bios.h b/arch/x86/lib/bios.h
deleted file mode 100644
index 96509b066e7..00000000000
--- a/arch/x86/lib/bios.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _BIOS_H_
-#define _BIOS_H_
-
-#define OFFS_ES		0	/* 16bit */
-#define OFFS_GS		2	/* 16bit */
-#define OFFS_DS		4	/* 16bit */
-#define OFFS_EDI	6	/* 32bit */
-#define OFFS_DI		6	/* low 16 bits of EDI */
-#define OFFS_ESI	10	/* 32bit */
-#define OFFS_SI		10	/* low 16 bits of ESI */
-#define OFFS_EBP	14	/* 32bit */
-#define OFFS_BP		14	/* low 16 bits of EBP */
-#define OFFS_ESP	18	/* 32bit */
-#define OFFS_SP		18	/* low 16 bits of ESP */
-#define OFFS_EBX	22	/* 32bit */
-#define OFFS_BX		22	/* low 16 bits of EBX */
-#define OFFS_BL		22	/* low  8 bits of BX */
-#define OFFS_BH		23	/* high 8 bits of BX */
-#define OFFS_EDX	26	/* 32bit */
-#define OFFS_DX		26	/* low 16 bits of EBX */
-#define OFFS_DL		26	/* low  8 bits of BX */
-#define OFFS_DH		27	/* high 8 bits of BX */
-#define OFFS_ECX	30	/* 32bit */
-#define OFFS_CX		30	/* low 16 bits of EBX */
-#define OFFS_CL		30	/* low  8 bits of BX */
-#define OFFS_CH		31	/* high 8 bits of BX */
-#define OFFS_EAX	34	/* 32bit */
-#define OFFS_AX		34	/* low 16 bits of EBX */
-#define OFFS_AL		34	/* low  8 bits of BX */
-#define OFFS_AH		35	/* high 8 bits of BX */
-#define OFFS_VECTOR	38	/* 16bit */
-#define OFFS_IP		40	/* 16bit */
-#define OFFS_CS		42	/* 16bit */
-#define OFFS_FLAGS	44	/* 16bit */
-
-/* stack at 0x40:0x800 -> 0x800 */
-#define SEGMENT		0x40
-#define STACK		0x800
-
-/*
- * save general registers
- * save some segments
- * save callers stack segment
- * setup BIOS segments
- * setup BIOS stackpointer
- */
-#define MAKE_BIOS_STACK		\
-	pushal;			\
-	pushw	%ds;		\
-	pushw	%gs;		\
-	pushw	%es;		\
-	pushw	%ss;		\
-	popw	%gs;		\
-	movw	$SEGMENT, %ax;	\
-	movw	%ax, %ds;	\
-	movw	%ax, %es;	\
-	movw	%ax, %ss;	\
-	movw	%sp, %bp;	\
-	movw	$STACK, %sp
-
-/*
- * restore callers stack segment
- * restore some segments
- * restore general registers
- */
-#define RESTORE_CALLERS_STACK	\
-	pushw	%gs;		\
-	popw	%ss;		\
-	movw	%bp, %sp;	\
-	popw	%es;		\
-	popw	%gs;		\
-	popw	%ds;		\
-	popal
-
-#ifndef __ASSEMBLY__
-#define BIOS_DATA	((char *)0x400)
-#define BIOS_DATA_SIZE	256
-#define BIOS_BASE	((char *)0xf0000)
-#define BIOS_CS		0xf000
-
-extern ulong __bios_start;
-extern ulong __bios_size;
-
-/* these are defined in a 16bit segment and needs
- * to be accessed with the RELOC_16_xxxx() macros below
- */
-extern u16 ram_in_64kb_chunks;
-extern u16 bios_equipment;
-extern u8  pci_last_bus;
-
-extern void *rm_int00;
-extern void *rm_int01;
-extern void *rm_int02;
-extern void *rm_int03;
-extern void *rm_int04;
-extern void *rm_int05;
-extern void *rm_int06;
-extern void *rm_int07;
-extern void *rm_int08;
-extern void *rm_int09;
-extern void *rm_int0a;
-extern void *rm_int0b;
-extern void *rm_int0c;
-extern void *rm_int0d;
-extern void *rm_int0e;
-extern void *rm_int0f;
-extern void *rm_int10;
-extern void *rm_int11;
-extern void *rm_int12;
-extern void *rm_int13;
-extern void *rm_int14;
-extern void *rm_int15;
-extern void *rm_int16;
-extern void *rm_int17;
-extern void *rm_int18;
-extern void *rm_int19;
-extern void *rm_int1a;
-extern void *rm_int1b;
-extern void *rm_int1c;
-extern void *rm_int1d;
-extern void *rm_int1e;
-extern void *rm_int1f;
-extern void *rm_def_int;
-
-#define RELOC_16_LONG(seg, off) (*(u32 *)(seg << 4 | (u32)&off))
-#define RELOC_16_WORD(seg, off) (*(u16 *)(seg << 4 | (u32)&off))
-#define RELOC_16_BYTE(seg, off) (*(u8 *)(seg << 4 | (u32)&off))
-
-#ifdef PCI_BIOS_DEBUG
-extern u32 num_pci_bios_present;
-extern u32 num_pci_bios_find_device;
-extern u32 num_pci_bios_find_class;
-extern u32 num_pci_bios_generate_special_cycle;
-extern u32 num_pci_bios_read_cfg_byte;
-extern u32 num_pci_bios_read_cfg_word;
-extern u32 num_pci_bios_read_cfg_dword;
-extern u32 num_pci_bios_write_cfg_byte;
-extern u32 num_pci_bios_write_cfg_word;
-extern u32 num_pci_bios_write_cfg_dword;
-extern u32 num_pci_bios_get_irq_routing;
-extern u32 num_pci_bios_set_irq;
-extern u32 num_pci_bios_unknown_function;
-#endif
-
-#endif
-
-#endif
diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c
deleted file mode 100644
index 228c2c82261..00000000000
--- a/arch/x86/lib/board.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * (C) Copyright 2008-2011
- * Graeme Russ, <graeme.russ@gmail.com>
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <fdtdec.h>
-#include <watchdog.h>
-#include <stdio_dev.h>
-#include <asm/u-boot-x86.h>
-#include <asm/relocate.h>
-#include <asm/processor.h>
-#include <asm/sections.h>
-
-#include <asm/init_helpers.h>
-#include <asm/init_wrappers.h>
-
-/*
- * Breath some life into the board...
- *
- * Getting the board up and running is a three-stage process:
- *  1) Execute from Flash, SDRAM Uninitialised
- *     At this point, there is a limited amount of non-SDRAM memory
- *     (typically the CPU cache, but can also be SRAM or even a buffer of
- *     of some peripheral). This limited memory is used to hold:
- *      - The initial copy of the Global Data Structure
- *      - A temporary stack
- *      - A temporary x86 Global Descriptor Table
- *      - The pre-console buffer (if enabled)
- *
- *     The following is performed during this phase of execution:
- *      - Core low-level CPU initialisation
- *      - Console initialisation
- *      - SDRAM initialisation
- *
- *  2) Execute from Flash, SDRAM Initialised
- *     At this point we copy Global Data from the initial non-SDRAM
- *     memory and set up the permanent stack in SDRAM. The CPU cache is no
- *     longer being used as temporary memory, so we can now fully enable
- *     it.
- *
- *     The following is performed during this phase of execution:
- *      - Create final stack in SDRAM
- *      - Copy Global Data from temporary memory to SDRAM
- *      - Enabling of CPU cache(s),
- *      - Copying of U-Boot code and data from Flash to RAM
- *      - Clearing of the BSS
- *      - ELF relocation adjustments
- *
- *  3) Execute from SDRAM
- *     The following is performed during this phase of execution:
- *      - All remaining initialisation
- */
-
-/*
- * The requirements for any new initalization function is simple: it is
- * a function with no parameters which returns an integer return code,
- * where 0 means "continue" and != 0 means "fatal error, hang the system"
- */
-typedef int (init_fnc_t) (void);
-
-/*
- * init_sequence_f is the list of init functions which are run when U-Boot
- * is executing from Flash with a limited 'C' environment. The following
- * limitations must be considered when implementing an '_f' function:
- *  - 'static' variables are read-only
- *  - Global Data (gd->xxx) is read/write
- *  - Stack space is limited
- *
- * The '_f' sequence must, as a minimum, initialise SDRAM. It _should_
- * also initialise the console (to provide early debug output)
- */
-init_fnc_t *init_sequence_f[] = {
-	cpu_init_f,
-	board_early_init_f,
-#ifdef CONFIG_OF_CONTROL
-	find_fdt,
-	fdtdec_check_fdt,
-#endif
-	env_init,
-	init_baudrate_f,
-	serial_init,
-	console_init_f,
-#ifdef CONFIG_OF_CONTROL
-	prepare_fdt,
-#endif
-	dram_init_f,
-	calculate_relocation_address,
-
-	NULL,
-};
-
-/*
- * init_sequence_f_r is the list of init functions which are run when
- * U-Boot is executing from Flash with a semi-limited 'C' environment.
- * The following limitations must be considered when implementing an
- * '_f_r' function:
- *  - 'static' variables are read-only
- *  - Global Data (gd->xxx) is read/write
- *
- * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
- * supported).  It _should_, if possible, copy global data to RAM and
- * initialise the CPU caches (to speed up the relocation process)
- */
-init_fnc_t *init_sequence_f_r[] = {
-	init_cache_f_r,
-	copy_uboot_to_ram,
-	copy_fdt_to_ram,
-	clear_bss,
-	do_elf_reloc_fixups,
-
-	NULL,
-};
-
-/*
- * init_sequence_r is the list of init functions which are run when U-Boot
- * is executing from RAM with a full 'C' environment. There are no longer
- * any limitations which must be considered when implementing an '_r'
- * function, (i.e.'static' variables are read/write)
- *
- * If not already done, the '_r' sequence must copy global data to RAM and
- * (should) initialise the CPU caches.
- */
-init_fnc_t *init_sequence_r[] = {
-	set_reloc_flag_r,
-	init_bd_struct_r,
-	mem_malloc_init_r,
-	cpu_init_r,
-	board_early_init_r,
-	dram_init,
-	interrupt_init,
-	timer_init,
-	display_banner,
-	display_dram_config,
-	serial_initialize_r,
-#ifndef CONFIG_SYS_NO_FLASH
-	flash_init_r,
-#endif
-#ifdef CONFIG_PCI
-	pci_init_r,
-#endif
-#ifdef CONFIG_SPI
-	init_func_spi,
-#endif
-	env_relocate_r,
-	stdio_init,
-	jumptable_init_r,
-	console_init_r,
-#ifdef CONFIG_MISC_INIT_R
-	misc_init_r,
-#endif
-#if defined(CONFIG_CMD_KGDB)
-	kgdb_init_r,
-#endif
-	enable_interrupts_r,
-#ifdef CONFIG_STATUS_LED
-	status_led_set_r,
-#endif
-	set_load_addr_r,
-#if defined(CONFIG_CMD_IDE)
-	ide_init_r,
-#endif
-#if defined(CONFIG_CMD_SCSI)
-	scsi_init_r,
-#endif
-#if defined(CONFIG_CMD_DOC)
-	doc_init_r,
-#endif
-#ifdef CONFIG_BITBANGMII
-	bb_miiphy_init_r,
-#endif
-#if defined(CONFIG_CMD_NET)
-	eth_initialize_r,
-#ifdef CONFIG_RESET_PHY_R
-	reset_phy_r,
-#endif
-#endif
-#ifdef CONFIG_LAST_STAGE_INIT
-	last_stage_init,
-#endif
-	NULL,
-};
-
-static void do_init_loop(init_fnc_t **init_fnc_ptr)
-{
-	for (; *init_fnc_ptr; ++init_fnc_ptr) {
-		WATCHDOG_RESET();
-		if ((*init_fnc_ptr)() != 0)
-			hang();
-	}
-}
-
-void board_init_f(ulong boot_flags)
-{
-	gd->fdt_blob = gd->new_fdt = NULL;
-	gd->flags = boot_flags;
-
-	do_init_loop(init_sequence_f);
-
-	/*
-	 * SDRAM and console are now initialised. The final stack can now
-	 * be setup in SDRAM. Code execution will continue in Flash, but
-	 * with the stack in SDRAM and Global Data in temporary memory
-	 * (CPU cache)
-	 */
-	board_init_f_r_trampoline(gd->start_addr_sp);
-
-	/* NOTREACHED - board_init_f_r_trampoline() does not return */
-	while (1)
-		;
-}
-
-void board_init_f_r(void)
-{
-	do_init_loop(init_sequence_f_r);
-
-	/*
-	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
-	 * Transfer execution from Flash to RAM by calculating the address
-	 * of the in-RAM copy of board_init_r() and calling it
-	 */
-	(board_init_r + gd->reloc_off)(gd, gd->relocaddr);
-
-	/* NOTREACHED - board_init_r() does not return */
-	while (1)
-		;
-}
-
-void board_init_r(gd_t *id, ulong dest_addr)
-{
-	do_init_loop(init_sequence_r);
-
-	/* main_loop() can return to retry autoboot, if so just run it again. */
-	for (;;)
-		main_loop();
-
-	/* NOTREACHED - no way out of command loop except booting */
-}
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 83caf6bdbd7..2520228b4ca 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -93,14 +93,6 @@ int do_bootm_linux(int flag, int argc, char * const argv[],
 		goto error;
 	}
 
-#ifdef DEBUG
-	printf("## Transferring control to Linux (at address %08x) ...\n",
-		(u32)base_ptr);
-#endif
-
-	/* we assume that the kernel is in place */
-	printf("\nStarting kernel ...\n\n");
-
 	boot_zimage(base_ptr, load_address);
 	/* does not return */
 
diff --git a/arch/x86/lib/cmd_boot.c b/arch/x86/lib/cmd_boot.c
index a81a9a38a62..315be5a60df 100644
--- a/arch/x86/lib/cmd_boot.c
+++ b/arch/x86/lib/cmd_boot.c
@@ -36,6 +36,8 @@
 #include <malloc.h>
 #include <asm/u-boot-x86.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 unsigned long do_go_exec(ulong (*entry)(int, char * const []),
 			 int argc, char * const argv[])
 {
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index af9dbc146a3..a57a0eb4682 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -21,60 +21,12 @@
  * MA 02111-1307 USA
  */
 #include <common.h>
-#include <command.h>
 #include <fdtdec.h>
-#include <stdio_dev.h>
-#include <version.h>
-#include <malloc.h>
-#include <net.h>
-#include <ide.h>
-#include <serial.h>
 #include <spi.h>
-#include <status_led.h>
-#include <asm/processor.h>
 #include <asm/sections.h>
-#include <asm/u-boot-x86.h>
-#include <linux/compiler.h>
-
-#include <asm/init_helpers.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/************************************************************************
- * Init Utilities							*
- ************************************************************************
- * Some of this code should be moved into the core functions,
- * or dropped completely,
- * but let's get it working (again) first...
- */
-
-int display_banner(void)
-{
-	printf("\n\n%s\n\n", version_string);
-
-	return 0;
-}
-
-int display_dram_config(void)
-{
-	int i;
-
-	puts("DRAM Configuration:\n");
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		printf("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
-		print_size(gd->bd->bi_dram[i].size, "\n");
-	}
-
-	return 0;
-}
-
-int init_baudrate_f(void)
-{
-	gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
-	return 0;
-}
-
 /* Get the top of usable RAM */
 __weak ulong board_get_usable_ram_top(ulong total_size)
 {
@@ -134,21 +86,6 @@ int init_cache_f_r(void)
 	return init_cache();
 }
 
-int set_reloc_flag_r(void)
-{
-	gd->flags = GD_FLG_RELOC;
-
-	return 0;
-}
-
-int mem_malloc_init_r(void)
-{
-	mem_malloc_init(((gd->relocaddr - CONFIG_SYS_MALLOC_LEN)+3)&~3,
-			CONFIG_SYS_MALLOC_LEN);
-
-	return 0;
-}
-
 bd_t bd_data;
 
 int init_bd_struct_r(void)
@@ -159,39 +96,6 @@ int init_bd_struct_r(void)
 	return 0;
 }
 
-#ifndef CONFIG_SYS_NO_FLASH
-int flash_init_r(void)
-{
-	ulong size;
-
-	puts("Flash: ");
-
-	/* configure available FLASH banks */
-	size = flash_init();
-
-	print_size(size, "\n");
-
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_STATUS_LED
-int status_led_set_r(void)
-{
-	status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
-
-	return 0;
-}
-#endif
-
-int set_load_addr_r(void)
-{
-	/* Initialize from environment */
-	load_addr = getenv_ulong("loadaddr", 16, load_addr);
-
-	return 0;
-}
-
 int init_func_spi(void)
 {
 	puts("SPI:   ");
@@ -200,7 +104,6 @@ int init_func_spi(void)
 	return 0;
 }
 
-#ifdef CONFIG_OF_CONTROL
 int find_fdt(void)
 {
 #ifdef CONFIG_OF_EMBED
@@ -227,4 +130,3 @@ int prepare_fdt(void)
 
 	return 0;
 }
-#endif
diff --git a/arch/x86/lib/init_wrappers.c b/arch/x86/lib/init_wrappers.c
deleted file mode 100644
index 19af875c0e0..00000000000
--- a/arch/x86/lib/init_wrappers.c
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * (C) Copyright 2011
- * Graeme Russ, <graeme.russ@gmail.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <environment.h>
-#include <fdtdec.h>
-#include <serial.h>
-#include <kgdb.h>
-#include <scsi.h>
-#include <post.h>
-#include <miiphy.h>
-
-#include <asm/init_wrappers.h>
-
-int serial_initialize_r(void)
-{
-	serial_initialize();
-
-	return 0;
-}
-
-/*
- * Tell if it's OK to load the environment early in boot.
- *
- * If CONFIG_OF_CONFIG is defined, we'll check with the FDT to see
- * if this is OK (defaulting to saying it's not OK).
- *
- * NOTE: Loading the environment early can be a bad idea if security is
- *       important, since no verification is done on the environment.
- *
- * @return 0 if environment should not be loaded, !=0 if it is ok to load
- */
-static int should_load_env(void)
-{
-#ifdef CONFIG_OF_CONTROL
-	return fdtdec_get_config_int(gd->fdt_blob, "load-environment", 0);
-#elif defined CONFIG_DELAY_ENVIRONMENT
-	return 0;
-#else
-	return 1;
-#endif
-}
-
-int env_relocate_r(void)
-{
-	/* initialize environment */
-	if (should_load_env())
-		env_relocate();
-	else
-		set_default_env(NULL);
-
-	return 0;
-}
-
-
-int pci_init_r(void)
-{
-	/* Do pci configuration */
-	pci_init();
-
-	return 0;
-}
-
-int jumptable_init_r(void)
-{
-	jumptable_init();
-
-	return 0;
-}
-
-int pcmcia_init_r(void)
-{
-	puts("PCMCIA:");
-	pcmcia_init();
-
-	return 0;
-}
-
-int kgdb_init_r(void)
-{
-	puts("KGDB:  ");
-	kgdb_init();
-
-	return 0;
-}
-
-int enable_interrupts_r(void)
-{
-	/* enable exceptions */
-	enable_interrupts();
-
-	return 0;
-}
-
-int eth_initialize_r(void)
-{
-	puts("Net:   ");
-	eth_initialize(gd->bd);
-
-	return 0;
-}
-
-int reset_phy_r(void)
-{
-#ifdef DEBUG
-	puts("Reset Ethernet PHY\n");
-#endif
-	reset_phy();
-
-	return 0;
-}
-
-int ide_init_r(void)
-{
-	puts("IDE:   ");
-	ide_init();
-
-	return 0;
-}
-
-int scsi_init_r(void)
-{
-	puts("SCSI:  ");
-	scsi_init();
-
-	return 0;
-}
-
-#ifdef CONFIG_BITBANGMII
-int bb_miiphy_init_r(void)
-{
-	bb_miiphy_init();
-
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_POST
-int post_run_r(void)
-{
-	post_run(NULL, POST_RAM | post_bootmode_get(0));
-
-	return 0;
-}
-#endif
diff --git a/arch/x86/lib/pcat_timer.c b/arch/x86/lib/pcat_timer.c
index b0b6637f3a9..1ca3eb9e918 100644
--- a/arch/x86/lib/pcat_timer.c
+++ b/arch/x86/lib/pcat_timer.c
@@ -24,83 +24,20 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/i8254.h>
-#include <asm/ibmpc.h>
-#include <asm/interrupt.h>
 
-#define TIMER0_VALUE 0x04aa /* 1kHz 1.9318MHz / 1000 */
 #define TIMER2_VALUE 0x0a8e /* 440Hz */
 
-static int timer_init_done;
-
-int timer_init(void)
+int pcat_timer_init(void)
 {
-	/* initialize timer 0 and 2
-	 *
-	 * Timer 0 is used to increment system_tick 1000 times/sec
-	 * Timer 1 was used for DRAM refresh in early PC's
-	 * Timer 2 is used to drive the speaker
+	/*
+	 * initialize 2, used to drive the speaker
 	 * (to start a beep: write 3 to port 0x61,
 	 * to stop it again: write 0)
 	 */
-	outb(PIT_CMD_CTR0 | PIT_CMD_BOTH | PIT_CMD_MODE2,
-			PIT_BASE + PIT_COMMAND);
-	outb(TIMER0_VALUE & 0xff, PIT_BASE + PIT_T0);
-	outb(TIMER0_VALUE >> 8, PIT_BASE + PIT_T0);
-
 	outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3,
 			PIT_BASE + PIT_COMMAND);
 	outb(TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2);
 	outb(TIMER2_VALUE >> 8, PIT_BASE + PIT_T2);
 
-	irq_install_handler(0, timer_isr, NULL);
-	unmask_irq(0);
-
-	timer_init_done = 1;
-
 	return 0;
 }
-
-static u16 read_pit(void)
-{
-	u8 low;
-
-	outb(PIT_CMD_LATCH, PIT_BASE + PIT_COMMAND);
-	low = inb(PIT_BASE + PIT_T0);
-
-	return (inb(PIT_BASE + PIT_T0) << 8) | low;
-}
-
-/* this is not very exact */
-void __udelay(unsigned long usec)
-{
-	int counter;
-	int wraps;
-
-	if (timer_init_done) {
-		counter = read_pit();
-		wraps = usec / 1000;
-		usec = usec % 1000;
-
-		usec *= 1194;
-		usec /= 1000;
-		usec += counter;
-
-		while (usec > 1194) {
-			usec -= 1194;
-			wraps++;
-		}
-
-		while (1) {
-			int new_count = read_pit();
-
-			if (((new_count < usec) && !wraps) || wraps < 0)
-				break;
-
-			if (new_count > counter)
-				wraps--;
-
-			counter = new_count;
-		}
-	}
-
-}
diff --git a/arch/x86/lib/pci.c b/arch/x86/lib/pci.c
deleted file mode 100644
index 71878dd7dcb..00000000000
--- a/arch/x86/lib/pci.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-
-#undef PCI_ROM_SCAN_VERBOSE
-
-int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
-{
-	struct pci_controller *hose;
-	int res = -1;
-	int i;
-
-	u32 rom_addr;
-	u32 addr_reg;
-	u32 size;
-
-	u16 vendor;
-	u16 device;
-	u32 class_code;
-
-	u32 pci_data;
-
-	hose = pci_bus_to_hose(PCI_BUS(dev));
-
-	debug("pci_shadow_rom() asked to shadow device %x to %x\n",
-	       dev, (u32)dest);
-
-	pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
-	pci_read_config_word(dev, PCI_DEVICE_ID, &device);
-	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
-
-	class_code &= 0xffffff00;
-	class_code >>= 8;
-
-	debug("PCI Header Vendor %04x device %04x class %06x\n",
-	       vendor, device, class_code);
-
-	/* Enable the rom addess decoder */
-	pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
-	pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
-
-	if (!addr_reg) {
-		/* register unimplemented */
-		printf("pci_chadow_rom: device do not seem to have a rom\n");
-		return -1;
-	}
-
-	size = (~(addr_reg&PCI_ROM_ADDRESS_MASK)) + 1;
-
-	debug("ROM is %d bytes\n", size);
-
-	rom_addr = pci_get_rom_window(hose, size);
-
-	debug("ROM mapped at %x\n", rom_addr);
-
-	pci_write_config_dword(dev, PCI_ROM_ADDRESS,
-			       pci_phys_to_mem(dev, rom_addr)
-			       |PCI_ROM_ADDRESS_ENABLE);
-
-
-	for (i = rom_addr; i < rom_addr + size; i += 512) {
-		if (readw(i) == 0xaa55) {
-#ifdef PCI_ROM_SCAN_VERBOSE
-			printf("ROM signature found\n");
-#endif
-			pci_data = readw(0x18 + i);
-			pci_data += i;
-
-			if (0 == memcmp((void *)pci_data, "PCIR", 4)) {
-#ifdef PCI_ROM_SCAN_VERBOSE
-				printf("Fount PCI rom image at offset %d\n",
-				       i - rom_addr);
-				printf("Vendor %04x device %04x class %06x\n",
-				       readw(pci_data + 4), readw(pci_data + 6),
-				       readl(pci_data + 0x0d) & 0xffffff);
-				printf("%s\n",
-				       (readw(pci_data + 0x15) & 0x80) ?
-				       "Last image" : "More images follow");
-				switch	(readb(pci_data + 0x14)) {
-				case 0:
-					printf("X86 code\n");
-					break;
-				case 1:
-					printf("Openfirmware code\n");
-					break;
-				case 2:
-					printf("PARISC code\n");
-					break;
-				}
-				printf("Image size %d\n",
-				       readw(pci_data + 0x10) * 512);
-#endif
-				/*
-				 * FixMe: I think we should compare the class
-				 * code bytes as well but I have no reference
-				 * on the exact order of these bytes in the PCI
-				 * ROM header
-				 */
-				if (readw(pci_data + 4) == vendor &&
-				    readw(pci_data + 6) == device &&
-				    readb(pci_data + 0x14) == 0) {
-#ifdef PCI_ROM_SCAN_VERBOSE
-					printf("Suitable ROM image found\n");
-#endif
-					memmove(dest, (void *)rom_addr,
-						readw(pci_data + 0x10) * 512);
-					res = 0;
-					break;
-
-				}
-
-				if (readw(pci_data + 0x15) & 0x80)
-					break;
-			}
-		}
-
-	}
-
-#ifdef PCI_ROM_SCAN_VERBOSE
-	if (res)
-		printf("No suitable image found\n");
-#endif
-	/* disable PAR register and PCI device ROM address devocer */
-	pci_remove_rom_window(hose, rom_addr);
-
-	pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
-
-	return res;
-}
-
-#ifdef PCI_BIOS_DEBUG
-
-void print_bios_bios_stat(void)
-{
-	printf("16 bit functions:\n");
-	printf("pci_bios_present:                %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_present));
-	printf("pci_bios_find_device:            %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_find_device));
-	printf("pci_bios_find_class:             %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_find_class));
-	printf("pci_bios_generate_special_cycle: %d\n",
-			RELOC_16_LONG(0xf000,
-				      num_pci_bios_generate_special_cycle));
-	printf("pci_bios_read_cfg_byte:          %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_byte));
-	printf("pci_bios_read_cfg_word:          %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_word));
-	printf("pci_bios_read_cfg_dword:         %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_dword));
-	printf("pci_bios_write_cfg_byte:         %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_byte));
-	printf("pci_bios_write_cfg_word:         %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_word));
-	printf("pci_bios_write_cfg_dword:        %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_dword));
-	printf("pci_bios_get_irq_routing:        %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_get_irq_routing));
-	printf("pci_bios_set_irq:                %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_set_irq));
-	printf("pci_bios_unknown_function:       %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_unknown_function));
-}
-#endif
diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c
index 18f0e62acd0..59b3fe977d8 100644
--- a/arch/x86/lib/physmem.c
+++ b/arch/x86/lib/physmem.c
@@ -12,6 +12,8 @@
 #include <physmem.h>
 #include <linux/compiler.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* Large pages are 2MB. */
 #define LARGE_PAGE_SIZE ((1 << 20) * 2)
 
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index f178db9c81c..21982db7a94 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -39,6 +39,8 @@
 #include <asm/sections.h>
 #include <elf.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int copy_uboot_to_ram(void)
 {
 	size_t len = (size_t)&__data_end - (size_t)&__text_start;
diff --git a/arch/x86/lib/timer.c b/arch/x86/lib/timer.c
deleted file mode 100644
index 1f8ce609e2e..00000000000
--- a/arch/x86/lib/timer.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * (C) Copyright 2008,2009
- * Graeme Russ, <graeme.russ@gmail.com>
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <asm/i8254.h>
-#include <asm/ibmpc.h>
-
-struct timer_isr_function {
-	struct timer_isr_function *next;
-	timer_fnc_t *isr_func;
-};
-
-static struct timer_isr_function *first_timer_isr;
-static unsigned long system_ticks;
-
-/*
- * register_timer_isr() allows multiple architecture and board specific
- * functions to be called every millisecond. Keep the execution time of
- * each function as low as possible
- */
-int register_timer_isr(timer_fnc_t *isr_func)
-{
-	struct timer_isr_function *new_func;
-	struct timer_isr_function *temp;
-	int flag;
-
-	new_func = malloc(sizeof(struct timer_isr_function));
-
-	if (new_func == NULL)
-		return 1;
-
-	new_func->isr_func = isr_func;
-	new_func->next = NULL;
-
-	/*
-	 *  Don't allow timer interrupts while the
-	 *  linked list is being modified
-	 */
-	flag = disable_interrupts();
-
-	if (first_timer_isr == NULL) {
-		first_timer_isr = new_func;
-	} else {
-		temp = first_timer_isr;
-		while (temp->next != NULL)
-			temp = temp->next;
-		temp->next = new_func;
-	}
-
-	if (flag)
-		enable_interrupts();
-
-	return 0;
-}
-
-/*
- * timer_isr() MUST be the registered interrupt handler for
- */
-void timer_isr(void *unused)
-{
-	struct timer_isr_function *temp = first_timer_isr;
-
-	system_ticks++;
-
-	/* Execute each registered function */
-	while (temp != NULL) {
-		temp->isr_func();
-		temp = temp->next;
-	}
-}
-
-ulong get_timer(ulong base)
-{
-	return system_ticks - base;
-}
-
-void timer_set_tsc_base(uint64_t new_base)
-{
-	gd->arch.tsc_base = new_base;
-}
-
-uint64_t timer_get_tsc(void)
-{
-	uint64_t time_now;
-
-	time_now = rdtsc();
-	if (!gd->arch.tsc_base)
-		gd->arch.tsc_base = time_now;
-
-	return time_now - gd->arch.tsc_base;
-}
diff --git a/arch/x86/lib/tsc_timer.c b/arch/x86/lib/tsc_timer.c
new file mode 100644
index 00000000000..c509801f9e8
--- /dev/null
+++ b/arch/x86/lib/tsc_timer.c
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <asm/i8254.h>
+#include <asm/ibmpc.h>
+#include <asm/msr.h>
+#include <asm/u-boot-x86.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void timer_set_base(u64 base)
+{
+	gd->arch.tsc_base = base;
+}
+
+/*
+ * Get the number of CPU time counter ticks since it was read first time after
+ * restart. This yields a free running counter guaranteed to take almost 6
+ * years to wrap around even at 100GHz clock rate.
+ */
+u64 get_ticks(void)
+{
+	u64 now_tick = rdtsc();
+
+	/* We assume that 0 means the base hasn't been set yet */
+	if (!gd->arch.tsc_base)
+		panic("No tick base available");
+	return now_tick - gd->arch.tsc_base;
+}
+
+#define PLATFORM_INFO_MSR 0xce
+
+/* Get the speed of the TSC timer in MHz */
+unsigned long get_tbclk_mhz(void)
+{
+	u32 ratio;
+	u64 platform_info = native_read_msr(PLATFORM_INFO_MSR);
+
+	/* 100MHz times Max Non Turbo ratio */
+	ratio = (platform_info >> 8) & 0xff;
+	return 100 * ratio;
+}
+
+unsigned long get_tbclk(void)
+{
+	return get_tbclk_mhz() * 1000 * 1000;
+}
+
+static ulong get_ms_timer(void)
+{
+	return (get_ticks() * 1000) / get_tbclk();
+}
+
+ulong get_timer(ulong base)
+{
+	return get_ms_timer() - base;
+}
+
+ulong timer_get_us(void)
+{
+	return get_ticks() / get_tbclk_mhz();
+}
+
+ulong timer_get_boot_us(void)
+{
+	return timer_get_us();
+}
+
+void __udelay(unsigned long usec)
+{
+	u64 now = get_ticks();
+	u64 stop;
+
+	stop = now + usec * get_tbclk_mhz();
+
+	while ((int64_t)(stop - get_ticks()) > 0)
+		;
+}
+
+int timer_init(void)
+{
+#ifdef CONFIG_SYS_PCAT_TIMER
+	/* Set up the PCAT timer if required */
+	pcat_timer_init();
+#endif
+
+	return 0;
+}
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 4e9e1f77e5a..b54cf1261f7 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -283,6 +283,13 @@ __weak void board_final_cleanup(void)
 
 void boot_zimage(void *setup_base, void *load_address)
 {
+	debug("## Transferring control to Linux (at address %08x) ...\n",
+	      (u32)setup_base);
+
+	bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
+#ifdef CONFIG_BOOTSTAGE_REPORT
+	bootstage_report();
+#endif
 	board_final_cleanup();
 
 	printf("\nStarting kernel ...\n\n");
@@ -363,10 +370,6 @@ int do_zboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		return -1;
 	}
 
-	printf("## Transferring control to Linux "
-	       "(at address %08x) ...\n",
-	       (u32)base_ptr);
-
 	/* we assume that the kernel is in place */
 	boot_zimage(base_ptr, load_address);
 	/* does not return */
diff --git a/board/LaCie/net2big_v2/kwbimage.cfg b/board/LaCie/net2big_v2/kwbimage.cfg
index 8d9f15328db..d3904d39a1c 100644
--- a/board/LaCie/net2big_v2/kwbimage.cfg
+++ b/board/LaCie/net2big_v2/kwbimage.cfg
@@ -19,7 +19,7 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 # GNU General Public License for more details.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/LaCie/netspace_v2/kwbimage-is2.cfg b/board/LaCie/netspace_v2/kwbimage-is2.cfg
index 590720af8c7..93b803c67ff 100644
--- a/board/LaCie/netspace_v2/kwbimage-is2.cfg
+++ b/board/LaCie/netspace_v2/kwbimage-is2.cfg
@@ -19,7 +19,7 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 # GNU General Public License for more details.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/LaCie/netspace_v2/kwbimage-ns2l.cfg b/board/LaCie/netspace_v2/kwbimage-ns2l.cfg
index d008eb0ab0b..0a8a514a11f 100644
--- a/board/LaCie/netspace_v2/kwbimage-ns2l.cfg
+++ b/board/LaCie/netspace_v2/kwbimage-ns2l.cfg
@@ -19,7 +19,7 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 # GNU General Public License for more details.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/LaCie/netspace_v2/kwbimage.cfg b/board/LaCie/netspace_v2/kwbimage.cfg
index 7e53649121f..0cf4682fd53 100644
--- a/board/LaCie/netspace_v2/kwbimage.cfg
+++ b/board/LaCie/netspace_v2/kwbimage.cfg
@@ -19,7 +19,7 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 # GNU General Public License for more details.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/LaCie/wireless_space/kwbimage.cfg b/board/LaCie/wireless_space/kwbimage.cfg
index 0daf5b53936..aeddc0c8f31 100644
--- a/board/LaCie/wireless_space/kwbimage.cfg
+++ b/board/LaCie/wireless_space/kwbimage.cfg
@@ -22,7 +22,7 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 # GNU General Public License for more details.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/Marvell/dreamplug/kwbimage.cfg b/board/Marvell/dreamplug/kwbimage.cfg
index ca9cd744f3b..e662b2df365 100644
--- a/board/Marvell/dreamplug/kwbimage.cfg
+++ b/board/Marvell/dreamplug/kwbimage.cfg
@@ -24,7 +24,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/Marvell/guruplug/kwbimage.cfg b/board/Marvell/guruplug/kwbimage.cfg
index 2afd927463d..9baf6bc78e7 100644
--- a/board/Marvell/guruplug/kwbimage.cfg
+++ b/board/Marvell/guruplug/kwbimage.cfg
@@ -21,7 +21,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/Marvell/mv88f6281gtw_ge/kwbimage.cfg b/board/Marvell/mv88f6281gtw_ge/kwbimage.cfg
index ec2513f21f6..f74d4434ef1 100644
--- a/board/Marvell/mv88f6281gtw_ge/kwbimage.cfg
+++ b/board/Marvell/mv88f6281gtw_ge/kwbimage.cfg
@@ -21,7 +21,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/Marvell/openrd/kwbimage.cfg b/board/Marvell/openrd/kwbimage.cfg
index 757eb2816f9..19d0bacc215 100644
--- a/board/Marvell/openrd/kwbimage.cfg
+++ b/board/Marvell/openrd/kwbimage.cfg
@@ -21,7 +21,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/Marvell/rd6281a/kwbimage.cfg b/board/Marvell/rd6281a/kwbimage.cfg
index 0d12dd9140f..c8b5d74dc5b 100644
--- a/board/Marvell/rd6281a/kwbimage.cfg
+++ b/board/Marvell/rd6281a/kwbimage.cfg
@@ -21,7 +21,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/Seagate/dockstar/kwbimage.cfg b/board/Seagate/dockstar/kwbimage.cfg
index 98b514ddfd6..4b0351dbe45 100644
--- a/board/Seagate/dockstar/kwbimage.cfg
+++ b/board/Seagate/dockstar/kwbimage.cfg
@@ -24,7 +24,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/alaska/Makefile b/board/alaska/Makefile
deleted file mode 100644
index a21f8516a77..00000000000
--- a/board/alaska/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	:= $(BOARD).o flash.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/alaska/README b/board/alaska/README
deleted file mode 100644
index 334507397d5..00000000000
--- a/board/alaska/README
+++ /dev/null
@@ -1,482 +0,0 @@
-Freescale Alaska MPC8220 board
-==============================
-
-TsiChung Liew(Tsi-Chung.Liew@freescale.com)
-Created 9/21/04
-===========================================
-
-
-Changed files:
-==============
-
-- Makefile		    added MPC8220 and Alaska8220_config
-- MAKEALL		    added MPC8220 and Alaska8220
-- README		    added CONFIG_MPC8220, Alaska8220_config
-
-- common/cmd_bdinfo.c	    added board information members for MPC8220
-- common/cmd_bootm.c	    added clocks for MPC8220 in do_bootm_linux()
-
-- include/common.h	    added CONFIG_MPC8220
-
-- include/asm-ppc/u-boot.h  added board information members for MPC8220
-- include/asm-ppc/global_data.h added global variables - inp_clk, pci_clk,
-			    vco_clk, pev_clk, flb_clk, and bExtUart
-
-- arch/powerpc/lib/board.c	    added CONFIG_MPC8220 support
-
-- net/eth.c		    added FEC support for MPC8220
-
-Added files:
-============
-- board/alaska		    directory for Alaska MPC8220
-- board/alaska/alaska.c	    Alaska dram and BATs setup
-- board/alaska/extserial.c  external serial (debug card serial) support
-- board/alaska/flash.c	    Socket (AMD) and Onboard (INTEL) flash support
-- board/alaska/serial.c	    to determine which int/ext serial to use
-- board/alaska/Makefile	    Makefile
-- board/alaska/config.mk    config make
-- board/alaska/u-boot.lds   Linker description
-
-- arch/powerpc/cpu/mpc8220/dma.h	    multi-channel dma header file
-- arch/powerpc/cpu/mpc8220/dramSetup.h   dram setup header file
-- arch/powerpc/cpu/mpc8220/fec.h	    MPC8220 FEC header file
-- arch/powerpc/cpu/mpc8220/cpu.c	    cpu specific code
-- arch/powerpc/cpu/mpc8220/cpu_init.c    Flexbus ChipSelect and Mux pins setup
-- arch/powerpc/cpu/mpc8220/dramSetup.c   MPC8220 DDR SDRAM setup
-- arch/powerpc/cpu/mpc8220/fec.c	    MPC8220 FEC driver
-- arch/powerpc/cpu/mpc8220/i2c.c	    MPC8220 I2C driver
-- arch/powerpc/cpu/mpc8220/interrupts.c  interrupt support (not enable)
-- arch/powerpc/cpu/mpc8220/loadtask.c    load dma
-- arch/powerpc/cpu/mpc8220/speed.c	    system, pci, flexbus, pev, and cpu clock
-- arch/powerpc/cpu/mpc8220/traps.c	    exception
-- arch/powerpc/cpu/mpc8220/uart.c	    MPC8220 UART driver
-- arch/powerpc/cpu/mpc8220/Makefile	    Makefile
-- arch/powerpc/cpu/mpc8220/config.mk	    config make
-- arch/powerpc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program
-- arch/powerpc/cpu/mpc8220/io.S	    io functions
-- arch/powerpc/cpu/mpc8220/start.S	    start up
-
-- include/mpc8220.h
-
-- include/asm-ppc/immap_8220.h
-
-- include/configs/Alaska8220.h
-
-
-1. SWITCH SETTINGS
-==================
-1.1 SW1: 0 - Boot from Socket Flash (AMD) or 1 - Onboard Flash (INTEL)
-    SW2: 0 - Select MPC8220 UART or 1 - Debug Card UART
-    SW3: unsed
-    SW4: 0 - 1284 or 1 - FEC1
-    SW5: 0 - PEV or 1 - FEC2
-
-
-2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
-===========================================
-2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and
-     linux kernel, you can customize it based on your system requirements:
-      DDR:	    0x00000000-0x1fffffff (max 512MB)
-      MBAR:	    0xf0000000-0xf0027fff (128KB)
-      CPLD:	    0xf1000000-0xf103ffff (256KB)
-      FPGA:	    0xf2000000-0xf203ffff (256KB)
-      Flash:	    0xfe000000-0xffffffff (max 32MB)
-
-3. DEFINITIONS AND COMPILATION
-==============================
-3.1 Explanation on NEW definitions in include/configs/alaska8220.h
-    CONFIG_MPC8220	    MPC8220 specific
-    CONFIG_ALASKA8220	    Alaska board specific
-    CONFIG_SYS_MPC8220_CLKIN	    Define Alaska Input Clock
-    CONFIG_PSC_CONSOLE	    Enable MPC8220 UART
-    CONFIG_EXTUART_CONSOLE  Enable External 16552 UART
-    CONFIG_SYS_AMD_BOOT	    To determine the u-boot is booted from AMD or Intel
-    CONFIG_SYS_MBAR		    MBAR base address
-    CONFIG_SYS_DEFAULT_MBAR	    Reset MBAR base address
-
-3.2 Compilation
-   export CROSS_COMPILE=cross-compile-prefix
-   cd u-boot-1-1-x
-   make distclean
-   make Alaska8220_config
-   make
-
-
-4. SCREEN DUMP
-==============
-4.1 Alaska MPC8220 board
-    Boot from AMD (NOTE: May not show exactly the same)
-
-U-Boot 1.1.1 (Sep 22 2004 - 22:14:41)
-
-CPU:   MPC8220 (JTAG ID 1640301d) at 300 MHz
-       Bus 120 MHz, CPU 300 MHz, PCI 30 MHz, VCO 480 MHz
-Board: Alaska MPC8220 Evaluation Board
-I2C:   93 kHz, ready
-DRAM:  256 MB
-Reserving 167k for U-Boot at: 0ffd6000
-FLASH: 16.5 MB
-*** Warning - bad CRC, using default environment
-
-In:    serial
-Out:   serial
-Err:   serial
-Net:   FEC ETHERNET
-=> flinfo
-
-Bank # 1: INTEL 28F128J3A
-  Size: 8 MB in 64 Sectors
-  Sector Start Addresses:
-    FE000000	  FE020000	FE040000      FE060000	    FE080000
-    FE0A0000	  FE0C0000	FE0E0000      FE100000	    FE120000
-    FE140000	  FE160000	FE180000      FE1A0000	    FE1C0000
-    FE1E0000	  FE200000	FE220000      FE240000	    FE260000
-    FE280000	  FE2A0000	FE2C0000      FE2E0000	    FE300000
-    FE320000	  FE340000	FE360000      FE380000	    FE3A0000
-    FE3C0000	  FE3E0000	FE400000      FE420000	    FE440000
-    FE460000	  FE480000	FE4A0000      FE4C0000	    FE4E0000
-    FE500000	  FE520000	FE540000      FE560000	    FE580000
-    FE5A0000	  FE5C0000	FE5E0000      FE600000	    FE620000
-    FE640000	  FE660000	FE680000      FE6A0000	    FE6C0000
-    FE6E0000	  FE700000	FE720000      FE740000	    FE760000
-    FE780000	  FE7A0000	FE7C0000      FE7E0000
-
-Bank # 2: INTEL 28F128J3A
-  Size: 8 MB in 64 Sectors
-  Sector Start Addresses:
-    FE800000	  FE820000	FE840000      FE860000	    FE880000
-    FE8A0000	  FE8C0000	FE8E0000      FE900000	    FE920000
-    FE940000	  FE960000	FE980000      FE9A0000	    FE9C0000
-    FE9E0000	  FEA00000	FEA20000      FEA40000	    FEA60000
-    FEA80000	  FEAA0000	FEAC0000      FEAE0000	    FEB00000
-    FEB20000	  FEB40000	FEB60000      FEB80000	    FEBA0000
-    FEBC0000	  FEBE0000	FEC00000      FEC20000	    FEC40000
-    FEC60000	  FEC80000	FECA0000      FECC0000	    FECE0000
-    FED00000	  FED20000	FED40000      FED60000	    FED80000
-    FEDA0000	  FEDC0000	FEDE0000      FEE00000	    FEE20000
-    FEE40000	  FEE60000	FEE80000      FEEA0000	    FEEC0000
-    FEEE0000	  FEF00000 (RO) FEF20000 (RO) FEF40000	    FEF60000
-    FEF80000	  FEFA0000	FEFC0000      FEFE0000 (RO)
-
-Bank # 3: AMD AMD29F040B
-  Size: 0 MB in 7 Sectors
-  Sector Start Addresses:
-    FFF00000 (RO) FFF10000 (RO) FFF20000 (RO) FFF30000	    FFF40000
-    FFF50000	  FFF60000
-
-Bank # 4: AMD AMD29F040B
-  Size: 0 MB in 1 Sectors
-  Sector Start Addresses:
-    FFF70000 (RO)
-=> bdinfo
-
-memstart    = 0xF0009800
-memsize	    = 0x10000000
-flashstart  = 0xFFF00000
-flashsize   = 0x01080000
-flashoffset = 0x00025000
-sramstart   = 0xF0020000
-sramsize    = 0x00008000
-bootflags   = 0x00000001
-intfreq	    =	 300 MHz
-busfreq	    =	 120 MHz
-inpfreq	    =	  30 MHz
-flbfreq	    =	  30 MHz
-pcifreq	    =	  30 MHz
-vcofreq	    =	 480 MHz
-pevfreq	    =	  81 MHz
-ethaddr	    = 00:E0:0C:BC:E0:60
-eth1addr    = 00:E0:0C:BC:E0:61
-IP addr	    = 192.162.1.2
-baudrate    = 115200 bps
-=> printenv
-bootargs=root=/dev/ram rw
-bootdelay=5
-baudrate=115200
-ethaddr=00:e0:0c:bc:e0:60
-eth1addr=00:e0:0c:bc:e0:61
-ipaddr=192.162.1.2
-serverip=192.162.1.1
-gatewayip=192.162.1.1
-netmask=255.255.255.0
-hostname=Alaska
-stdin=serial
-stdout=serial
-stderr=serial
-ethact=FEC ETHERNET
-
-Environment size: 268/65532 bytes
-=> setenv ipaddr 192.160.1.2
-=> setenv serverip 192.160.1.1
-=> setenv gatewayip 192.160.1.1
-=> saveenv
-Saving Environment to Flash...
-
-.
-Un-Protected 1 sectors
-Erasing Flash...
-Erasing sector	0 ...  done
-Erased 1 sectors
-Writing to Flash... done
-
-.
-Protected 1 sectors
-=> tftp 0x10000 linux.elf
-Using FEC ETHERNET device
-TFTP from server 192.160.1.1; our IP address is 192.160.1.2; sending through gateway 192.160.1.1
-Filename 'linux.elf'.
-Load address: 0x10000
-Loading: invalid RARP header
-#################################################################
-	 #################################################################
-	 #################################################################
-	 #################################################################
-	 #################################################################
-	 #################################################################
-	 #################################################################
-	 #################################################################
-	 ##################################################
-done
-Bytes transferred = 2917494 (2c8476 hex)
-=> bootelf
-Loading .text @ 0x00a00000 (23820 bytes)
-Loading .data @ 0x00a06000 (2752512 bytes)
-Clearing .bss @ 0x00ca6000 (12764 bytes)
-## Starting application at 0x00a00000 ...
-
-Collect some entropy from RAM........done
-loaded at:     00A00000 00CA91DC
-zimage at:     00A06A93 00AD7756
-initrd at:     00AD8000 00CA5565
-avail ram:     00CAA000 014AA000
-
-Linux/PPC load: ip=off console=ttyS0,115200
-Uncompressing Linux...done.
-Now booting the kernel
-Total memory in system: 256 MB
-Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual: 0Mb
-Linux version 2.4.21-rc1 (r61688@bluesocks.sps.mot.com) (gcc version 3.3.1) #17 Wed Sep 8 11:49:16 CDT 2004
-Motorola Alaska port (C) 2003 Motorola, Inc.
-CPLD rev 3
-CPLD switches 0x1b
-Set Pin Mux for FEC1
-Set Pin Mux for FEC2
-Alaska Pin Multiplexing:
-Port Configuration Register 0 = 0
-Port Configuration Register 1 = 0
-Port Configuration Register 2 = 0
-Port Configuration Register 3 = 50000000
-Port Configuration Register 3 - PCI = 51400180
-Setup Alaska FPGA PIC:
-Interrupt Enable Register *(u32) = 0
-Interrupt Status Register = 2f0000
-Interrupt Enable Register in_be32 = 0
-Interrupt Status Register = 2f0000
-Interrupt Enable Register in_le32 = 0
-Interrupt Status Register = 2f00
-Interrupt Enable Register readl = 0
-Interrupt Status Register = 2f00
-Interrupt Enable Register = 0
-Interrupt Status Register = 2f0000
-Setup Alaska PCI Controller:
-On node 0 totalpages: 65536
-zone(0): 65536 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-Kernel command line: ip=off console=ttyS0,115200
-Using XLB clock (120.00 MHz) to set up decrementer
-Calibrating delay loop... 199.88 BogoMIPS
-Memory: 254792k available (1476k kernel code, 708k data, 228k init, 0k highmem)
-Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
-Inode cache hash table entries: 16384 (order: 5, 131072 bytes)
-Mount cache hash table entries: 512 (order: 0, 4096 bytes)
-Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
-Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
-POSIX conformance testing by UNIFIX
-PCI: Probing PCI hardware
-PCI: (pcibios_init) Global-Hose = 0xc029d000
-Scanning bus 00
-Fixups for bus 00
-Bus scan for 00 returning with max=00
-PCI: (pcibios_init) finished pci_scan_bus(hose->first_busno = 0, hose->ops = c01a1a74, hose = c029d000)
-PCI: (pcibios_init) PCI Bus Count = 0 =?= Next Bus# = 1
-PCI: (pcibios_init@pci_fixup_irqs) finished machine dependent PCI interrupt routing!
-PCI: bridge rsrc 81000000..81ffffff (100), parent c01a7f88
-PCI: bridge rsrc 84000000..87ffffff (200), parent c01a7fa4
-PCI: (pcibios_init) finished allocating and assigning resources!
-initDma!
-Using 90 DMA buffer descriptors
-descUsed f0023600, descriptors f002360c freeSram f0024140
-unmask SDMA tasks: 0xf0008018 = 0x6f000000
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Initializing RT netlink socket
-Starting kswapd
-Journalled Block Device driver loaded
-JFFS version 1.0, (C) 1999, 2000  Axis Communications AB
-JFFS2 version 2.1. (C) 2001 Red Hat, Inc., designed by Axis Communications AB.
-pty: 256 Unix98 ptys configured
-tracek: Copyright (C) Motorola, 2003.
-Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
-ttyS00 at 0xf1001008 (irq = 73) is a ST16650
-ttyS01 at 0xf1001010 (irq = 74) is a ST16650
-elp-fpanel: Copyright (C) Motorola, 2003.
-fpanel: fpanelWait timeout
-elp-engine: Copyright (C) Motorola, 2003.
-Video disabled due to configuration switch 4
-Alpine 1284 driver: Copyright (C) Motorola, 2003.
-1284 disabled due to configuration switch 5
-Alpine USB driver: Copyright (C) Motorola, 2003.
-OK
-USB: Descriptor download completed OK
-enable_irq(41) unbalanced
-enable_irq(75) unbalanced
-elp-dmaram: Copyright (C) Motorola, 2003.
-Total memory in system: 256 MB
-elp_dmaram: offset is 0x10000000, size is 0
-Xicor NVRAM driver: Copyright (C) Motorola, 2003.
-elp-video: Copyright (C) Motorola, 2003.
-Video disabled due to configuration switch 4
-elp-pfm: Copyright (C) Motorola, 2003.
-paddle: Copyright (C) Motorola, 2001, present.
-RAMDISK driver initialized: 16 RAM disks of 12288K size 1024 blocksize
-loop: loaded (max 8 devices)
-PPP generic driver version 2.4.2
-PPP Deflate Compression module registered
-Uniform Multi-Platform E-IDE driver Revision: 7.00beta-2.4
-ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
-init_alaska_mtd: chip probing count 0
-cfi_cmdset_0001: Erase suspend on write enabled
-Using buffer write method
-init_alaska_mtd: bank1, name:ALASKA0, size:16777216bytes
-ALASKA flash0: Using Static image partition definition
-Creating 3 MTD partitions on "ALASKA0":
-0x00000000-0x00280000 : "kernel"
-0x00280000-0x00fe0000 : "user"
-0x00fe0000-0x01000000 : "signature"
-mgt_fec_module_init
-mgt_fec_init()
-mgt_fec_init
-mgt_init_fec_dev(0xc05f6000,0)
-dev c05f6000 fec_priv c05f6160 fec f0009000
-mgt_init_fec_dev(0xc05f6800,1)
-dev c05f6800 fec_priv c05f6960 fec f0009800
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP, IGMP
-IP: routing cache hash table of 2048 buckets, 16Kbytes
-TCP: Hash tables configured (established 16384 bind 32768)
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-RAMDISK: Compressed image found at block 0
-Freeing initrd memory: 1845k freed
-JFFS: Trying to mount a non-mtd device.
-VFS: Mounted root (romfs filesystem) readonly.
-Freeing unused kernel memory: 228k init
-INIT: version 2.78 booting
-INIT: Entering runlevel: 1
-"Space, a great big place of unknown stuff."  -Dexter, for our MotD.
-[01/Jan/1970:00:00:01 +0000] boa: server version Boa/0.94.8.3
-[01/Jan/1970:00:00:01 +0000] boa: server built Sep  7 2004 at 17:40:55.
-[01/Jan/1970:00:00:01 +0000] boa: starting server pid=28, port 80
-Mounting flash filesystem, will take a minute...
-/etc/rc: line 30: /dev/lp0: No such devish-2.05b#
-sh-2.05b# ifup eth0
-client (v0.9.9-pre) started
-adapter index 2
-adapter hardware address 00:e0:0c:bc:e0:60
-execle'ing /usr/share/udhcpc/default.script
-/sbin/ifconfig eth0
-eth0	  Link encap:Ethernet  HWaddr 00:E0:0C:BC:E0:60
-	  BROADCAST MULTICAST  MTU:1500	 Metric:1
-	 mgt_fec_open
- Rfec request irq
-X fec_open: rcv_ring_size 8, xmt_ring_size 8
-packmgt_fec_open(): call netif_start_queue()
-ets:0 errors:0 dropped:0 overruns:0 frame:0
-	  TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
-	  collisions:0 txqueuelen:100
-	  RX bytes:0 (0.0 b)  TX bytes:0 (0.0 b)
-	  Base address:0x9000
-
-/sbin/ifconfig eth0 up
-entering raw listen mode
-Opening raw socket on ifindex 2
-adding option 0x35
-adding option 0x3d
-adding option 0x3c
-Sending discover...
-Waiting on select...
-unrelated/bogus packet
-Waiting on select...
-oooooh!!! got some!
-adding option 0x35
-adding option 0x3d
-adding option 0x3c
-adding option 0x32
-adding option 0x36
-Sending select for 163.12.48.146...
-Waiting on select...
-oooooh!!! got some!
-Waiting on select...
-oooooh!!! got some!
-Lease of 163.12.48.146 obtained, lease time 345600
-execle'ing /usr/share/udhcpc/default.script
-/sbin/ifconfig eth0 163.12.48.146 netmask 255.255.254.0
-/sbin/ifconfig eth0 up
-deleting routers
-/sbin/route del default
-/sbin/route add default gw 163.12.49.254 dev eth0
-adding dns 163.12.252.230
-adding dns 192.55.22.4
-adding dns 192.5.249.4
-entering none listen mode
-sh-2.05b#
-
-5. REPROGRAM U-BOOT
-===================
-5.1 Reprogram u-boot (boot from AMD)
-    1. Unprotect the boot sector
-    => protect off bank 3
-    2. Download new u-boot binary file
-    => tftp 0x10000 u-boot.bin
-    3. Erase bootsector (max 7 sectors)
-    => erase 0xfff00000 0xfff6ffff
-    4. Program the u-boot to flash
-    => cp.b 0x10000 0xfff00000
-    5. Reset for the new u-boot to take place
-    => reset
-
-5.2 Reprogram u-boot (boot from AMD program at INTEL)
-    1. Unprotect the boot sector
-    => protect off bank 2
-    2. Download new u-boot binary file
-    => tftp 0x10000 u-boot.bin
-    3. Erase bootsector (max 7 sectors)
-    => erase 0xfef00000 0xfefdffff
-    4. Program the u-boot to flash
-    => cp.b 0x10000 0xfef00000
-    5. Reset for the new u-boot to take place
-    => reset
-
-5.3 Reprogram u-boot (boot from INTEL)
-    1. Unprotect the boot sector
-    => protect off bank 4
-    2. Download new u-boot binary file
-    => tftp 0x10000 u-boot.bin
-    3. Erase bootsector (max 7 sectors)
-    => erase 0xfff00000 0xfffdffff
-    4. Program the u-boot to flash
-    => cp.b 0x10000 0xfff00000
-    5. Reset for the new u-boot to take place
-    => reset
-
-5.4 Reprogram u-boot (boot from INTEL program at AMD)
-    1. Unprotect the boot sector
-    => protect off bank 1
-    2. Download new u-boot binary file
-    => tftp 0x10000 u-boot.bin
-    3. Erase bootsector (max 7 sectors)
-    => erase 0xfe080000 0xfe0effff
-    4. Program the u-boot to flash
-    => cp.b 0x10000 0xfe080000
-    5. Reset for the new u-boot to take place
-    => reset
diff --git a/board/alaska/alaska.c b/board/alaska/alaska.c
deleted file mode 100644
index 89c1abd2336..00000000000
--- a/board/alaska/alaska.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale Inc.
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8220.h>
-#include <asm/processor.h>
-#include <asm/mmu.h>
-
-void setupBat (ulong size)
-{
-	ulong batu, batl;
-	int blocksize = 0;
-
-	/* Flash 0 */
-#if defined (CONFIG_SYS_AMD_BOOT)
-	batu = CONFIG_SYS_FLASH0_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
-#else
-	batu = CONFIG_SYS_FLASH0_BASE | BATU_BL_16M | BPP_RW | BPP_RX;
-#endif
-	batl = CONFIG_SYS_FLASH0_BASE | 0x22;
-	write_bat (IBAT0, batu, batl);
-	write_bat (DBAT0, batu, batl);
-
-	/* Flash 1 */
-#if defined (CONFIG_SYS_AMD_BOOT)
-	batu = CONFIG_SYS_FLASH1_BASE | BATU_BL_16M | BPP_RW | BPP_RX;
-#else
-	batu = CONFIG_SYS_FLASH1_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
-#endif
-	batl = CONFIG_SYS_FLASH1_BASE | 0x22;
-	write_bat (IBAT1, batu, batl);
-	write_bat (DBAT1, batu, batl);
-
-	/* CPLD */
-	batu = CONFIG_SYS_CPLD_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
-	batl = CONFIG_SYS_CPLD_BASE | 0x22;
-	write_bat (IBAT2, 0, 0);
-	write_bat (DBAT2, batu, batl);
-
-	/* FPGA */
-	batu = CONFIG_SYS_FPGA_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
-	batl = CONFIG_SYS_FPGA_BASE | 0x22;
-	write_bat (IBAT3, 0, 0);
-	write_bat (DBAT3, batu, batl);
-
-	/* MBAR - Data only */
-	batu = CONFIG_SYS_MBAR | BPP_RW | BPP_RX;
-	batl = CONFIG_SYS_MBAR | 0x22;
-	mtspr (IBAT4L, 0);
-	mtspr (IBAT4U, 0);
-	mtspr (DBAT4L, batl);
-	mtspr (DBAT4U, batu);
-
-	/* MBAR - SRAM */
-	batu = CONFIG_SYS_SRAM_BASE | BPP_RW | BPP_RX;
-	batl = CONFIG_SYS_SRAM_BASE | 0x42;
-	mtspr (IBAT5L, batl);
-	mtspr (IBAT5U, batu);
-	mtspr (DBAT5L, batl);
-	mtspr (DBAT5U, batu);
-
-	if (size <= 0x800000)	/* 8MB */
-		blocksize = BATU_BL_8M;
-	else if (size <= 0x1000000)	/* 16MB */
-		blocksize = BATU_BL_16M;
-	else if (size <= 0x2000000)	/* 32MB */
-		blocksize = BATU_BL_32M;
-	else if (size <= 0x4000000)	/* 64MB */
-		blocksize = BATU_BL_64M;
-	else if (size <= 0x8000000)	/* 128MB */
-		blocksize = BATU_BL_128M;
-	else if (size <= 0x10000000)	/* 256MB */
-		blocksize = BATU_BL_256M;
-
-	/* Memory */
-	batu = CONFIG_SYS_SDRAM_BASE | blocksize | BPP_RW | BPP_RX;
-	batl = CONFIG_SYS_SDRAM_BASE | 0x42;
-	mtspr (IBAT6L, batl);
-	mtspr (IBAT6U, batu);
-	mtspr (DBAT6L, batl);
-	mtspr (DBAT6U, batu);
-
-	/* memory size is less than 256MB */
-	if (size <= 0x10000000) {
-		/* Nothing */
-		batu = 0;
-		batl = 0;
-	} else {
-		size -= 0x10000000;
-		if (size <= 0x800000)	/* 8MB */
-			blocksize = BATU_BL_8M;
-		else if (size <= 0x1000000)	/* 16MB */
-			blocksize = BATU_BL_16M;
-		else if (size <= 0x2000000)	/* 32MB */
-			blocksize = BATU_BL_32M;
-		else if (size <= 0x4000000)	/* 64MB */
-			blocksize = BATU_BL_64M;
-		else if (size <= 0x8000000)	/* 128MB */
-			blocksize = BATU_BL_128M;
-		else if (size <= 0x10000000)	/* 256MB */
-			blocksize = BATU_BL_256M;
-
-		batu = (CONFIG_SYS_SDRAM_BASE +
-			0x10000000) | blocksize | BPP_RW | BPP_RX;
-		batl = (CONFIG_SYS_SDRAM_BASE + 0x10000000) | 0x42;
-	}
-
-	mtspr (IBAT7L, batl);
-	mtspr (IBAT7U, batu);
-	mtspr (DBAT7L, batl);
-	mtspr (DBAT7U, batu);
-}
-
-phys_size_t initdram (int board_type)
-{
-	ulong size;
-
-	size = dramSetup ();
-
-/* if iCache ad dCache is defined */
-#if defined(CONFIG_CMD_CACHE)
-/*    setupBat(size);*/
-#endif
-
-	return size;
-}
-
-int checkboard (void)
-{
-	puts ("Board: Alaska MPC8220 Evaluation Board\n");
-
-	return 0;
-}
diff --git a/board/alaska/flash.c b/board/alaska/flash.c
deleted file mode 100644
index 977822ac51e..00000000000
--- a/board/alaska/flash.c
+++ /dev/null
@@ -1,945 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips    */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH8
-
-typedef unsigned char FLASH_PORT_WIDTH;
-typedef volatile unsigned char FLASH_PORT_WIDTHV;
-
-#define SWAP(x)         (x)
-
-/* Intel-compatible flash ID */
-#define INTEL_COMPAT    0x89
-#define INTEL_ALT       0xB0
-
-/* Intel-compatible flash commands */
-#define INTEL_PROGRAM   0x10
-#define INTEL_ERASE     0x20
-#define INTEL_CLEAR     0x50
-#define INTEL_LOCKBIT   0x60
-#define INTEL_PROTECT   0x01
-#define INTEL_STATUS    0x70
-#define INTEL_READID    0x90
-#define INTEL_CONFIRM   0xD0
-#define INTEL_RESET     0xFF
-
-/* Intel-compatible flash status bits */
-#define INTEL_FINISHED  0x80
-#define INTEL_OK        0x80
-
-#define FPW             FLASH_PORT_WIDTH
-#define FPWV            FLASH_PORT_WIDTHV
-
-#define FLASH_CYCLE1    0x0555
-#define FLASH_CYCLE2    0x02aa
-
-#define WR_BLOCK        0x20
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static int write_data_block (flash_info_t * info, ulong src, ulong dest);
-static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-static void flash_sync_real_protect (flash_info_t * info);
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
-static unsigned char same_chip_banks (int bank1, int bank2);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-	int i;
-	ulong size = 0;
-	ulong fsize = 0;
-
-	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
-		memset (&flash_info[i], 0, sizeof (flash_info_t));
-
-		switch (i) {
-		case 0:
-			flash_get_size ((FPW *) CONFIG_SYS_FLASH1_BASE,
-					&flash_info[i]);
-			flash_get_offsets (CONFIG_SYS_FLASH1_BASE, &flash_info[i]);
-			break;
-		case 1:
-			flash_get_size ((FPW *) CONFIG_SYS_FLASH1_BASE,
-					&flash_info[i]);
-			fsize = CONFIG_SYS_FLASH1_BASE + flash_info[i - 1].size;
-			flash_get_offsets (fsize, &flash_info[i]);
-			break;
-		case 2:
-			flash_get_size ((FPW *) CONFIG_SYS_FLASH0_BASE,
-					&flash_info[i]);
-			flash_get_offsets (CONFIG_SYS_FLASH0_BASE, &flash_info[i]);
-			break;
-		case 3:
-			flash_get_size ((FPW *) CONFIG_SYS_FLASH0_BASE,
-					&flash_info[i]);
-			fsize = CONFIG_SYS_FLASH0_BASE + flash_info[i - 1].size;
-			flash_get_offsets (fsize, &flash_info[i]);
-			break;
-		default:
-			panic ("configured to many flash banks!\n");
-			break;
-		}
-		size += flash_info[i].size;
-
-		/* get the h/w and s/w protection status in sync */
-		flash_sync_real_protect(&flash_info[i]);
-	}
-
-	/* Protect monitor and environment sectors
-	 */
-#if defined (CONFIG_SYS_AMD_BOOT)
-	flash_protect (FLAG_PROTECT_SET,
-		       CONFIG_SYS_MONITOR_BASE,
-		       CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
-		       &flash_info[2]);
-	flash_protect (FLAG_PROTECT_SET,
-		       CONFIG_SYS_INTEL_BASE,
-		       CONFIG_SYS_INTEL_BASE + monitor_flash_len - 1,
-		       &flash_info[1]);
-#else
-	flash_protect (FLAG_PROTECT_SET,
-		       CONFIG_SYS_MONITOR_BASE,
-		       CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
-		       &flash_info[3]);
-	flash_protect (FLAG_PROTECT_SET,
-		       CONFIG_SYS_AMD_BASE,
-		       CONFIG_SYS_AMD_BASE + monitor_flash_len - 1, &flash_info[0]);
-#endif
-
-	flash_protect (FLAG_PROTECT_SET,
-		       CONFIG_ENV1_ADDR,
-		       CONFIG_ENV1_ADDR + CONFIG_ENV1_SIZE - 1, &flash_info[1]);
-	flash_protect (FLAG_PROTECT_SET,
-		       CONFIG_ENV_ADDR,
-		       CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[3]);
-
-	return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
-	int i;
-
-	if (info->flash_id == FLASH_UNKNOWN)
-		return;
-
-	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) {
-		for (i = 0; i < info->sector_count; i++) {
-			info->start[i] = base + (i * PHYS_AMD_SECT_SIZE);
-			info->protect[i] = 0;
-		}
-	}
-
-	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-		for (i = 0; i < info->sector_count; i++) {
-			info->start[i] = base + (i * PHYS_INTEL_SECT_SIZE);
-		}
-	}
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
-	int i;
-
-	if (info->flash_id == FLASH_UNKNOWN) {
-		printf ("missing or unknown FLASH type\n");
-		return;
-	}
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case FLASH_MAN_INTEL:
-		printf ("INTEL ");
-		break;
-	case FLASH_MAN_AMD:
-		printf ("AMD ");
-		break;
-	default:
-		printf ("Unknown Vendor ");
-		break;
-	}
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case FLASH_28F128J3A:
-		printf ("28F128J3A\n");
-		break;
-
-	case FLASH_AM040:
-		printf ("AMD29F040B\n");
-		break;
-
-	default:
-		printf ("Unknown Chip Type\n");
-		break;
-	}
-
-	printf ("  Size: %ld MB in %d Sectors\n",
-		info->size >> 20, info->sector_count);
-
-	printf ("  Sector Start Addresses:");
-	for (i = 0; i < info->sector_count; ++i) {
-		if ((i % 5) == 0)
-			printf ("\n   ");
-		printf (" %08lX%s",
-			info->start[i], info->protect[i] ? " (RO)" : "     ");
-	}
-	printf ("\n");
-	return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
-	FPWV value;
-	static int amd = 0;
-
-	/* Write auto select command: read Manufacturer ID */
-	/* Write auto select command sequence and test FLASH answer */
-	addr[FLASH_CYCLE1] = (FPW) 0x00AA00AA;	/* for AMD, Intel ignores this */
-	__asm__ ("sync");
-	addr[FLASH_CYCLE2] = (FPW) 0x00550055;	/* for AMD, Intel ignores this */
-	__asm__ ("sync");
-	addr[FLASH_CYCLE1] = (FPW) 0x00900090;	/* selects Intel or AMD */
-	__asm__ ("sync");
-
-	udelay (100);
-
-	switch (addr[0] & 0xff) {
-
-	case (uchar) AMD_MANUFACT:
-		info->flash_id = FLASH_MAN_AMD;
-		value = addr[1];
-		break;
-
-	case (uchar) INTEL_MANUFACT:
-		info->flash_id = FLASH_MAN_INTEL;
-		value = addr[2];
-		break;
-
-	default:
-		printf ("unknown\n");
-		info->flash_id = FLASH_UNKNOWN;
-		info->sector_count = 0;
-		info->size = 0;
-		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
-		return (0);	/* no or unknown flash  */
-	}
-
-	switch (value) {
-
-	case (FPW) INTEL_ID_28F128J3A:
-		info->flash_id += FLASH_28F128J3A;
-		info->sector_count = 64;
-		info->size = 0x00800000;	/* => 16 MB     */
-		break;
-
-	case (FPW) AMD_ID_LV040B:
-		info->flash_id += FLASH_AM040;
-		if (amd == 0) {
-			info->sector_count = 7;
-			info->size = 0x00070000;	/* => 448 KB     */
-			amd = 1;
-		} else {
-			/* for Environment settings */
-			info->sector_count = 1;
-			info->size = PHYS_AMD_SECT_SIZE;	/* => 64 KB     */
-			amd = 0;
-		}
-		break;
-
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		break;
-	}
-
-	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
-		printf ("** ERROR: sector count %d > max (%d) **\n",
-			info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
-		info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
-	}
-
-	if (value == (FPW) INTEL_ID_28F128J3A)
-		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
-	else
-		addr[0] = (FPW) 0x00F000F0;	/* restore read mode */
-
-	return (info->size);
-}
-
-
-/*
- * This function gets the u-boot flash sector protection status
- * (flash_info_t.protect[]) in sync with the sector protection
- * status stored in hardware.
- */
-static void flash_sync_real_protect (flash_info_t * info)
-{
-	int i;
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case FLASH_28F128J3A:
-		for (i = 0; i < info->sector_count; ++i) {
-			info->protect[i] = intel_sector_protected(info, i);
-		}
-		break;
-	case FLASH_AM040:
-	default:
-		/* no h/w protect support */
-		break;
-	}
-}
-
-
-/*
- * checks if "sector" in bank "info" is protected. Should work on intel
- * strata flash chips 28FxxxJ3x in 8-bit mode.
- * Returns 1 if sector is protected (or timed-out while trying to read
- * protection status), 0 if it is not.
- */
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
-{
-	FPWV *addr;
-	FPWV *lock_conf_addr;
-	ulong start;
-	unsigned char ret;
-
-	/*
-	 * first, wait for the WSM to be finished. The rationale for
-	 * waiting for the WSM to become idle for at most
-	 * CONFIG_SYS_FLASH_ERASE_TOUT is as follows. The WSM can be busy
-	 * because of: (1) erase, (2) program or (3) lock bit
-	 * configuration. So we just wait for the longest timeout of
-	 * the (1)-(3), i.e. the erase timeout.
-	 */
-
-	/* wait at least 35ns (W12) before issuing Read Status Register */
-	udelay(1);
-	addr = (FPWV *) info->start[sector];
-	*addr = (FPW) INTEL_STATUS;
-
-	start = get_timer (0);
-	while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
-		if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-			*addr = (FPW) INTEL_RESET; /* restore read mode */
-			printf("WSM busy too long, can't get prot status\n");
-			return 1;
-		}
-	}
-
-	/* issue the Read Identifier Codes command */
-	*addr = (FPW) INTEL_READID;
-
-	/* wait at least 35ns (W12) before reading */
-	udelay(1);
-
-	/* Intel example code uses offset of 4 for 8-bit flash */
-	lock_conf_addr = (FPWV *) info->start[sector] + 4;
-	ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
-
-	/* put flash back in read mode */
-	*addr = (FPW) INTEL_RESET;
-
-	return ret;
-}
-
-
-/*
- * Checks if "bank1" and "bank2" are on the same chip.  Returns 1 if they
- * are and 0 otherwise.
- */
-static unsigned char same_chip_banks (int bank1, int bank2)
-{
-	unsigned char same_chip[CONFIG_SYS_MAX_FLASH_BANKS][CONFIG_SYS_MAX_FLASH_BANKS] = {
-		{1, 1, 0, 0},
-		{1, 1, 0, 0},
-		{0, 0, 1, 1},
-		{0, 0, 1, 1}
-	};
-	return same_chip[bank1][bank2];
-}
-
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
-	int flag, prot, sect;
-	ulong type, start;
-	int rcode = 0, intel = 0;
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (info->flash_id == FLASH_UNKNOWN)
-			printf ("- missing\n");
-		else
-			printf ("- no sectors to erase\n");
-		return 1;
-	}
-
-	type = (info->flash_id & FLASH_VENDMASK);
-	if ((type != FLASH_MAN_INTEL)) {
-		type = (info->flash_id & FLASH_VENDMASK);
-		if ((type != FLASH_MAN_AMD)) {
-			printf ("Can't erase unknown flash type %08lx - aborted\n",
-				info->flash_id);
-			return 1;
-		}
-	}
-
-	if (type == FLASH_MAN_INTEL)
-		intel = 1;
-
-	prot = 0;
-	for (sect = s_first; sect <= s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-
-	if (prot) {
-		printf ("- Warning: %d protected sectors will not be erased!\n", prot);
-	} else {
-		printf ("\n");
-	}
-
-	start = get_timer (0);
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	/* Start erase on unprotected sectors */
-	for (sect = s_first; sect <= s_last; sect++) {
-		if (info->protect[sect] == 0) {	/* not protected */
-			FPWV *addr = (FPWV *) (info->start[sect]);
-			FPW status;
-
-			printf ("Erasing sector %2d ... ", sect);
-
-			/* arm simple, non interrupt dependent timer */
-			start = get_timer (0);
-
-			if (intel) {
-				*addr = (FPW) 0x00500050;	/* clear status register */
-				*addr = (FPW) 0x00200020;	/* erase setup */
-				*addr = (FPW) 0x00D000D0;	/* erase confirm */
-			} else {
-				FPWV *base;	/* first address in bank */
-
-				base = (FPWV *) (CONFIG_SYS_AMD_BASE);
-				base[FLASH_CYCLE1] = (FPW) 0x00AA00AA;	/* unlock */
-				base[FLASH_CYCLE2] = (FPW) 0x00550055;	/* unlock */
-				base[FLASH_CYCLE1] = (FPW) 0x00800080;	/* erase mode */
-				base[FLASH_CYCLE1] = (FPW) 0x00AA00AA;	/* unlock */
-				base[FLASH_CYCLE2] = (FPW) 0x00550055;	/* unlock */
-				*addr = (FPW) 0x00300030;	/* erase sector */
-			}
-
-			while (((status =
-				 *addr) & (FPW) 0x00800080) !=
-			       (FPW) 0x00800080) {
-				if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-					printf ("Timeout\n");
-					if (intel) {
-						*addr = (FPW) 0x00B000B0;	/* suspend erase     */
-						*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
-					} else
-						*addr = (FPW) 0x00F000F0;	/* reset to read mode */
-
-					rcode = 1;
-					break;
-				}
-			}
-
-			if (intel) {
-				*addr = (FPW) 0x00500050;	/* clear status register cmd.   */
-				*addr = (FPW) 0x00FF00FF;	/* resest to read mode          */
-			} else
-				*addr = (FPW) 0x00F000F0;	/* reset to read mode */
-
-			printf (" done\n");
-		}
-	}
-	if (flag)
-		enable_interrupts();
-
-	return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-	if (info->flash_id == FLASH_UNKNOWN) {
-		return 4;
-	}
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case FLASH_MAN_AMD:
-	    {
-		FPW data = 0;	/* 16 or 32 bit word, matches flash bus width */
-		int bytes;	/* number of bytes to program in current word */
-		int left;	/* number of bytes left to program */
-		int i, res;
-
-		for (left = cnt, res = 0;
-		     left > 0 && res == 0;
-		     addr += sizeof (data), left -=
-		     sizeof (data) - bytes) {
-
-			bytes = addr & (sizeof (data) - 1);
-			addr &= ~(sizeof (data) - 1);
-
-			/* combine source and destination data so can program
-			 * an entire word of 16 or 32 bits
-			 */
-			for (i = 0; i < sizeof (data); i++) {
-				data <<= 8;
-				if (i < bytes || i - bytes >= left)
-					data += *((uchar *) addr + i);
-				else
-					data += *src++;
-			}
-
-			res = write_word_amd (info, (FPWV *) addr,
-					      data);
-		}
-		return res;
-	    }		/* case FLASH_MAN_AMD */
-
-	case FLASH_MAN_INTEL:
-	    {
-		ulong cp, wp;
-		FPW data;
-		int count, i, l, rc, port_width;
-
-		/* get lower word aligned address */
-		wp = addr;
-		port_width = 1;
-
-		/*
-		 * handle unaligned start bytes
-		 */
-		if ((l = addr - wp) != 0) {
-			data = 0;
-			for (i = 0, cp = wp; i < l; ++i, ++cp) {
-				data = (data << 8) | (*(uchar *) cp);
-			}
-
-			for (; i < port_width && cnt > 0; ++i) {
-				data = (data << 8) | *src++;
-				--cnt;
-				++cp;
-			}
-
-			for (; cnt == 0 && i < port_width; ++i, ++cp)
-				data = (data << 8) | (*(uchar *) cp);
-
-			if ((rc =
-			     write_data (info, wp, SWAP (data))) != 0)
-				return (rc);
-			wp += port_width;
-		}
-
-		if (cnt > WR_BLOCK) {
-			/*
-			 * handle word aligned part
-			 */
-			count = 0;
-			while (cnt >= WR_BLOCK) {
-
-				if ((rc =
-				     write_data_block (info,
-						       (ulong) src,
-						       wp)) != 0)
-					return (rc);
-
-				wp += WR_BLOCK;
-				src += WR_BLOCK;
-				cnt -= WR_BLOCK;
-
-				if (count++ > 0x800) {
-					spin_wheel ();
-					count = 0;
-				}
-			}
-		}
-
-		if (cnt < WR_BLOCK) {
-			/*
-			 * handle word aligned part
-			 */
-			count = 0;
-			while (cnt >= port_width) {
-				data = 0;
-				for (i = 0; i < port_width; ++i)
-					data = (data << 8) | *src++;
-
-				if ((rc =
-				     write_data (info, wp,
-						 SWAP (data))) != 0)
-					return (rc);
-
-				wp += port_width;
-				cnt -= port_width;
-				if (count++ > 0x800) {
-					spin_wheel ();
-					count = 0;
-				}
-			}
-		}
-
-		if (cnt == 0)
-			return (0);
-
-		/*
-		 * handle unaligned tail bytes
-		 */
-		data = 0;
-		for (i = 0, cp = wp; i < port_width && cnt > 0;
-		     ++i, ++cp) {
-			data = (data << 8) | *src++;
-			--cnt;
-		}
-
-		for (; i < port_width; ++i, ++cp)
-			data = (data << 8) | (*(uchar *) cp);
-
-		return (write_data (info, wp, SWAP (data)));
-	    }		/* case FLASH_MAN_INTEL */
-
-	}			/* switch */
-	return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
-	FPWV *addr = (FPWV *) dest;
-	ulong start;
-	int flag, rc = 0;
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*addr & data) != data) {
-		printf ("not erased at %08lx (%lx)\n", (ulong)addr, (ulong)*addr);
-		return (2);
-	}
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	*addr = (FPW) 0x00400040;	/* write setup */
-	*addr = data;
-
-	/* arm simple, non interrupt dependent timer */
-	start = get_timer (0);
-
-	/* wait while polling the status register */
-	while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
-		if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			rc = 1;
-			goto OUT;
-		}
-	}
-
-OUT:
-	*addr = (FPW)0x00FF00FF;	/* restore read mode */
-
-	if (flag)
-		enable_interrupts();
-
-	return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data_block (flash_info_t * info, ulong src, ulong dest)
-{
-	FPWV *srcaddr = (FPWV *) src;
-	FPWV *dstaddr = (FPWV *) dest;
-	ulong start;
-	int flag, i, rc = 0;
-
-	/* Check if Flash is (sufficiently) erased */
-	for (i = 0; i < WR_BLOCK; i++)
-		if ((*dstaddr++ & 0xff) != 0xff) {
-			printf ("not erased at %08lx (%lx)\n",
-				(ulong)dstaddr, (ulong)*dstaddr);
-			return (2);
-		}
-
-	dstaddr = (FPWV *) dest;
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	*dstaddr = (FPW) 0x00e800e8;	/* write block setup */
-
-	/* arm simple, non interrupt dependent timer */
-	start = get_timer (0);
-
-	/* wait while polling the status register */
-	while ((*dstaddr & (FPW)0x00800080) != (FPW)0x00800080) {
-		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			rc = 1;
-			goto OUT;
-		}
-	}
-
-	*dstaddr = (FPW) 0x001f001f;	/* write 32 to buffer */
-	for (i = 0; i < WR_BLOCK; i++)
-		*dstaddr++ = *srcaddr++;
-
-	dstaddr -= 1;
-	*dstaddr = (FPW) 0x00d000d0;	/* write 32 to buffer */
-
-	/* arm simple, non interrupt dependent timer */
-	start = get_timer (0);
-
-	/* wait while polling the status register */
-	while ((*dstaddr & (FPW) 0x00800080) != (FPW) 0x00800080) {
-		if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			*dstaddr = (FPW) 0x00FF00FF;	/* restore read mode */
-			return (1);
-		}
-	}
-
-OUT:
-	*dstaddr = (FPW)0x00FF00FF;	/* restore read mode */
-	if (flag)
-		enable_interrupts();
-
-	return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data)
-{
-	ulong start;
-	int flag;
-	int res = 0;		/* result, assume success */
-	FPWV *base;		/* first address in flash bank */
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*dest & data) != data) {
-		return (2);
-	}
-
-	base = (FPWV *) (CONFIG_SYS_AMD_BASE);
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	base[FLASH_CYCLE1] = (FPW) 0x00AA00AA;	/* unlock */
-	base[FLASH_CYCLE2] = (FPW) 0x00550055;	/* unlock */
-	base[FLASH_CYCLE1] = (FPW) 0x00A000A0;	/* selects program mode */
-
-	*dest = data;		/* start programming the data */
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts ();
-
-	start = get_timer (0);
-
-	/* data polling for D7 */
-	while (res == 0
-	       && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
-		if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			*dest = (FPW) 0x00F000F0;	/* reset bank */
-			res = 1;
-		}
-	}
-
-	return (res);
-}
-
-void inline spin_wheel (void)
-{
-	static int p = 0;
-	static char w[] = "\\/-";
-
-	printf ("\010%c", w[p]);
-	(++p == 3) ? (p = 0) : 0;
-}
-
-/*-----------------------------------------------------------------------
- * Set/Clear sector's lock bit, returns:
- * 0 - OK
- * 1 - Error (timeout, voltage problems, etc.)
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
-	ulong start;
-	int i, j;
-	int curr_bank;
-	int bank;
-	int rc = 0;
-	FPWV *addr = (FPWV *) (info->start[sector]);
-	int flag = disable_interrupts ();
-
-	/*
-	 * 29F040B AMD flash does not support software protection/unprotection,
-	 * the only way to protect the AMD flash is marked it as prot bit.
-	 * This flash only support hardware protection, by supply or not supply
-	 * 12vpp to the flash
-	 */
-	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) {
-		info->protect[sector] = prot;
-
-		return 0;
-	}
-
-	*addr = INTEL_CLEAR;	/* Clear status register    */
-	if (prot) {		/* Set sector lock bit      */
-		*addr = INTEL_LOCKBIT;	/* Sector lock bit          */
-		*addr = INTEL_PROTECT;	/* set                      */
-	} else {		/* Clear sector lock bit    */
-		*addr = INTEL_LOCKBIT;	/* All sectors lock bits    */
-		*addr = INTEL_CONFIRM;	/* clear                    */
-	}
-
-	start = get_timer (0);
-
-	while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
-		if (get_timer (start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) {
-			printf ("Flash lock bit operation timed out\n");
-			rc = 1;
-			break;
-		}
-	}
-
-	if (*addr != INTEL_OK) {
-		printf ("Flash lock bit operation failed at %08X, CSR=%08X\n",
-			(uint) addr, (uint) * addr);
-		rc = 1;
-	}
-
-	if (!rc)
-		info->protect[sector] = prot;
-
-	/*
-	 * Clear lock bit command clears all sectors lock bits, so
-	 * we have to restore lock bits of protected sectors.
-	 */
-	if (!prot) {
-		/*
-		 * re-locking must be done for all banks that belong on one
-		 * FLASH chip, as all the sectors on the chip were unlocked
-		 * by INTEL_LOCKBIT/INTEL_CONFIRM commands. (let's hope
-		 * that banks never span chips, in particular chips which
-		 * support h/w protection differently).
-		 */
-
-		/* find the current bank number */
-		curr_bank = CONFIG_SYS_MAX_FLASH_BANKS + 1;
-		for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; ++j) {
-			if (&flash_info[j] == info) {
-				curr_bank = j;
-			}
-		}
-		if (curr_bank == CONFIG_SYS_MAX_FLASH_BANKS + 1) {
-			printf("Error: can't determine bank number!\n");
-		}
-
-		for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
-			if (!same_chip_banks(curr_bank, bank)) {
-				continue;
-			}
-			info = &flash_info[bank];
-			for (i = 0; i < info->sector_count; i++) {
-				if (info->protect[i]) {
-					start = get_timer (0);
-					addr = (FPWV *) (info->start[i]);
-					*addr = INTEL_LOCKBIT;	/* Sector lock bit  */
-					*addr = INTEL_PROTECT;	/* set              */
-					while ((*addr & INTEL_FINISHED) !=
-					       INTEL_FINISHED) {
-						if (get_timer (start) >
-						    CONFIG_SYS_FLASH_UNLOCK_TOUT) {
-							printf ("Flash lock bit operation timed out\n");
-							rc = 1;
-							break;
-						}
-					}
-				}
-			}
-		}
-
-		/*
-		 * get the s/w sector protection status in sync with the h/w,
-		 * in case something went wrong during the re-locking.
-		 */
-		flash_sync_real_protect(info); /* resets flash to read  mode */
-	}
-
-	if (flag)
-		enable_interrupts ();
-
-	*addr = INTEL_RESET;	/* Reset to read array mode */
-
-	return rc;
-}
diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
new file mode 100644
index 00000000000..e0c8d93fe77
--- /dev/null
+++ b/board/bf609-ezkit/soft_switch.c
@@ -0,0 +1,171 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <asm/blackfin.h>
+#include <asm/io.h>
+#include <i2c.h>
+#include "soft_switch.h"
+
+struct switch_config {
+	uchar dir0; /* IODIRA */
+	uchar dir1; /* IODIRB */
+	uchar value0; /* OLATA */
+	uchar value1; /* OLATB */
+};
+
+static struct switch_config switch_config_array[NUM_SWITCH] = {
+	{
+/*
+	U45 Port A                     U45 Port B
+
+	7---------------  RMII_CLK_EN  |  7--------------- ~TEMP_THERM_EN
+	| 6------------- ~CNT0ZM_EN    |  | 6------------- ~TEMP_IRQ_EN
+	| | 5----------- ~CNT0DG_EN    |  | | 5----------- ~UART0CTS_146_EN
+	| | | 4--------- ~CNT0UD_EN    |  | | | 4--------- ~UART0CTS_RST_EN
+	| | | | 3------- ~CAN0RX_EN    |  | | | | 3------- ~UART0CTS_RTS_LPBK
+	| | | | | 2----- ~CAN0_ERR_EN  |  | | | | | 2----- ~UART0CTS_EN
+	| | | | | | 1--- ~CAN_STB      |  | | | | | | 1--- ~UART0RX_EN
+	| | | | | | | 0-  CAN_EN       |  | | | | | | | 0- ~UART0RTS_EN
+	| | | | | | | |                |  | | | | | | | |
+	O O O O O O O O                |  O O O O O O O O   (I/O direction)
+	1 0 0 0 0 0 1 1                |  1 1 1 1 1 0 0 0   (value being set)
+*/
+		.dir0 = 0x0, /* all output */
+		.dir1 = 0x0, /* all output */
+		.value0 = RMII_CLK_EN | CAN_STB | CAN_EN,
+		.value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN
+				| UART0CTS_RST_EN | UART0CTS_RTS_LPBK,
+	},
+	{
+/*
+	U46 Port A                       U46 Port B
+
+	7--------------- ~LED4_GPIO_EN   |  7---------------  EMPTY
+	| 6------------- ~LED3_GPIO_EN   |  | 6------------- ~SPI0D3_EN
+	| | 5----------- ~LED2_GPIO_EN   |  | | 5----------- ~SPI0D2_EN
+	| | | 4--------- ~LED1_GPIO_EN   |  | | | 4--------- ~SPIFLASH_CS_EN
+	| | | | 3-------  SMC0_LP0_EN    |  | | | | 3------- ~SD_WP_EN
+	| | | | | 2-----  EMPTY          |  | | | | | 2----- ~SD_CD_EN
+	| | | | | | 1---  SMC0_EPPI2     |  | | | | | | 1--- ~PUSHBUTTON2_EN
+			  _LP1_SWITCH
+	| | | | | | | 0-  OVERRIDE_SMC0  |  | | | | | | | 0- ~PUSHBUTTON1_EN
+			  _LP0_BOOT
+	| | | | | | | |                  |  | | | | | | | |
+	O O O O O O O O                  |  O O O O O O O O   (I/O direction)
+	0 0 0 0 0 X 0 1                  |  X 0 0 0 0 0 0 0   (value being set)
+*/
+		.dir0 = 0x0, /* all output */
+		.dir1 = 0x0, /* all output */
+#ifdef CONFIG_BFIN_LINKPORT
+		.value0 = OVERRIDE_SMC0_LP0_BOOT,
+#else
+		.value0 = SMC0_EPPI2_LP1_SWITCH,
+#endif
+		.value1 = 0x0,
+	},
+	{
+/*
+	U47 Port A                         U47 Port B
+
+	7--------------- ~PD2_SPI0MISO |  7---------------  EMPTY
+			  _EI3_EN
+	| 6------------- ~PD1_SPI0D3   |  | 6-------------  EMPTY
+			  _EPPI1D17
+			  _SPI0SEL2
+			  _EI3_EN
+	| | 5----------- ~PD0_SPI0D2   |  | | 5-----------  EMPTY
+			  _EPPI1D16
+			  _SPI0SEL3
+			  _EI3_EN
+	| | | 4--------- ~WAKE_PUSH    |  | | | 4---------  EMPTY
+			  BUTTON_EN
+	| | | | 3------- ~ETHERNET_EN  |  | | | | 3-------  EMPTY
+	| | | | | 2-----  PHYAD0       |  | | | | | 2-----  EMPTY
+	| | | | | | 1---  PHY_PWR      |  | | | | | | 1--- ~PD4_SPI0CK_EI3_EN
+			  _DWN_INT
+	| | | | | | | 0- ~PHYINT_EN    |  | | | | | | | 0- ~PD3_SPI0MOSI_EI3_EN
+	| | | | | | | |                |  | | | | | | | |
+	O O O O O I I O                |  O O O O O O O O   (I/O direction)
+	1 1 1 0 0 0 0 0                |  X X X X X X 1 1   (value being set)
+*/
+		.dir0 = 0x6, /* bits 1 and 2 input, all others output */
+		.dir1 = 0x0, /* all output */
+		.value0 = PD1_SPI0D3_EN | PD0_SPI0D2_EN,
+		.value1 = 0,
+	},
+};
+
+static int setup_soft_switch(int addr, struct switch_config *config)
+{
+	int ret = 0;
+
+	ret = i2c_write(addr, OLATA, 1, &config->value0, 1);
+	if (ret)
+		return ret;
+	ret = i2c_write(addr, OLATB, 1, &config->value1, 1);
+	if (ret)
+		return ret;
+
+	ret = i2c_write(addr, IODIRA, 1, &config->dir0, 1);
+	if (ret)
+		return ret;
+	return i2c_write(addr, IODIRB, 1, &config->dir1, 1);
+}
+
+int config_switch_bit(int addr, int port, int bit, int dir, uchar value)
+{
+	int ret, data_reg, dir_reg;
+	uchar tmp;
+
+	if (port == IO_PORT_A) {
+		data_reg = OLATA;
+		dir_reg = IODIRA;
+	} else {
+		data_reg = OLATB;
+		dir_reg = IODIRB;
+	}
+
+	if (dir == IO_PORT_INPUT) {
+		ret = i2c_read(addr, dir_reg, 1, &tmp, 1);
+		if (ret)
+			return ret;
+		tmp |= bit;
+		return i2c_write(addr, dir_reg, 1, &tmp, 1);
+	} else {
+		ret = i2c_read(addr, data_reg, 1, &tmp, 1);
+		if (ret)
+			return ret;
+		if (value)
+			tmp |= bit;
+		else
+			tmp &= ~bit;
+		ret = i2c_write(addr, data_reg, 1, &tmp, 1);
+		if (ret)
+			return ret;
+		ret = i2c_read(addr, dir_reg, 1, &tmp, 1);
+		if (ret)
+			return ret;
+		tmp &= ~bit;
+		return i2c_write(addr, dir_reg, 1, &tmp, 1);
+	}
+}
+
+int setup_board_switches(void)
+{
+	int ret;
+	int i;
+
+	for (i = 0; i < NUM_SWITCH; i++) {
+		ret = setup_soft_switch(SWITCH_ADDR + i,
+				&switch_config_array[i]);
+		if (ret)
+			return ret;
+	}
+	return 0;
+}
diff --git a/board/bf609-ezkit/soft_switch.h b/board/bf609-ezkit/soft_switch.h
new file mode 100644
index 00000000000..d147fe1378c
--- /dev/null
+++ b/board/bf609-ezkit/soft_switch.h
@@ -0,0 +1,80 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __BOARD_SOFT_SWITCH_H__
+#define __BOARD_SOFT_SWITCH_H__
+
+#include <asm/soft_switch.h>
+
+/* switch 0 port A */
+#define CAN_EN                 0x1
+#define CAN_STB                0x2
+#define CAN0_ERR_EN            0x4
+#define CAN0RX_EN              0x8
+#define CNT0UD_EN              0x10
+#define CNT0DG_EN              0x20
+#define CNT0ZM_EN              0x40
+#define RMII_CLK_EN            0x80
+
+/* switch 0 port B */
+#define UART0RTS_EN            0x1
+#define UART0RX_EN             0x2
+#define UART0CTS_EN            0x4
+#define UART0CTS_RTS_LPBK      0x8
+#define UART0CTS_RST_EN        0x10
+#define UART0CTS_146_EN        0x20
+#define TEMP_IRQ_EN            0x40
+#define TEMP_THERM_EN          0x80
+
+/* switch 1 port A */
+#define OVERRIDE_SMC0_LP0_BOOT 0x1
+#define SMC0_EPPI2_LP1_SWITCH  0x2
+#define SMC0_LP0_EN            0x8
+#define LED1_GPIO_EN           0x10
+#define LED2_GPIO_EN           0x20
+#define LED3_GPIO_EN           0x40
+#define LED4_GPIO_EN           0x80
+
+/* switch 1 port B */
+#define PUSHBUTTON1_EN         0x1
+#define PUSHBUTTON2_EN         0x2
+#define SD_CD_EN               0x4
+#define SD_WP_EN               0x8
+#define SPIFLASH_CS_EN         0x10
+#define SPI0D2_EN              0x20
+#define SPI0D3_EN              0x40
+
+/* switch 2 port A */
+#define PHYINT_EN              0x1
+#define PHY_PWR_DWN_INT        0x2
+#define PHYAD0                 0x4
+#define ETHERNET_EN            0x8
+#define WAKE_PUSHBUTTON_EN     0x10
+#define PD0_SPI0D2_EN          0x20
+#define PD1_SPI0D3_EN          0x40
+#define PD2_SPI0MISO_EN        0x80
+
+/* switch 2 port B */
+#define PD3_SPI0MOSI_EN        0x1
+#define PD4_SPI0CK_EN          0x2
+
+#ifdef CONFIG_BFIN_BOARD_VERSION_1_0
+#define SWITCH_ADDR     0x21
+#else
+#define SWITCH_ADDR     0x20
+#endif
+
+#define NUM_SWITCH      3
+#define IODIRA          0x0
+#define IODIRB          0x1
+#define OLATA           0x14
+#define OLATB           0x15
+
+int setup_board_switches(void);
+
+#endif /* __BOARD_SOFT_SWITCH_H__ */
diff --git a/board/boundary/nitrogen6x/nitrogen6dl.cfg b/board/boundary/nitrogen6x/nitrogen6dl.cfg
index d6da96c5e88..66257901d76 100644
--- a/board/boundary/nitrogen6x/nitrogen6dl.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6dl.cfg
@@ -19,7 +19,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
index 0b1c35c3144..dccd4971f7c 100644
--- a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
@@ -19,7 +19,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/boundary/nitrogen6x/nitrogen6q.cfg b/board/boundary/nitrogen6x/nitrogen6q.cfg
index 680a853683b..e3173746326 100644
--- a/board/boundary/nitrogen6x/nitrogen6q.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6q.cfg
@@ -19,7 +19,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/boundary/nitrogen6x/nitrogen6q2g.cfg b/board/boundary/nitrogen6x/nitrogen6q2g.cfg
index f57ab0eedff..5a06220a3f6 100644
--- a/board/boundary/nitrogen6x/nitrogen6q2g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6q2g.cfg
@@ -19,7 +19,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/boundary/nitrogen6x/nitrogen6s.cfg b/board/boundary/nitrogen6x/nitrogen6s.cfg
index b5af5cc1b52..d7d5f29a588 100644
--- a/board/boundary/nitrogen6x/nitrogen6s.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6s.cfg
@@ -19,7 +19,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/boundary/nitrogen6x/nitrogen6s1g.cfg b/board/boundary/nitrogen6x/nitrogen6s1g.cfg
index 5aeefc8783c..cf2690ab1e3 100644
--- a/board/boundary/nitrogen6x/nitrogen6s1g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6s1g.cfg
@@ -19,7 +19,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/buffalo/lsxl/kwbimage-lschl.cfg b/board/buffalo/lsxl/kwbimage-lschl.cfg
index 2b9b3cd1b78..4ac381ec740 100644
--- a/board/buffalo/lsxl/kwbimage-lschl.cfg
+++ b/board/buffalo/lsxl/kwbimage-lschl.cfg
@@ -20,7 +20,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/buffalo/lsxl/kwbimage-lsxhl.cfg b/board/buffalo/lsxl/kwbimage-lsxhl.cfg
index 8a94b6c718d..c62f22cb46b 100644
--- a/board/buffalo/lsxl/kwbimage-lsxhl.cfg
+++ b/board/buffalo/lsxl/kwbimage-lsxhl.cfg
@@ -20,7 +20,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/cloudengines/pogo_e02/kwbimage.cfg b/board/cloudengines/pogo_e02/kwbimage.cfg
index a02e88d97b2..32c0cd53a90 100644
--- a/board/cloudengines/pogo_e02/kwbimage.cfg
+++ b/board/cloudengines/pogo_e02/kwbimage.cfg
@@ -23,7 +23,7 @@
 # You should have received a copy of the GNU General Public License
 # along with this program; If not, see <http://www.gnu.org/licenses/>.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/d-link/dns325/kwbimage.cfg b/board/d-link/dns325/kwbimage.cfg
index 97cb090e44e..6df79398318 100644
--- a/board/d-link/dns325/kwbimage.cfg
+++ b/board/d-link/dns325/kwbimage.cfg
@@ -25,7 +25,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/esg/ima3-mx53/imximage.cfg b/board/esg/ima3-mx53/imximage.cfg
index fce7492f6ed..ab22385c84b 100644
--- a/board/esg/ima3-mx53/imximage.cfg
+++ b/board/esg/ima3-mx53/imximage.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index 41887c2c7a8..a39c17a5677 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -166,11 +166,13 @@ int configure_vsc3316_3308(void)
 		ret = select_i2c_ch_pca(I2C_CH_VSC3316);
 		if (!ret) {
 			ret = vsc3316_config(VSC3316_TX_ADDRESS,
-					vsc16_tx_sgmii_lane_ab, num_vsc16_con);
+					vsc16_tx_4sfp_sgmii_12_56,
+					num_vsc16_con);
 			if (ret)
 				return ret;
 			ret = vsc3316_config(VSC3316_RX_ADDRESS,
-					vsc16_rx_sgmii_lane_ab, num_vsc16_con);
+					vsc16_rx_4sfp_sgmii_12_56,
+					num_vsc16_con);
 			if (ret)
 				return ret;
 		} else {
diff --git a/board/freescale/b4860qds/b4860qds_crossbar_con.h b/board/freescale/b4860qds/b4860qds_crossbar_con.h
index 994dec570e2..c2b6c44d257 100644
--- a/board/freescale/b4860qds/b4860qds_crossbar_con.h
+++ b/board/freescale/b4860qds/b4860qds_crossbar_con.h
@@ -26,42 +26,53 @@
 static const int8_t vsc16_tx_amc[8][2] = { {15, 3}, {0, 2}, {7, 4}, {9, 10},
 				{5, 11}, {4, 5}, {2, 6}, {12, 9} };
 
-static const int8_t vsc16_tx_sfp[8][2] = { {15, 8}, {0, 0}, {7, 7}, {9, 1},
-				{5, 15}, {4, 14}, {2, 12}, {12, 13} };
+static const int8_t vsc16_tx_sfp[8][2] = { {15, 7}, {0, 1}, {7, 8}, {9, 0},
+				{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 
-static const int8_t vsc16_tx_sgmii_lane_ab[8][2] = { {2, 14}, {12, 15},
-		{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
+static const int8_t vsc16_tx_4sfp_sgmii_12_56[8][2] = { {15, 7}, {0, 1},
+				{7, 8}, {9, 0}, {2, 14}, {12, 15},
+				{-1, -1}, {-1, -1} };
+
+static const int8_t vsc16_tx_4sfp_sgmii_34[8][2] = { {15, 7}, {0, 1},
+				{7, 8}, {9, 0}, {5, 14}, {4, 15},
+				{-1, -1}, {-1, -1} };
 
 #ifdef CONFIG_PPC_B4420
 static const int8_t vsc16_tx_sgmii_lane_cd[8][2] = { {5, 14}, {4, 15},
 		{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 #endif
+
 static const int8_t vsc16_tx_aurora[8][2] = { {2, 13}, {12, 12}, {-1, -1},
 			{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 
 static const int8_t vsc16_rx_amc[8][2] = { {3, 15}, {2, 1}, {4, 8}, {10, 9},
 				{11, 11}, {5, 10}, {6, 3}, {9, 12} };
 
-static const int8_t vsc16_rx_sfp[8][2] = { {0, 15}, {8, 1}, {1, 8}, {7, 9},
+static const int8_t vsc16_rx_sfp[8][2] = { {8, 15}, {0, 1}, {7, 8}, {1, 9},
 				{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 
-static const int8_t vsc16_rx_sgmii_lane_ab[8][2] = { {14, 3}, {15, 12},
-		{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
+static const int8_t vsc16_rx_4sfp_sgmii_12_56[8][2] = { {8, 15}, {0, 1},
+				{7, 8}, {1, 9}, {14, 3}, {15, 12},
+				{-1, -1}, {-1, -1} };
+
+static const int8_t vsc16_rx_4sfp_sgmii_34[8][2] = { {8, 15}, {0, 1},
+				{7, 8}, {1, 9}, {14, 11}, {15, 10},
+				{-1, -1}, {-1, -1} };
 
 #ifdef CONFIG_PPC_B4420
 static const int8_t vsc16_rx_sgmii_lane_cd[8][2] = { {14, 11}, {15, 10},
 		{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 #endif
 
-static const int8_t vsc16_rx_aurora[8][2] = { {12, 3}, {13, 12}, {-1, -1},
+static const int8_t vsc16_rx_aurora[8][2] = { {13, 3}, {12, 12}, {-1, -1},
 			{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 
 static const int8_t vsc08_tx_amc[4][2] = { {2, 2}, {3, 3}, {7, 4}, {1, 5} };
 
-static const int8_t vsc08_tx_sfp[4][2] = { {2, 6}, {3, 7}, {7, 1}, {1, 0} };
+static const int8_t vsc08_tx_sfp[4][2] = { {2, 1}, {3, 0}, {7, 6}, {1, 7} };
 
 static const int8_t vsc08_rx_amc[4][2] = { {2, 3}, {3, 4}, {4, 7}, {5, 1} };
 
-static const int8_t vsc08_rx_sfp[4][2] = { {6, 3}, {7, 4}, {1, 7}, {0, 1} };
+static const int8_t vsc08_rx_sfp[4][2] = { {1, 3}, {0, 4}, {6, 7}, {7, 1} };
 
 #endif
diff --git a/board/freescale/b4860qds/ddr.c b/board/freescale/b4860qds/ddr.c
index dd4c0f69e1d..b82b3d409e2 100644
--- a/board/freescale/b4860qds/ddr.c
+++ b/board/freescale/b4860qds/ddr.c
@@ -13,6 +13,7 @@
 #include <asm/fsl_ddr_sdram.h>
 #include <asm/fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
+#include <../arch/powerpc/cpu/mpc8xxx/ddr/ddr.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -188,3 +189,74 @@ phys_size_t initdram(int board_type)
 	puts("    DDR: ");
 	return dram_size;
 }
+
+unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
+			  unsigned int dbw_cap_adj[])
+{
+	int i, j;
+	unsigned long long total_mem, current_mem_base, total_ctlr_mem;
+	unsigned long long rank_density, ctlr_density = 0;
+
+	current_mem_base = 0ull;
+	total_mem = 0;
+	/*
+	 * This board has soldered DDR chips. DDRC1 has two rank.
+	 * DDRC2 has only one rank.
+	 * Assigning DDRC2 to lower address and DDRC1 to higher address.
+	 */
+	if (pinfo->memctl_opts[0].memctl_interleaving) {
+		rank_density = pinfo->dimm_params[0][0].rank_density >>
+					dbw_cap_adj[0];
+		ctlr_density = rank_density;
+
+		debug("rank density is 0x%llx, ctlr density is 0x%llx\n",
+		      rank_density, ctlr_density);
+		for (i = CONFIG_NUM_DDR_CONTROLLERS - 1; i >= 0; i--) {
+			switch (pinfo->memctl_opts[i].memctl_interleaving_mode) {
+			case FSL_DDR_CACHE_LINE_INTERLEAVING:
+			case FSL_DDR_PAGE_INTERLEAVING:
+			case FSL_DDR_BANK_INTERLEAVING:
+			case FSL_DDR_SUPERBANK_INTERLEAVING:
+				total_ctlr_mem = 2 * ctlr_density;
+				break;
+			default:
+				panic("Unknown interleaving mode");
+			}
+			pinfo->common_timing_params[i].base_address =
+						current_mem_base;
+			pinfo->common_timing_params[i].total_mem =
+						total_ctlr_mem;
+			total_mem = current_mem_base + total_ctlr_mem;
+			debug("ctrl %d base 0x%llx\n", i, current_mem_base);
+			debug("ctrl %d total 0x%llx\n", i, total_ctlr_mem);
+		}
+	} else {
+		/*
+		 * Simple linear assignment if memory
+		 * controllers are not interleaved.
+		 */
+		for (i = CONFIG_NUM_DDR_CONTROLLERS - 1; i >= 0; i--) {
+			total_ctlr_mem = 0;
+			pinfo->common_timing_params[i].base_address =
+						current_mem_base;
+			for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
+				/* Compute DIMM base addresses. */
+				unsigned long long cap =
+					pinfo->dimm_params[i][j].capacity;
+				pinfo->dimm_params[i][j].base_address =
+					current_mem_base;
+				debug("ctrl %d dimm %d base 0x%llx\n",
+				      i, j, current_mem_base);
+				current_mem_base += cap;
+				total_ctlr_mem += cap;
+			}
+			debug("ctrl %d total 0x%llx\n", i, total_ctlr_mem);
+			pinfo->common_timing_params[i].total_mem =
+							total_ctlr_mem;
+			total_mem += total_ctlr_mem;
+		}
+	}
+	debug("Total mem by %s is 0x%llx\n", __func__, total_mem);
+
+	return total_mem;
+}
diff --git a/board/freescale/b4860qds/eth_b4860qds.c b/board/freescale/b4860qds/eth_b4860qds.c
index 68e2725fce9..3bcda6d13af 100644
--- a/board/freescale/b4860qds/eth_b4860qds.c
+++ b/board/freescale/b4860qds/eth_b4860qds.c
@@ -275,6 +275,24 @@ int board_eth_init(bd_t *bis)
 		fm_info_set_phy_address(FM1_DTSEC4,
 				CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR);
 		break;
+	case 0x98:
+		/* XAUI in Slot1 and Slot2 */
+		debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC1: %x\n",
+		      CONFIG_SYS_FM1_10GEC1_PHY_ADDR);
+		fm_info_set_phy_address(FM1_10GEC1,
+					CONFIG_SYS_FM1_10GEC1_PHY_ADDR);
+		debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC2: %x\n",
+		      CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		fm_info_set_phy_address(FM1_10GEC2,
+					CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		break;
+	case 0x9E:
+		/* XAUI in Slot2 */
+		debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC2: %x\n",
+		      CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		fm_info_set_phy_address(FM1_10GEC2,
+					CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		break;
 	default:
 		printf("Fman:  Unsupported SerDes2 Protocol 0x%02x\n",
 				serdes2_prtcl);
@@ -300,6 +318,23 @@ int board_eth_init(bd_t *bis)
 		}
 	}
 
+	for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
+		int idx = i - FM1_10GEC1;
+
+		switch (fm_info_get_enet_if(i)) {
+		case PHY_INTERFACE_MODE_XGMII:
+			fm_info_set_mdio(i,
+					 miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME));
+			break;
+		default:
+			printf("Fman1: 10GSEC%u set to unknown interface %i\n",
+			       idx + 1, fm_info_get_enet_if(i));
+			fm_info_set_phy_address(i, 0);
+			break;
+		}
+	}
+
+
 	cpu_eth_init(bis);
 #endif
 
diff --git a/board/freescale/b4860qds/law.c b/board/freescale/b4860qds/law.c
index 4142e014d6f..b26725b2fcb 100644
--- a/board/freescale/b4860qds/law.c
+++ b/board/freescale/b4860qds/law.c
@@ -33,8 +33,12 @@ struct law_entry law_table[] = {
 	SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
 #endif
 	SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
+#ifdef CONFIG_SYS_MAPLE_MEM_PHYS
+	SET_LAW(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_MAPLE),
+#endif
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
-	SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
+	/* Limit DCSR to 32M to access NPC Trace Buffer */
+	SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
 #endif
 #ifdef CONFIG_SYS_NAND_BASE_PHYS
 	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
diff --git a/board/freescale/b4860qds/tlb.c b/board/freescale/b4860qds/tlb.c
index 6d634bf690a..29cc41bfaf0 100644
--- a/board/freescale/b4860qds/tlb.c
+++ b/board/freescale/b4860qds/tlb.c
@@ -106,7 +106,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
 	SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		      0, 10, BOOKE_PAGESZ_4M, 1),
+		      0, 10, BOOKE_PAGESZ_32M, 1),
 #endif
 #ifdef CONFIG_SYS_NAND_BASE
 	/*
diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h
index 8d914d54859..2cf87383d0c 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -78,7 +78,11 @@ struct qixis {
 	u8 trig_stat;
 	u8 res12[3];
 	u8 trig_ctr[4];
-	u8 res13[48];
+	u8 res13[16];
+	u8 clk_freq[6];	/* Clock Measurement Registers */
+	u8 res_c6[8];
+	u8 clk_base[2];	/* Clock Frequency Base Reg */
+	u8 res_d0[16];
 	u8 aux2[4];	/* Auxiliary Registers,0xE0 */
 	u8 res14[10];
 	u8 aux_ad;
diff --git a/board/freescale/corenet_ds/eth_superhydra.c b/board/freescale/corenet_ds/eth_superhydra.c
index ef9de25bd8f..ae07073532d 100644
--- a/board/freescale/corenet_ds/eth_superhydra.c
+++ b/board/freescale/corenet_ds/eth_superhydra.c
@@ -605,8 +605,8 @@ int board_eth_init(bd_t *bis)
 	lane = serdes_get_first_lane(XAUI_FM1);
 	if (lane >= 0) {
 		debug("FM1@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]);
-		mdio_mux[FM1_10GEC1].mask = BRDCFG1_EMI2_SEL_MASK;
-		mdio_mux[FM1_10GEC1].val = BRDCFG1_EMI2_SEL_SLOT2;
+		mdio_mux[i].mask = BRDCFG1_EMI2_SEL_MASK;
+		mdio_mux[i].val = BRDCFG1_EMI2_SEL_SLOT2;
 		super_hydra_mdio_set_mux("SUPER_HYDRA_FM1_TGEC_MDIO",
 					mdio_mux[i].mask, mdio_mux[i].val);
 	}
@@ -704,8 +704,8 @@ int board_eth_init(bd_t *bis)
 	lane = serdes_get_first_lane(XAUI_FM2);
 	if (lane >= 0) {
 		debug("FM2@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]);
-		mdio_mux[FM2_10GEC1].mask = BRDCFG1_EMI2_SEL_MASK;
-		mdio_mux[FM2_10GEC1].val = BRDCFG1_EMI2_SEL_SLOT1;
+		mdio_mux[i].mask = BRDCFG1_EMI2_SEL_MASK;
+		mdio_mux[i].val = BRDCFG1_EMI2_SEL_SLOT1;
 		super_hydra_mdio_set_mux("SUPER_HYDRA_FM2_TGEC_MDIO",
 					mdio_mux[i].mask, mdio_mux[i].val);
 	}
diff --git a/board/freescale/corenet_ds/pbi.cfg b/board/freescale/corenet_ds/pbi.cfg
index 50806ca8a00..af1ebd6f2a6 100644
--- a/board/freescale/corenet_ds/pbi.cfg
+++ b/board/freescale/corenet_ds/pbi.cfg
@@ -19,7 +19,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.pblimage for more details about how-to configure
+# Refer doc/README.pblimage for more details about how-to configure
 # and create PBL boot image
 #
 
diff --git a/board/freescale/corenet_ds/rcw_p5040ds.cfg b/board/freescale/corenet_ds/rcw_p5040ds.cfg
new file mode 100644
index 00000000000..82fa7417d9b
--- /dev/null
+++ b/board/freescale/corenet_ds/rcw_p5040ds.cfg
@@ -0,0 +1,11 @@
+#
+# Default RCW for P5040DS.
+#
+
+#PBL preamble and RCW header
+aa55aa55 010e0100
+#64 bytes RCW data
+0c580000 00000000 22121200 00000000
+089c4400 00283000 58000000 61000000
+00000000 00000000 00000000 10070000
+00000000 00000000 00000000 00000000
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
index 996d788ddc5..bae5c232042 100644
--- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
+++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx25pdk/imximage.cfg b/board/freescale/mx25pdk/imximage.cfg
index c42a2836f7e..8cc8bde6c12 100644
--- a/board/freescale/mx25pdk/imximage.cfg
+++ b/board/freescale/mx25pdk/imximage.cfg
@@ -15,7 +15,7 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  * GNU General Public License for more details.
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx51evk/imximage.cfg b/board/freescale/mx51evk/imximage.cfg
index 3e141eef3e8..aaa490a74a7 100644
--- a/board/freescale/mx51evk/imximage.cfg
+++ b/board/freescale/mx51evk/imximage.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg
index 4633e4d38fe..a103d955367 100644
--- a/board/freescale/mx53ard/imximage_dd3.cfg
+++ b/board/freescale/mx53ard/imximage_dd3.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx53evk/imximage.cfg b/board/freescale/mx53evk/imximage.cfg
index 1cd61d56cd7..c1cfddaf4b3 100644
--- a/board/freescale/mx53evk/imximage.cfg
+++ b/board/freescale/mx53evk/imximage.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg
index e6b90c116f9..2f75ad051d7 100644
--- a/board/freescale/mx53loco/imximage.cfg
+++ b/board/freescale/mx53loco/imximage.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx53smd/imximage.cfg b/board/freescale/mx53smd/imximage.cfg
index 4633e4d38fe..a103d955367 100644
--- a/board/freescale/mx53smd/imximage.cfg
+++ b/board/freescale/mx53smd/imximage.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg
index 4ed211eedd4..6f18b370067 100644
--- a/board/freescale/mx6qarm2/imximage.cfg
+++ b/board/freescale/mx6qarm2/imximage.cfg
@@ -20,7 +20,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/mx6qsabreauto/imximage.cfg b/board/freescale/mx6qsabreauto/imximage.cfg
index bbff813958d..e720c6b533c 100644
--- a/board/freescale/mx6qsabreauto/imximage.cfg
+++ b/board/freescale/mx6qsabreauto/imximage.cfg
@@ -19,7 +19,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index a706a6d00ca..44d3e0c618b 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -227,6 +227,17 @@ int misc_init_r(void)
 				"'00' is unsupported\n");
 		else
 			actual[i] = freq[i][clock];
+
+		/*
+		 * PC board uses a different CPLD with PB board, this CPLD
+		 * has cpld_ver_sub = 1, and pcba_ver = 5. But CPLD on PB
+		 * board has cpld_ver_sub = 0, and pcba_ver = 4.
+		 */
+		if ((i == 1) && (CPLD_READ(cpld_ver_sub) == 1) &&
+		    (CPLD_READ(pcba_ver) == 5)) {
+			/* PC board bank2 frequency */
+			actual[i] = freq[i-1][clock];
+		}
 	}
 
 	for (i = 0; i < NUM_SRDS_BANKS; i++) {
diff --git a/board/freescale/t4qds/ddr.c b/board/freescale/t4qds/ddr.c
index 692616aed4d..058d62511f5 100644
--- a/board/freescale/t4qds/ddr.c
+++ b/board/freescale/t4qds/ddr.c
@@ -19,6 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct board_specific_parameters {
 	u32 n_ranks;
 	u32 datarate_mhz_high;
+	u32 rank_gb;
 	u32 clk_adjust;
 	u32 wrlvl_start;
 	u32 wrlvl_ctl_2;
@@ -36,16 +37,19 @@ struct board_specific_parameters {
 static const struct board_specific_parameters udimm0[] = {
 	/*
 	 * memory controller 0
-	 *   num|  hi|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
-	 * ranks| mhz|adjst| start |   ctl2    |  ctl3  |      |delay |
+	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
+	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |      |delay |
 	 */
-	{2,  1350,    5,     7, 0x0809090b, 0x0c0c0d09,   0xff,    2,  0},
-	{2,  1666,    5,     8, 0x080a0a0c, 0x0c0d0e0a,   0xff,    2,  0},
-	{2,  2140,    5,     8, 0x090a0b0c, 0x0e0f100b,   0xff,    2,  0},
-	{1,  1350,    5,     8, 0x0809090b, 0x0c0c0d0a,   0xff,    2,  0},
-	{1,  1700,    5,     8, 0x080a0a0c, 0x0c0d0e0a,   0xff,    2,  0},
-	{1,  1900,    4,     8, 0x080a0a0c, 0x0e0e0f0a,   0xff,    2,  0},
-	{1,  2140,    4,     8, 0x090a0b0c, 0x0e0f100b,   0xff,    2,  0},
+	{2,  1350, 4, 4,     8, 0x0809090b, 0x0c0c0d0a,   0xff,    2,  0},
+	{2,  1350, 0, 5,     7, 0x0709090b, 0x0c0c0d09,   0xff,    2,  0},
+	{2,  1666, 4, 4,     8, 0x080a0a0d, 0x0d10100b,   0xff,    2,  0},
+	{2,  1666, 0, 5,     7, 0x080a0a0c, 0x0d0d0e0a,   0xff,    2,  0},
+	{2,  1900, 0, 4,     8, 0x090a0b0e, 0x0f11120c,   0xff,    2,  0},
+	{2,  2140, 0, 4,     8, 0x090a0b0e, 0x0f11120c,   0xff,    2,  0},
+	{1,  1350, 0, 5,     8, 0x0809090b, 0x0c0c0d0a,   0xff,    2,  0},
+	{1,  1700, 0, 5,     8, 0x080a0a0c, 0x0c0d0e0a,   0xff,    2,  0},
+	{1,  1900, 0, 4,     8, 0x080a0a0c, 0x0e0e0f0a,   0xff,    2,  0},
+	{1,  2140, 0, 4,     8, 0x090a0b0c, 0x0e0f100b,   0xff,    2,  0},
 	{}
 };
 
@@ -61,19 +65,19 @@ static const struct board_specific_parameters *udimms[] = {
 static const struct board_specific_parameters rdimm0[] = {
 	/*
 	 * memory controller 0
-	 *   num|  hi|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
-	 * ranks| mhz|adjst| start |   ctl2    |  ctl3  |      |delay |
+	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
+	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |      |delay |
 	 */
-	{4,  1350,    5,     9, 0x08070605, 0x07080805,   0xff,    2,  0},
-	{4,  1666,    5,     8, 0x08070605, 0x07080805,   0xff,    2,  0},
-	{4,  2140,    5,     8, 0x08070605, 0x07081805,   0xff,    2,  0},
-	{2,  1350,    5,     7, 0x0809090b, 0x0c0c0d09,   0xff,    2,  0},
-	{2,  1666,    5,     8, 0x080a0a0c, 0x0c0d0e0a,   0xff,    2,  0},
-	{2,  2140,    5,     8, 0x090a0b0c, 0x0e0f100b,   0xff,    2,  0},
-	{1,  1350,    5,     8, 0x0809090b, 0x0c0c0d0a,   0xff,    2,  0},
-	{1,  1700,    5,     8, 0x080a0a0c, 0x0c0d0e0a,   0xff,    2,  0},
-	{1,  1900,    4,     8, 0x080a0a0c, 0x0e0e0f0a,   0xff,    2,  0},
-	{1,  2140,    4,     8, 0x090a0b0c, 0x0e0f100b,   0xff,    2,  0},
+	{4,  1350, 0, 5,     9, 0x08070605, 0x07080805,   0xff,    2,  0},
+	{4,  1666, 0, 5,     8, 0x08070605, 0x07080805,   0xff,    2,  0},
+	{4,  2140, 0, 5,     8, 0x08070605, 0x07081805,   0xff,    2,  0},
+	{2,  1350, 0, 5,     7, 0x0809090b, 0x0c0c0d09,   0xff,    2,  0},
+	{2,  1666, 0, 5,     8, 0x080a0a0c, 0x0c0d0e0a,   0xff,    2,  0},
+	{2,  2140, 0, 5,     8, 0x090a0b0c, 0x0e0f100b,   0xff,    2,  0},
+	{1,  1350, 0, 5,     8, 0x0809090b, 0x0c0c0d0a,   0xff,    2,  0},
+	{1,  1700, 0, 5,     8, 0x080a0a0c, 0x0c0d0e0a,   0xff,    2,  0},
+	{1,  1900, 0, 4,     8, 0x080a0a0c, 0x0e0e0f0a,   0xff,    2,  0},
+	{1,  2140, 0, 4,     8, 0x090a0b0c, 0x0e0f100b,   0xff,    2,  0},
 	{}
 };
 
@@ -113,7 +117,8 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 	 */
 	ddr_freq = get_ddr_freq(0) / 1000000;
 	while (pbsp->datarate_mhz_high) {
-		if (pbsp->n_ranks == pdimm->n_ranks) {
+		if (pbsp->n_ranks == pdimm->n_ranks &&
+		    (pdimm->rank_density >> 30) >= pbsp->rank_gb) {
 			if (ddr_freq <= pbsp->datarate_mhz_high) {
 				popts->cpo_override = pbsp->cpo;
 				popts->write_data_delay =
@@ -146,6 +151,13 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 		panic("DIMM is not supported by this board");
 	}
 found:
+	debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n"
+		"\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, "
+		"wrlvl_ctrl_3 0x%x\n",
+		pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb,
+		pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,
+		pbsp->wrlvl_ctl_3);
+
 	/*
 	 * Factors to consider for half-strength driver enable:
 	 *	- number of DIMMs installed
diff --git a/board/freescale/t4qds/eth.c b/board/freescale/t4qds/eth.c
index a49c7d4f15f..7103a0d38d4 100644
--- a/board/freescale/t4qds/eth.c
+++ b/board/freescale/t4qds/eth.c
@@ -52,7 +52,7 @@
 #define EMI1_SLOT4	4
 #define EMI1_SLOT5	5
 #define EMI1_SLOT7	7
-#define EMI2		8 /* tmp, FIXME */
+#define EMI2		8
 /* Slot6 and Slot8 do not have EMI connections */
 
 static int mdio_mux[NUM_FM_PORTS];
@@ -71,6 +71,14 @@ static const char *mdio_names[] = {
 
 static u8 lane_to_slot_fsm1[] = {1, 1, 1, 1, 2, 2, 2, 2};
 static u8 lane_to_slot_fsm2[] = {3, 3, 3, 3, 4, 4, 4, 4};
+static u8 slot_qsgmii_phyaddr[5][4] = {
+	{0, 0, 0, 0},/* not used, to make index match slot No. */
+	{0, 1, 2, 3},
+	{4, 5, 6, 7},
+	{8, 9, 0xa, 0xb},
+	{0xc, 0xd, 0xe, 0xf},
+};
+static u8 qsgmiiphy_fix[NUM_FM_PORTS] = {0};
 
 static const char *t4240qds_mdio_name_for_muxval(u8 muxval)
 {
@@ -180,21 +188,228 @@ static int t4240qds_mdio_init(char *realbusname, u8 muxval)
 void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
 				enum fm_port port, int offset)
 {
-	if (mdio_mux[port] == EMI1_RGMII)
-		fdt_set_phy_handle(blob, prop, pa, "phy_rgmii");
-
-	/* TODO: will do with dts */
+	if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) {
+		switch (port) {
+		case FM1_DTSEC1:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy21");
+			break;
+		case FM1_DTSEC2:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy22");
+			break;
+		case FM1_DTSEC3:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy23");
+			break;
+		case FM1_DTSEC4:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy24");
+			break;
+		case FM1_DTSEC6:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy12");
+			break;
+		case FM1_DTSEC9:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy14");
+			else
+				fdt_set_phy_handle(blob, prop, pa,
+						   "phy_sgmii4");
+			break;
+		case FM1_DTSEC10:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy13");
+			else
+				fdt_set_phy_handle(blob, prop, pa,
+						   "phy_sgmii3");
+			break;
+		case FM2_DTSEC1:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy41");
+			break;
+		case FM2_DTSEC2:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy42");
+			break;
+		case FM2_DTSEC3:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy43");
+			break;
+		case FM2_DTSEC4:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy44");
+			break;
+		case FM2_DTSEC6:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy32");
+			break;
+		case FM2_DTSEC9:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy34");
+			else
+				fdt_set_phy_handle(blob, prop, pa,
+						   "phy_sgmii12");
+			break;
+		case FM2_DTSEC10:
+			if (qsgmiiphy_fix[port])
+				fdt_set_phy_handle(blob, prop, pa,
+						   "sgmii_phy33");
+			else
+				fdt_set_phy_handle(blob, prop, pa,
+						   "phy_sgmii11");
+			break;
+		default:
+			break;
+		}
+	}
 }
 
 void fdt_fixup_board_enet(void *fdt)
 {
-	/* TODO: will do with dts */
+	int i;
+	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	u32 prtcl2 = in_be32(&gur->rcwsr[4]) & FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
+
+	prtcl2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
+	for (i = FM1_DTSEC1; i < NUM_FM_PORTS; i++) {
+		switch (fm_info_get_enet_if(i)) {
+		case PHY_INTERFACE_MODE_SGMII:
+			switch (mdio_mux[i]) {
+			case EMI1_SLOT1:
+				fdt_status_okay_by_alias(fdt, "emi1_slot1");
+				break;
+			case EMI1_SLOT2:
+				fdt_status_okay_by_alias(fdt, "emi1_slot2");
+				break;
+			case EMI1_SLOT3:
+				fdt_status_okay_by_alias(fdt, "emi1_slot3");
+				break;
+			case EMI1_SLOT4:
+				fdt_status_okay_by_alias(fdt, "emi1_slot4");
+				break;
+			default:
+				break;
+			}
+			break;
+		case PHY_INTERFACE_MODE_XGMII:
+			/* check if it's XFI interface for 10g */
+			if ((prtcl2 == 56) || (prtcl2 == 57)) {
+				fdt_status_okay_by_alias(fdt, "emi2_xfislot3");
+				break;
+			}
+			switch (i) {
+			case FM1_10GEC1:
+				fdt_status_okay_by_alias(fdt, "emi2_xauislot1");
+				break;
+			case FM1_10GEC2:
+				fdt_status_okay_by_alias(fdt, "emi2_xauislot2");
+				break;
+			case FM2_10GEC1:
+				fdt_status_okay_by_alias(fdt, "emi2_xauislot3");
+				break;
+			case FM2_10GEC2:
+				fdt_status_okay_by_alias(fdt, "emi2_xauislot4");
+				break;
+			default:
+				break;
+			}
+			break;
+		default:
+			break;
+		}
+	}
+}
+
+static void initialize_qsgmiiphy_fix(void)
+{
+	int i;
+	unsigned short reg;
+
+	for (i = 1; i <= 4; i++) {
+		/*
+		 * Try to read if a SGMII card is used, we do it slot by slot.
+		 * if a SGMII PHY address is valid on a slot, then we mark
+		 * all ports on the slot, then fix the PHY address for the
+		 * marked port when doing dtb fixup.
+		 */
+		if (miiphy_read(mdio_names[i],
+				SGMII_CARD_PORT1_PHY_ADDR, MII_PHYSID2, &reg) != 0) {
+			debug("Slot%d PHY ID register 2 read failed\n", i);
+			continue;
+		}
+
+		debug("Slot%d MII_PHYSID2 @ 0x1c= 0x%04x\n", i, reg);
+
+		if (reg == 0xFFFF) {
+			/* No physical device present at this address */
+			continue;
+		}
+
+		switch (i) {
+		case 1:
+			qsgmiiphy_fix[FM1_DTSEC5] = 1;
+			qsgmiiphy_fix[FM1_DTSEC6] = 1;
+			qsgmiiphy_fix[FM1_DTSEC9] = 1;
+			qsgmiiphy_fix[FM1_DTSEC10] = 1;
+			slot_qsgmii_phyaddr[1][0] =  SGMII_CARD_PORT1_PHY_ADDR;
+			slot_qsgmii_phyaddr[1][1] =  SGMII_CARD_PORT2_PHY_ADDR;
+			slot_qsgmii_phyaddr[1][2] =  SGMII_CARD_PORT3_PHY_ADDR;
+			slot_qsgmii_phyaddr[1][3] =  SGMII_CARD_PORT4_PHY_ADDR;
+			break;
+		case 2:
+			qsgmiiphy_fix[FM1_DTSEC1] = 1;
+			qsgmiiphy_fix[FM1_DTSEC2] = 1;
+			qsgmiiphy_fix[FM1_DTSEC3] = 1;
+			qsgmiiphy_fix[FM1_DTSEC4] = 1;
+			slot_qsgmii_phyaddr[2][0] =  SGMII_CARD_PORT1_PHY_ADDR;
+			slot_qsgmii_phyaddr[2][1] =  SGMII_CARD_PORT2_PHY_ADDR;
+			slot_qsgmii_phyaddr[2][2] =  SGMII_CARD_PORT3_PHY_ADDR;
+			slot_qsgmii_phyaddr[2][3] =  SGMII_CARD_PORT4_PHY_ADDR;
+			break;
+		case 3:
+			qsgmiiphy_fix[FM2_DTSEC5] = 1;
+			qsgmiiphy_fix[FM2_DTSEC6] = 1;
+			qsgmiiphy_fix[FM2_DTSEC9] = 1;
+			qsgmiiphy_fix[FM2_DTSEC10] = 1;
+			slot_qsgmii_phyaddr[3][0] =  SGMII_CARD_PORT1_PHY_ADDR;
+			slot_qsgmii_phyaddr[3][1] =  SGMII_CARD_PORT2_PHY_ADDR;
+			slot_qsgmii_phyaddr[3][2] =  SGMII_CARD_PORT3_PHY_ADDR;
+			slot_qsgmii_phyaddr[3][3] =  SGMII_CARD_PORT4_PHY_ADDR;
+			break;
+		case 4:
+			qsgmiiphy_fix[FM2_DTSEC1] = 1;
+			qsgmiiphy_fix[FM2_DTSEC2] = 1;
+			qsgmiiphy_fix[FM2_DTSEC3] = 1;
+			qsgmiiphy_fix[FM2_DTSEC4] = 1;
+			slot_qsgmii_phyaddr[4][0] =  SGMII_CARD_PORT1_PHY_ADDR;
+			slot_qsgmii_phyaddr[4][1] =  SGMII_CARD_PORT2_PHY_ADDR;
+			slot_qsgmii_phyaddr[4][2] =  SGMII_CARD_PORT3_PHY_ADDR;
+			slot_qsgmii_phyaddr[4][3] =  SGMII_CARD_PORT4_PHY_ADDR;
+			break;
+		default:
+			break;
+		}
+	}
 }
 
 int board_eth_init(bd_t *bis)
 {
 #if defined(CONFIG_FMAN_ENET)
-	int i;
+	int i, idx, lane, slot;
 	struct memac_mdio_info dtsec_mdio_info;
 	struct memac_mdio_info tgec_mdio_info;
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -236,6 +451,7 @@ int board_eth_init(bd_t *bis)
 	t4240qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT7);
 	t4240qds_mdio_init(DEFAULT_FM_TGEC_MDIO_NAME, EMI2);
 
+	initialize_qsgmiiphy_fix();
 
 	switch (srds_prtcl_s1) {
 	case 1:
@@ -248,44 +464,48 @@ int board_eth_init(bd_t *bis)
 	case 28:
 	case 36:
 		/* SGMII in Slot1 and Slot2 */
-		fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC3, SGMII_CARD_PORT3_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC4, SGMII_CARD_PORT4_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
+		fm_info_set_phy_address(FM1_DTSEC1, slot_qsgmii_phyaddr[2][0]);
+		fm_info_set_phy_address(FM1_DTSEC2, slot_qsgmii_phyaddr[2][1]);
+		fm_info_set_phy_address(FM1_DTSEC3, slot_qsgmii_phyaddr[2][2]);
+		fm_info_set_phy_address(FM1_DTSEC4, slot_qsgmii_phyaddr[2][3]);
+		fm_info_set_phy_address(FM1_DTSEC5, slot_qsgmii_phyaddr[1][0]);
+		fm_info_set_phy_address(FM1_DTSEC6, slot_qsgmii_phyaddr[1][1]);
 		if ((srds_prtcl_s2 != 56) && (srds_prtcl_s2 != 57)) {
 			fm_info_set_phy_address(FM1_DTSEC9,
-						SGMII_CARD_PORT4_PHY_ADDR);
+						slot_qsgmii_phyaddr[1][3]);
 			fm_info_set_phy_address(FM1_DTSEC10,
-						SGMII_CARD_PORT3_PHY_ADDR);
+						slot_qsgmii_phyaddr[1][2]);
 		}
 		break;
 	case 38:
-		fm_info_set_phy_address(FM1_DTSEC5, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC6, QSGMII_CARD_PHY_ADDR);
+		fm_info_set_phy_address(FM1_DTSEC1, slot_qsgmii_phyaddr[2][0]);
+		fm_info_set_phy_address(FM1_DTSEC2, slot_qsgmii_phyaddr[2][1]);
+		fm_info_set_phy_address(FM1_DTSEC3, slot_qsgmii_phyaddr[2][2]);
+		fm_info_set_phy_address(FM1_DTSEC4, slot_qsgmii_phyaddr[2][3]);
+		fm_info_set_phy_address(FM1_DTSEC5, slot_qsgmii_phyaddr[1][0]);
+		fm_info_set_phy_address(FM1_DTSEC6, slot_qsgmii_phyaddr[1][1]);
 		if ((srds_prtcl_s2 != 56) && (srds_prtcl_s2 != 57)) {
 			fm_info_set_phy_address(FM1_DTSEC9,
-						QSGMII_CARD_PHY_ADDR);
+						slot_qsgmii_phyaddr[1][3]);
 			fm_info_set_phy_address(FM1_DTSEC10,
-						QSGMII_CARD_PHY_ADDR);
+						slot_qsgmii_phyaddr[1][2]);
 		}
 		break;
 	case 40:
 	case 46:
 	case 48:
-		fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
+		fm_info_set_phy_address(FM1_DTSEC5, slot_qsgmii_phyaddr[1][0]);
+		fm_info_set_phy_address(FM1_DTSEC6, slot_qsgmii_phyaddr[1][1]);
 		if ((srds_prtcl_s2 != 56) && (srds_prtcl_s2 != 57)) {
 			fm_info_set_phy_address(FM1_DTSEC10,
-						SGMII_CARD_PORT3_PHY_ADDR);
+						slot_qsgmii_phyaddr[1][3]);
 			fm_info_set_phy_address(FM1_DTSEC9,
-						SGMII_CARD_PORT4_PHY_ADDR);
+						slot_qsgmii_phyaddr[1][2]);
 		}
-		fm_info_set_phy_address(FM1_DTSEC1, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC2, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC3, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM1_DTSEC4, QSGMII_CARD_PHY_ADDR);
+		fm_info_set_phy_address(FM1_DTSEC1, slot_qsgmii_phyaddr[2][0]);
+		fm_info_set_phy_address(FM1_DTSEC2, slot_qsgmii_phyaddr[2][1]);
+		fm_info_set_phy_address(FM1_DTSEC3, slot_qsgmii_phyaddr[2][2]);
+		fm_info_set_phy_address(FM1_DTSEC4, slot_qsgmii_phyaddr[2][3]);
 		break;
 	default:
 		puts("Invalid SerDes1 protocol for T4240QDS\n");
@@ -293,7 +513,7 @@ int board_eth_init(bd_t *bis)
 	}
 
 	for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
-		int idx = i - FM1_DTSEC1, lane, slot;
+		idx = i - FM1_DTSEC1;
 		switch (fm_info_get_enet_if(i)) {
 		case PHY_INTERFACE_MODE_SGMII:
 			lane = serdes_get_first_lane(FSL_SRDS_1,
@@ -334,8 +554,16 @@ int board_eth_init(bd_t *bis)
 	}
 
 	for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
+		idx = i - FM1_10GEC1;
 		switch (fm_info_get_enet_if(i)) {
 		case PHY_INTERFACE_MODE_XGMII:
+			lane = serdes_get_first_lane(FSL_SRDS_1,
+						XAUI_FM1_MAC9 + idx);
+			if (lane < 0)
+				break;
+			slot = lane_to_slot_fsm1[lane];
+			if (QIXIS_READ(present2) & (1 << (slot - 1)))
+				fm_disable_port(i);
 			mdio_mux[i] = EMI2;
 			fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
 			break;
@@ -344,7 +572,6 @@ int board_eth_init(bd_t *bis)
 		}
 	}
 
-
 #if (CONFIG_SYS_NUM_FMAN == 2)
 	switch (srds_prtcl_s2) {
 	case 1:
@@ -364,68 +591,64 @@ int board_eth_init(bd_t *bis)
 	case 26:
 		/* XAUI/HiGig in Slot3, SGMII in Slot4 */
 		fm_info_set_phy_address(FM2_10GEC1, FM2_10GEC1_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC1, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC3, SGMII_CARD_PORT3_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC4, SGMII_CARD_PORT4_PHY_ADDR);
+		fm_info_set_phy_address(FM2_DTSEC1, slot_qsgmii_phyaddr[4][0]);
+		fm_info_set_phy_address(FM2_DTSEC2, slot_qsgmii_phyaddr[4][1]);
+		fm_info_set_phy_address(FM2_DTSEC3, slot_qsgmii_phyaddr[4][2]);
+		fm_info_set_phy_address(FM2_DTSEC4, slot_qsgmii_phyaddr[4][3]);
 		break;
 	case 28:
 	case 36:
 		/* SGMII in Slot3 and Slot4 */
-		fm_info_set_phy_address(FM2_DTSEC1, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC3, SGMII_CARD_PORT3_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC4, SGMII_CARD_PORT4_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC5, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC9, SGMII_CARD_PORT4_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC10, SGMII_CARD_PORT3_PHY_ADDR);
+		fm_info_set_phy_address(FM2_DTSEC1, slot_qsgmii_phyaddr[4][0]);
+		fm_info_set_phy_address(FM2_DTSEC2, slot_qsgmii_phyaddr[4][1]);
+		fm_info_set_phy_address(FM2_DTSEC3, slot_qsgmii_phyaddr[4][2]);
+		fm_info_set_phy_address(FM2_DTSEC4, slot_qsgmii_phyaddr[4][3]);
+		fm_info_set_phy_address(FM2_DTSEC5, slot_qsgmii_phyaddr[3][0]);
+		fm_info_set_phy_address(FM2_DTSEC6, slot_qsgmii_phyaddr[3][1]);
+		fm_info_set_phy_address(FM2_DTSEC9, slot_qsgmii_phyaddr[3][3]);
+		fm_info_set_phy_address(FM2_DTSEC10, slot_qsgmii_phyaddr[3][2]);
 		break;
 	case 38:
 		/* QSGMII in Slot3 and Slot4 */
-		fm_info_set_phy_address(FM2_DTSEC1, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC2, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC3, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC4, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC5, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC6, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC9, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC10, QSGMII_CARD_PHY_ADDR);
+		fm_info_set_phy_address(FM2_DTSEC1, slot_qsgmii_phyaddr[4][0]);
+		fm_info_set_phy_address(FM2_DTSEC2, slot_qsgmii_phyaddr[4][1]);
+		fm_info_set_phy_address(FM2_DTSEC3, slot_qsgmii_phyaddr[4][2]);
+		fm_info_set_phy_address(FM2_DTSEC4, slot_qsgmii_phyaddr[4][3]);
+		fm_info_set_phy_address(FM2_DTSEC5, slot_qsgmii_phyaddr[3][0]);
+		fm_info_set_phy_address(FM2_DTSEC6, slot_qsgmii_phyaddr[3][1]);
+		fm_info_set_phy_address(FM2_DTSEC9, slot_qsgmii_phyaddr[3][3]);
+		fm_info_set_phy_address(FM2_DTSEC10, slot_qsgmii_phyaddr[3][2]);
 		break;
 	case 40:
 	case 46:
 	case 48:
 		/* SGMII in Slot3 */
-		fm_info_set_phy_address(FM2_DTSEC5, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC9, SGMII_CARD_PORT4_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC10, SGMII_CARD_PORT3_PHY_ADDR);
+		fm_info_set_phy_address(FM2_DTSEC5, slot_qsgmii_phyaddr[3][0]);
+		fm_info_set_phy_address(FM2_DTSEC6, slot_qsgmii_phyaddr[3][1]);
+		fm_info_set_phy_address(FM2_DTSEC9, slot_qsgmii_phyaddr[3][3]);
+		fm_info_set_phy_address(FM2_DTSEC10, slot_qsgmii_phyaddr[3][2]);
 		/* QSGMII in Slot4 */
-		fm_info_set_phy_address(FM2_DTSEC1, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC2, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC3, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC4, QSGMII_CARD_PHY_ADDR);
+		fm_info_set_phy_address(FM2_DTSEC1, slot_qsgmii_phyaddr[4][0]);
+		fm_info_set_phy_address(FM2_DTSEC2, slot_qsgmii_phyaddr[4][1]);
+		fm_info_set_phy_address(FM2_DTSEC3, slot_qsgmii_phyaddr[4][2]);
+		fm_info_set_phy_address(FM2_DTSEC4, slot_qsgmii_phyaddr[4][3]);
 		break;
 	case 50:
 	case 52:
 	case 54:
 		fm_info_set_phy_address(FM2_10GEC1, FM2_10GEC1_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC1, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC2, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC3, QSGMII_CARD_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC4, QSGMII_CARD_PHY_ADDR);
+		fm_info_set_phy_address(FM2_DTSEC1, slot_qsgmii_phyaddr[4][0]);
+		fm_info_set_phy_address(FM2_DTSEC2, slot_qsgmii_phyaddr[4][1]);
+		fm_info_set_phy_address(FM2_DTSEC3, slot_qsgmii_phyaddr[4][2]);
+		fm_info_set_phy_address(FM2_DTSEC4, slot_qsgmii_phyaddr[4][3]);
 		break;
 	case 56:
 	case 57:
 		/* XFI in Slot3, SGMII in Slot4 */
-		fm_info_set_phy_address(FM1_10GEC1, XFI_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM1_10GEC2, XFI_CARD_PORT2_PHY_ADDR);
-		fm_info_set_phy_address(FM2_10GEC2, XFI_CARD_PORT3_PHY_ADDR);
-		fm_info_set_phy_address(FM2_10GEC1, XFI_CARD_PORT4_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC1, SGMII_CARD_PORT1_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC3, SGMII_CARD_PORT3_PHY_ADDR);
-		fm_info_set_phy_address(FM2_DTSEC4, SGMII_CARD_PORT4_PHY_ADDR);
+		fm_info_set_phy_address(FM2_DTSEC1, slot_qsgmii_phyaddr[4][0]);
+		fm_info_set_phy_address(FM2_DTSEC2, slot_qsgmii_phyaddr[4][1]);
+		fm_info_set_phy_address(FM2_DTSEC3, slot_qsgmii_phyaddr[4][2]);
+		fm_info_set_phy_address(FM2_DTSEC4, slot_qsgmii_phyaddr[4][3]);
 		break;
 	default:
 		puts("Invalid SerDes2 protocol for T4240QDS\n");
@@ -433,7 +656,7 @@ int board_eth_init(bd_t *bis)
 	}
 
 	for (i = FM2_DTSEC1; i < FM2_DTSEC1 + CONFIG_SYS_NUM_FM2_DTSEC; i++) {
-		int idx = i - FM2_DTSEC1, lane, slot;
+		idx = i - FM2_DTSEC1;
 		switch (fm_info_get_enet_if(i)) {
 		case PHY_INTERFACE_MODE_SGMII:
 			lane = serdes_get_first_lane(FSL_SRDS_2,
@@ -477,8 +700,16 @@ int board_eth_init(bd_t *bis)
 	}
 
 	for (i = FM2_10GEC1; i < FM2_10GEC1 + CONFIG_SYS_NUM_FM2_10GEC; i++) {
+		idx = i - FM2_10GEC1;
 		switch (fm_info_get_enet_if(i)) {
 		case PHY_INTERFACE_MODE_XGMII:
+			lane = serdes_get_first_lane(FSL_SRDS_2,
+						XAUI_FM2_MAC9 + idx);
+			if (lane < 0)
+				break;
+			slot = lane_to_slot_fsm2[lane];
+			if (QIXIS_READ(present2) & (1 << (slot - 1)))
+				fm_disable_port(i);
 			mdio_mux[i] = EMI2;
 			fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
 			break;
diff --git a/board/freescale/t4qds/law.c b/board/freescale/t4qds/law.c
index 6f2c5c86b4d..f3848f3921a 100644
--- a/board/freescale/t4qds/law.c
+++ b/board/freescale/t4qds/law.c
@@ -37,7 +37,8 @@ struct law_entry law_table[] = {
 #endif
 	SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
-	SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
+	/* Limit DCSR to 32M to access NPC Trace Buffer */
+	SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
 #endif
 #ifdef CONFIG_SYS_NAND_BASE_PHYS
 	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
diff --git a/board/freescale/t4qds/t4240qds_qixis.h b/board/freescale/t4qds/t4240qds_qixis.h
index efb718d2c39..485353d5ada 100644
--- a/board/freescale/t4qds/t4240qds_qixis.h
+++ b/board/freescale/t4qds/t4240qds_qixis.h
@@ -42,7 +42,7 @@
 #define QIXIS_DDRCLK_125		0x2
 #define QIXIS_DDRCLK_133		0x3
 
-#define BRDCFG5_RESET			0x00
+#define BRDCFG5_IRE			0x20	/* i2c Remote i2c1 enable */
 
 #define BRDCFG12_SD3EN_MASK		0x20
 #define BRDCFG12_SD3MX_MASK		0x08
diff --git a/board/freescale/t4qds/t4_pbi.cfg b/board/freescale/t4qds/t4_pbi.cfg
new file mode 100644
index 00000000000..c598fb5afd8
--- /dev/null
+++ b/board/freescale/t4qds/t4_pbi.cfg
@@ -0,0 +1,36 @@
+#PBI commands
+#Initialize CPC1
+09010000 00200400
+09138000 00000000
+091380c0 00000100
+#512KB SRAM
+09010100 00000000
+09010104 fff80009
+09010f00 08000000
+#enable CPC1
+09010000 80000000
+#Configure LAW for CPC1
+09000d00 00000000
+09000d04 fff80000
+09000d08 81000012
+#workaround for IFC bus speed
+091241c0 f03f3f3f
+091241c4 ff003f3f
+09124010 00000101
+09124130 0000000c
+#workaround for SERDES A-006031
+090ea000 064740e6
+090ea020 064740e6
+090eb000 064740e6
+090eb020 064740e6
+090ec000 064740e6
+090ec020 064740e6
+090ed000 064740e6
+090ed020 064740e6
+#Configure alternate space
+09000010 00000000
+09000014 ff000000
+09000018 81000000
+#Flush PBL data
+09138000 00000000
+091380c0 00000000
diff --git a/board/freescale/t4qds/t4_rcw.cfg b/board/freescale/t4qds/t4_rcw.cfg
new file mode 100644
index 00000000000..6ac95ffd522
--- /dev/null
+++ b/board/freescale/t4qds/t4_rcw.cfg
@@ -0,0 +1,7 @@
+#PBL preamble and RCW header
+aa55aa55 010e0100
+#serdes protocol  1_28_6_12
+14180019 0c101916 00000000 00000000
+04383060 30548c00 6c020000 19000000
+00000000 ee0000ee 00000000 000187fc
+00000000 00000000 00000000 00000018
diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index 3c95f3fb785..f0f280b253d 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -110,7 +110,7 @@ int checkboard(void)
 	for (i = 0; i < MAX_SERDES; i++) {
 		static const char *freq[] = {
 			"100", "125", "156.25", "161.1328125"};
-		unsigned int clock = (sw >> (2 * i)) & 3;
+		unsigned int clock = (sw >> (6 - 2 * i)) & 3;
 
 		printf("SERDES%u=%sMHz ", i+1, freq[clock]);
 	}
@@ -132,6 +132,243 @@ int select_i2c_ch_pca9547(u8 ch)
 	return 0;
 }
 
+/*
+ * read_voltage from sensor on I2C bus
+ * We use average of 4 readings, waiting for 532us befor another reading
+ */
+#define NUM_READINGS	4	/* prefer to be power of 2 for efficiency */
+#define WAIT_FOR_ADC	532	/* wait for 532 microseconds for ADC */
+
+static inline int read_voltage(void)
+{
+	int i, ret, voltage_read = 0;
+	u16 vol_mon;
+
+	for (i = 0; i < NUM_READINGS; i++) {
+		ret = i2c_read(I2C_VOL_MONITOR_ADDR,
+			I2C_VOL_MONITOR_BUS_V_OFFSET, 1, (void *)&vol_mon, 2);
+		if (ret) {
+			printf("VID: failed to read core voltage\n");
+			return ret;
+		}
+		if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) {
+			printf("VID: Core voltage sensor error\n");
+			return -1;
+		}
+		debug("VID: bus voltage reads 0x%04x\n", vol_mon);
+		/* LSB = 4mv */
+		voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4;
+		udelay(WAIT_FOR_ADC);
+	}
+	/* calculate the average */
+	voltage_read /= NUM_READINGS;
+
+	return voltage_read;
+}
+
+/*
+ * We need to calculate how long before the voltage starts to drop or increase
+ * It returns with the loop count. Each loop takes several readings (532us)
+ */
+static inline int wait_for_voltage_change(int vdd_last)
+{
+	int timeout, vdd_current;
+
+	vdd_current = read_voltage();
+	/* wait until voltage starts to drop */
+	for (timeout = 0; abs(vdd_last - vdd_current) <= 4 &&
+		timeout < 100; timeout++) {
+		vdd_current = read_voltage();
+	}
+	if (timeout >= 100) {
+		printf("VID: Voltage adjustment timeout\n");
+		return -1;
+	}
+	return timeout;
+}
+
+/*
+ * argument 'wait' is the time we know the voltage difference can be measured
+ * this function keeps reading the voltage until it is stable
+ */
+static inline int wait_for_voltage_stable(int wait)
+{
+	int timeout, vdd_current, vdd_last;
+
+	vdd_last = read_voltage();
+	udelay(wait * NUM_READINGS * WAIT_FOR_ADC);
+	/* wait until voltage is stable */
+	vdd_current = read_voltage();
+	for (timeout = 0; abs(vdd_last - vdd_current) >= 4 &&
+		timeout < 100; timeout++) {
+		vdd_last = vdd_current;
+		udelay(wait * NUM_READINGS * WAIT_FOR_ADC);
+		vdd_current = read_voltage();
+	}
+	if (timeout >= 100) {
+		printf("VID: Voltage adjustment timeout\n");
+		return -1;
+	}
+
+	return vdd_current;
+}
+
+static inline int set_voltage(u8 vid)
+{
+	int wait, vdd_last;
+
+	vdd_last = read_voltage();
+	QIXIS_WRITE(brdcfg[6], vid);
+	wait = wait_for_voltage_change(vdd_last);
+	if (wait < 0)
+		return -1;
+	debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC);
+	wait = wait ? wait : 1;
+
+	vdd_last = wait_for_voltage_stable(wait);
+	if (vdd_last < 0)
+		return -1;
+	debug("VID: Current voltage is %d mV\n", vdd_last);
+
+	return vdd_last;
+}
+
+
+static int adjust_vdd(ulong vdd_override)
+{
+	int re_enable = disable_interrupts();
+	ccsr_gur_t __iomem *gur =
+		(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	u32 fusesr;
+	u8 vid, vid_current;
+	int vdd_target, vdd_current, vdd_last;
+	int ret;
+	unsigned long vdd_string_override;
+	char *vdd_string;
+	static const uint16_t vdd[32] = {
+		0,	/* unused */
+		9875,	/* 0.9875V */
+		9750,
+		9625,
+		9500,
+		9375,
+		9250,
+		9125,
+		9000,
+		8875,
+		8750,
+		8625,
+		8500,
+		8375,
+		8250,
+		8125,
+		10000,	/* 1.0000V */
+		10125,
+		10250,
+		10375,
+		10500,
+		10625,
+		10750,
+		10875,
+		11000,
+		0,	/* reserved */
+	};
+	struct vdd_drive {
+		u8 vid;
+		unsigned voltage;
+	};
+
+	ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR);
+	if (ret) {
+		debug("VID: I2c failed to switch channel\n");
+		ret = -1;
+		goto exit;
+	}
+
+	/* get the voltage ID from fuse status register */
+	fusesr = in_be32(&gur->dcfg_fusesr);
+	vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) &
+		FSL_CORENET_DCFG_FUSESR_VID_MASK;
+	if (vid == FSL_CORENET_DCFG_FUSESR_VID_MASK) {
+		vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) &
+			FSL_CORENET_DCFG_FUSESR_ALTVID_MASK;
+	}
+	vdd_target = vdd[vid];
+
+	/* check override variable for overriding VDD */
+	vdd_string = getenv("t4240qds_vdd_mv");
+	if (vdd_override == 0 && vdd_string &&
+	    !strict_strtoul(vdd_string, 10, &vdd_string_override))
+		vdd_override = vdd_string_override;
+	if (vdd_override >= 819 && vdd_override <= 1212) {
+		vdd_target = vdd_override * 10; /* convert to 1/10 mV */
+		debug("VDD override is %lu\n", vdd_override);
+	} else if (vdd_override != 0) {
+		printf("Invalid value.\n");
+	}
+
+	if (vdd_target == 0) {
+		debug("VID: VID not used\n");
+		ret = 0;
+		goto exit;
+	} else {
+		/* round up and divice by 10 to get a value in mV */
+		vdd_target = DIV_ROUND_UP(vdd_target, 10);
+		debug("VID: vid = %d mV\n", vdd_target);
+	}
+
+	/*
+	 * Check current board VID setting
+	 * Voltage regulator support output to 6.250mv step
+	 * The highes voltage allowed for this board is (vid=0x40) 1.21250V
+	 * the lowest is (vid=0x7f) 0.81875V
+	 */
+	vid_current =  QIXIS_READ(brdcfg[6]);
+	vdd_current = 121250 - (vid_current - 0x40) * 625;
+	debug("VID: Current vid setting is (0x%x) %d mV\n",
+	      vid_current, vdd_current/100);
+
+	/*
+	 * Read voltage monitor to check real voltage.
+	 * Voltage monitor LSB is 4mv.
+	 */
+	vdd_last = read_voltage();
+	if (vdd_last < 0) {
+		printf("VID: Could not read voltage sensor abort VID adjustment\n");
+		ret = -1;
+		goto exit;
+	}
+	debug("VID: Core voltage is at %d mV\n", vdd_last);
+	/*
+	 * Adjust voltage to at or 8mV above target.
+	 * Each step of adjustment is 6.25mV.
+	 * Stepping down too fast may cause over current.
+	 */
+	while (vdd_last > 0 && vid_current < 0x80 &&
+		vdd_last > (vdd_target + 8)) {
+		vid_current++;
+		vdd_last = set_voltage(vid_current);
+	}
+	/*
+	 * Check if we need to step up
+	 * This happens when board voltage switch was set too low
+	 */
+	while (vdd_last > 0 && vid_current >= 0x40 &&
+		vdd_last < vdd_target + 2) {
+		vid_current--;
+		vdd_last = set_voltage(vid_current);
+	}
+	if (vdd_last > 0)
+		printf("VID: Core voltage %d mV\n", vdd_last);
+	else
+		ret = -1;
+
+exit:
+	if (re_enable)
+		enable_interrupts();
+	return ret;
+}
+
 /* Configure Crossbar switches for Front-Side SerDes Ports */
 int config_frontside_crossbar_vsc3316(void)
 {
@@ -282,8 +519,15 @@ int board_early_init_r(void)
 	setup_portals();
 #endif
 
-	/* Disable remote I2C connectoin */
-	QIXIS_WRITE(brdcfg[5], BRDCFG5_RESET);
+	/* Disable remote I2C connection to qixis fpga */
+	QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE);
+
+	/*
+	 * Adjust core voltage according to voltage ID
+	 * This function changes I2C mux to channel 2.
+	 */
+	if (adjust_vdd(0))
+		printf("Warning: Adjusting core voltage failed.\n");
 
 	/* Configure board SERDES ports crossbar */
 	config_frontside_crossbar_vsc3316();
@@ -296,6 +540,20 @@ int board_early_init_r(void)
 unsigned long get_board_sys_clk(void)
 {
 	u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+#ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
+	/* use accurate clock measurement */
+	int freq = QIXIS_READ(clk_freq[0]) << 8 | QIXIS_READ(clk_freq[1]);
+	int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]);
+	u32 val;
+
+	val =  freq * base;
+	if (val) {
+		debug("SYS Clock measurement is: %d\n", val);
+		return val;
+	} else {
+		printf("Warning: SYS clock measurement is invalid, using value from brdcfg1.\n");
+	}
+#endif
 
 	switch (sysclk_conf & 0x0F) {
 	case QIXIS_SYSCLK_83:
@@ -319,6 +577,20 @@ unsigned long get_board_sys_clk(void)
 unsigned long get_board_ddr_clk(void)
 {
 	u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+#ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
+	/* use accurate clock measurement */
+	int freq = QIXIS_READ(clk_freq[2]) << 8 | QIXIS_READ(clk_freq[3]);
+	int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]);
+	u32 val;
+
+	val =  freq * base;
+	if (val) {
+		debug("DDR Clock measurement is: %d\n", val);
+		return val;
+	} else {
+		printf("Warning: DDR clock measurement is invalid, using value from brdcfg1.\n");
+	}
+#endif
 
 	switch ((ddrclk_conf & 0x30) >> 4) {
 	case QIXIS_DDRCLK_100:
@@ -357,7 +629,7 @@ int misc_init_r(void)
 
 	sw = QIXIS_READ(brdcfg[2]);
 	for (i = 0; i < MAX_SERDES; i++) {
-		unsigned int clock = (sw >> (2 * i)) & 3;
+		unsigned int clock = (sw >> (6 - 2 * i)) & 3;
 		switch (clock) {
 		case 0:
 			actual[i] = SRDS_PLLCR0_RFCK_SEL_100;
@@ -414,6 +686,106 @@ void ft_board_setup(void *blob, bd_t *bd)
 }
 
 /*
+ * This function is called by bdinfo to print detail board information.
+ * As an exmaple for future board, we organize the messages into
+ * several sections. If applicable, the message is in the format of
+ * <name>      = <value>
+ * It should aligned with normal output of bdinfo command.
+ *
+ * Voltage: Core, DDR and another configurable voltages
+ * Clock  : Critical clocks which are not printed already
+ * RCW    : RCW source if not printed already
+ * Misc   : Other important information not in above catagories
+ */
+void board_detail(void)
+{
+	int i;
+	u8 brdcfg[16], dutcfg[16], rst_ctl;
+	int vdd, rcwsrc;
+	static const char * const clk[] = {"66.67", "100", "125", "133.33"};
+
+	for (i = 0; i < 16; i++) {
+		brdcfg[i] = qixis_read(offsetof(struct qixis, brdcfg[0]) + i);
+		dutcfg[i] = qixis_read(offsetof(struct qixis, dutcfg[0]) + i);
+	}
+
+	/* Voltage secion */
+	if (!select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR)) {
+		vdd = read_voltage();
+		if (vdd > 0)
+			printf("Core voltage= %d mV\n", vdd);
+		select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	}
+
+	printf("XVDD        = 1.%d V\n", ((brdcfg[8] & 0xf) - 4) * 5 + 25);
+
+	/* clock section */
+	printf("SYSCLK      = %s MHz\nDDRCLK      = %s MHz\n",
+	       clk[(brdcfg[11] >> 2) & 0x3], clk[brdcfg[11] & 3]);
+
+	/* RCW section */
+	rcwsrc = (dutcfg[0] << 1) + (dutcfg[1] & 1);
+	puts("RCW source  = ");
+	switch (rcwsrc) {
+	case 0x017:
+	case 0x01f:
+		puts("8-bit NOR\n");
+		break;
+	case 0x027:
+	case 0x02F:
+		puts("16-bit NOR\n");
+		break;
+	case 0x040:
+		puts("SDHC/eMMC\n");
+		break;
+	case 0x044:
+		puts("SPI 16-bit addressing\n");
+		break;
+	case 0x045:
+		puts("SPI 24-bit addressing\n");
+		break;
+	case 0x048:
+		puts("I2C normal addressing\n");
+		break;
+	case 0x049:
+		puts("I2C extended addressing\n");
+		break;
+	case 0x108:
+	case 0x109:
+	case 0x10a:
+	case 0x10b:
+		puts("8-bit NAND, 2KB\n");
+		break;
+	default:
+		if ((rcwsrc >= 0x080) && (rcwsrc <= 0x09f))
+			puts("Hard-coded RCW\n");
+		else if ((rcwsrc >= 0x110) && (rcwsrc <= 0x11f))
+			puts("8-bit NAND, 4KB\n");
+		else
+			puts("unknown\n");
+		break;
+	}
+
+	/* Misc section */
+	rst_ctl = QIXIS_READ(rst_ctl);
+	puts("HRESET_REQ  = ");
+	switch (rst_ctl & 0x30) {
+	case 0x00:
+		puts("Ignored\n");
+		break;
+	case 0x10:
+		puts("Assert HRESET\n");
+		break;
+	case 0x30:
+		puts("Reset system\n");
+		break;
+	default:
+		puts("N/A\n");
+		break;
+	}
+}
+
+/*
  * Reverse engineering switch settings.
  * Some bits cannot be figured out. They will be displayed as
  * underscore in binary format. mask[] has those bits.
@@ -429,7 +801,7 @@ void qixis_dump_switch(void)
 	 * Any bit with 1 means that bit cannot be reverse engineered.
 	 * It will be displayed as _ in binary format.
 	 */
-	static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xdf, 0x3f, 0x1f};
+	static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xcf, 0x3f, 0x1f};
 	char buf[10];
 	u8 brdcfg[16], dutcfg[16];
 
@@ -460,7 +832,8 @@ void qixis_dump_switch(void)
 	sw[5] = ((brdcfg[0] & 0x0f) << 4)	| \
 		((QIXIS_READ(rst_ctl) & 0x30) >> 2) | \
 		((brdcfg[0] & 0x40) >> 5);
-	sw[6] = (brdcfg[11] & 0x20);
+	sw[6] = (brdcfg[11] & 0x20)		|
+		((brdcfg[5] & 0x02) << 3);
 	sw[7] = (((~QIXIS_READ(rst_ctl)) & 0x40) << 1) | \
 		((brdcfg[5] & 0x10) << 2);
 	sw[8] = ((brdcfg[12] & 0x08) << 4)	| \
@@ -472,3 +845,23 @@ void qixis_dump_switch(void)
 			i + 1, byte_to_binary_mask(sw[i], mask[i], buf), sw[i]);
 	}
 }
+
+static int do_vdd_adjust(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	ulong override;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+	if (!strict_strtoul(argv[1], 10, &override))
+		adjust_vdd(override);	/* the value is checked by callee */
+	else
+		return CMD_RET_USAGE;
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	vdd_override, 2, 0, do_vdd_adjust,
+	"Override VDD",
+	"- override with the voltage specified in mV, eg. 1050"
+);
diff --git a/board/freescale/t4qds/tlb.c b/board/freescale/t4qds/tlb.c
index 80eb511e1d3..92c01cf95c7 100644
--- a/board/freescale/t4qds/tlb.c
+++ b/board/freescale/t4qds/tlb.c
@@ -115,7 +115,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
 	SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		      0, 13, BOOKE_PAGESZ_4M, 1),
+		      0, 13, BOOKE_PAGESZ_32M, 1),
 #endif
 #ifdef CONFIG_SYS_NAND_BASE
 	/*
diff --git a/board/genesi/mx51_efikamx/imximage_mx.cfg b/board/genesi/mx51_efikamx/imximage_mx.cfg
index 21ff6d678e5..01735359a5d 100644
--- a/board/genesi/mx51_efikamx/imximage_mx.cfg
+++ b/board/genesi/mx51_efikamx/imximage_mx.cfg
@@ -26,7 +26,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/genesi/mx51_efikamx/imximage_sb.cfg b/board/genesi/mx51_efikamx/imximage_sb.cfg
index 7ddd0b15b1b..5c46769b499 100644
--- a/board/genesi/mx51_efikamx/imximage_sb.cfg
+++ b/board/genesi/mx51_efikamx/imximage_sb.cfg
@@ -26,7 +26,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/iomega/iconnect/kwbimage.cfg b/board/iomega/iconnect/kwbimage.cfg
index 4b64dab5925..1b66207b743 100644
--- a/board/iomega/iconnect/kwbimage.cfg
+++ b/board/iomega/iconnect/kwbimage.cfg
@@ -19,7 +19,7 @@
 # You should have received a copy of the GNU General Public License
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/karo/tk71/kwbimage.cfg b/board/karo/tk71/kwbimage.cfg
index 0166826e728..9a9cf9defc7 100644
--- a/board/karo/tk71/kwbimage.cfg
+++ b/board/karo/tk71/kwbimage.cfg
@@ -24,7 +24,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/keymile/km_arm/kwbimage-memphis.cfg b/board/keymile/km_arm/kwbimage-memphis.cfg
index 5aa0de2528d..63822a5cf69 100644
--- a/board/keymile/km_arm/kwbimage-memphis.cfg
+++ b/board/keymile/km_arm/kwbimage-memphis.cfg
@@ -23,7 +23,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/keymile/km_arm/kwbimage.cfg b/board/keymile/km_arm/kwbimage.cfg
index e5e9942c1aa..d941d7e7355 100644
--- a/board/keymile/km_arm/kwbimage.cfg
+++ b/board/keymile/km_arm/kwbimage.cfg
@@ -20,7 +20,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/keymile/km_arm/kwbimage_128M16_1.cfg b/board/keymile/km_arm/kwbimage_128M16_1.cfg
index 5de8df70fd6..4c31a0df006 100644
--- a/board/keymile/km_arm/kwbimage_128M16_1.cfg
+++ b/board/keymile/km_arm/kwbimage_128M16_1.cfg
@@ -25,7 +25,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/keymile/km_arm/kwbimage_256M8_1.cfg b/board/keymile/km_arm/kwbimage_256M8_1.cfg
index d0a09f61d2d..31b9203298a 100644
--- a/board/keymile/km_arm/kwbimage_256M8_1.cfg
+++ b/board/keymile/km_arm/kwbimage_256M8_1.cfg
@@ -22,7 +22,7 @@
 # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 # MA 02110-1301 USA
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 # This configuration applies to COGE5 design (ARM-part)
diff --git a/board/raidsonic/ib62x0/kwbimage.cfg b/board/raidsonic/ib62x0/kwbimage.cfg
index bade627ccf5..27a5e314afc 100644
--- a/board/raidsonic/ib62x0/kwbimage.cfg
+++ b/board/raidsonic/ib62x0/kwbimage.cfg
@@ -20,7 +20,7 @@
 # You should have received a copy of the GNU General Public License
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
-# Refer docs/README.kwimage for more details about how-to configure
+# Refer doc/README.kwbimage for more details about how-to configure
 # and create kirkwood boot image
 #
 
diff --git a/board/sorcery/Makefile b/board/sorcery/Makefile
deleted file mode 100644
index e1752e3fa3e..00000000000
--- a/board/sorcery/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2005-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	:= $(BOARD).o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/ttcontrol/vision2/imximage_hynix.cfg b/board/ttcontrol/vision2/imximage_hynix.cfg
index c1de94fa139..64bddbbc2cd 100644
--- a/board/ttcontrol/vision2/imximage_hynix.cfg
+++ b/board/ttcontrol/vision2/imximage_hynix.cfg
@@ -23,7 +23,7 @@
  * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
  * MA 02110-1301 USA
  *
- * Refer docs/README.imxmage for more details about how-to configure
+ * Refer doc/README.imximage for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c
index befbb3a3e59..2f5f20ea32d 100644
--- a/board/xilinx/microblaze-generic/microblaze-generic.c
+++ b/board/xilinx/microblaze-generic/microblaze-generic.c
@@ -31,12 +31,17 @@
 #include <asm/processor.h>
 #include <asm/microblaze_intc.h>
 #include <asm/asm.h>
+#include <asm/gpio.h>
+
+#ifdef CONFIG_XILINX_GPIO
+static int reset_pin = -1;
+#endif
 
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-#ifdef CONFIG_SYS_GPIO_0
-	*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
-	    ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
+#ifdef CONFIG_XILINX_GPIO
+	if (reset_pin != -1)
+		gpio_direction_output(reset_pin, 1);
 #endif
 
 #ifdef CONFIG_XILINX_TB_WATCHDOG
@@ -52,8 +57,10 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 int gpio_init (void)
 {
-#ifdef CONFIG_SYS_GPIO_0
-	*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF;
+#ifdef CONFIG_XILINX_GPIO
+	reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
+	if (reset_pin != -1)
+		gpio_request(reset_pin, "reset_pin");
 #endif
 	return 0;
 }
diff --git a/boards.cfg b/boards.cfg
index 33e7549d0ee..e2a8d42ab43 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -602,9 +602,6 @@ TQM5200_B_HIGHBOOT           powerpc     mpc5xxx     tqm5200             tqc
 TQM5200S                     powerpc     mpc5xxx     tqm5200             tqc            -           TQM5200:TQM5200_B,TQM5200S
 TQM5200S_HIGHBOOT            powerpc     mpc5xxx     tqm5200             tqc            -           TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000
 TQM5200_STK100               powerpc     mpc5xxx     tqm5200             tqc            -           TQM5200:STK52XX_REV100
-Alaska8220                   powerpc     mpc8220     alaska
-sorcery                      powerpc     mpc8220
-Yukon8220                    powerpc     mpc8220     alaska
 A3000                        powerpc     mpc824x     a3000
 CPC45                        powerpc     mpc824x     cpc45               -              -           CPC45
 CPC45_ROMBOOT                powerpc     mpc824x     cpc45               -              -           CPC45:BOOT_ROM
@@ -897,6 +894,9 @@ P5020DS_SECURE_BOOT          powerpc     mpc85xx     corenet_ds          freesca
 P5020DS_SPIFLASH	     powerpc     mpc85xx     corenet_ds          freescale      -           P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
 P5020DS_SRIO_PCIE_BOOT          powerpc     mpc85xx     corenet_ds          freescale      -           P5020DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
 P5040DS                      powerpc     mpc85xx     corenet_ds          freescale
+P5040DS_NAND		     powerpc     mpc85xx     corenet_ds          freescale      -           P5040DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
+P5040DS_SDCARD		     powerpc     mpc85xx     corenet_ds          freescale      -           P5040DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
+P5040DS_SPIFLASH	     powerpc     mpc85xx     corenet_ds          freescale      -           P5040DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
 BSC9131RDB_SPIFLASH          powerpc     mpc85xx     bsc9131rdb          freescale      -           BSC9131RDB:BSC9131RDB,SPIFLASH
 BSC9132QDS_NOR_DDRCLK100     powerpc     mpc85xx     bsc9132qds          freescale      -           BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_100
 BSC9132QDS_NOR_DDRCLK133     powerpc     mpc85xx     bsc9132qds          freescale      -           BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_133
@@ -907,9 +907,12 @@ BSC9132QDS_SPIFLASH_DDRCLK133 powerpc    mpc85xx     bsc9132qds          freesca
 stxgp3                       powerpc     mpc85xx     stxgp3              stx
 stxssa                       powerpc     mpc85xx     stxssa              stx            -           stxssa
 stxssa_4M                    powerpc     mpc85xx     stxssa              stx            -           stxssa:STXSSA_4M
-T4240QDS                     powerpc     mpc85xx     t4qds               freescale
-T4240QDS_SDCARD              powerpc     mpc85xx     t4qds               freescale	-           T4240QDS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
-T4240QDS_SPIFLASH            powerpc     mpc85xx     t4qds               freescale	-           T4240QDS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+T4240QDS                     powerpc     mpc85xx     t4qds               freescale      -           T4240QDS:PPC_T4240
+T4240QDS_SDCARD              powerpc     mpc85xx     t4qds               freescale	-           T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
+T4240QDS_SPIFLASH            powerpc     mpc85xx     t4qds               freescale	-           T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+T4160QDS                     powerpc     mpc85xx     t4qds               freescale      -           T4240QDS:PPC_T4160
+T4160QDS_SDCARD              powerpc     mpc85xx     t4qds               freescale	-           T4240QDS:PPC_T4160,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
+T4160QDS_SPIFLASH            powerpc     mpc85xx     t4qds               freescale	-           T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
 B4860QDS                     powerpc     mpc85xx     b4860qds            freescale      -           B4860QDS:PPC_B4860
 B4860QDS_NAND		     powerpc     mpc85xx     b4860qds            freescale      -           B4860QDS:PPC_B4860,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
 B4860QDS_SPIFLASH            powerpc     mpc85xx     b4860qds            freescale	-           B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
diff --git a/common/Makefile b/common/Makefile
index 1cfb13210f1..3ba43162633 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -165,6 +165,7 @@ COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
 COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o
 COBJS-$(CONFIG_CMD_SHA1SUM) += cmd_sha1sum.o
 COBJS-$(CONFIG_CMD_SETEXPR) += cmd_setexpr.o
+COBJS-$(CONFIG_CMD_SOFTSWITCH) += cmd_softswitch.o
 COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o
 COBJS-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o
 COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o
@@ -231,6 +232,8 @@ COBJS-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o
 COBJS-y += console.o
 COBJS-y += dlmalloc.o
 COBJS-y += image.o
+COBJS-$(CONFIG_OF_LIBFDT) += image-fdt.o
+COBJS-$(CONFIG_FIT) += image-fit.o
 COBJS-y += memsize.o
 COBJS-y += stdio.o
 
diff --git a/common/board_f.c b/common/board_f.c
index 32e59faa027..81edbdf8e45 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -667,27 +667,6 @@ static int setup_board_part1(void)
 #if defined(CONFIG_MPC83xx)
 	bd->bi_immrbar = CONFIG_SYS_IMMR;
 #endif
-#if defined(CONFIG_MPC8220)
-	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
-	bd->bi_inpfreq = gd->arch.inp_clk;
-	bd->bi_pcifreq = gd->pci_clk;
-	bd->bi_vcofreq = gd->arch.vco_clk;
-	bd->bi_pevfreq = gd->arch.pev_clk;
-	bd->bi_flbfreq = gd->arch.flb_clk;
-
-	/* store bootparam to sram (backward compatible), here? */
-	{
-		u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
-
-		*sram++ = gd->ram_size;
-		*sram++ = gd->bus_clk;
-		*sram++ = gd->arch.inp_clk;
-		*sram++ = gd->cpu_clk;
-		*sram++ = gd->arch.vco_clk;
-		*sram++ = gd->arch.flb_clk;
-		*sram++ = 0xb8c3ba11;	/* boot signature */
-	}
-#endif
 
 	return 0;
 }
@@ -921,9 +900,6 @@ static init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_MPC5xxx)
 	prt_mpc5xxx_clks,
 #endif /* CONFIG_MPC5xxx */
-#if defined(CONFIG_MPC8220)
-	prt_mpc8220_clks,
-#endif
 #if defined(CONFIG_DISPLAY_BOARDINFO)
 	checkboard,		/* display board info */
 #endif
diff --git a/common/board_r.c b/common/board_r.c
index f801e411030..fd1fd319b63 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -765,6 +765,7 @@ init_fnc_t init_sequence_r[] = {
 #endif
 	initr_barrier,
 	initr_malloc,
+	bootstage_relocate,
 #ifdef CONFIG_ARCH_EARLY_INIT_R
 	arch_early_init_r,
 #endif
diff --git a/common/bootstage.c b/common/bootstage.c
index a1e09394cc5..c5c69961acc 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -30,6 +30,8 @@
 
 #include <common.h>
 #include <libfdt.h>
+#include <malloc.h>
+#include <linux/compiler.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -56,6 +58,21 @@ struct bootstage_hdr {
 	uint32_t magic;		/* Unused */
 };
 
+int bootstage_relocate(void)
+{
+	int i;
+
+	/*
+	 * Duplicate all strings.  They may point to an old location in the
+	 * program .text section that can eventually get trashed.
+	 */
+	for (i = 0; i < BOOTSTAGE_ID_COUNT; i++)
+		if (record[i].name)
+			record[i].name = strdup(record[i].name);
+
+	return 0;
+}
+
 ulong bootstage_add_record(enum bootstage_id id, const char *name,
 			   int flags, ulong mark)
 {
@@ -102,6 +119,33 @@ ulong bootstage_mark_name(enum bootstage_id id, const char *name)
 	return bootstage_add_record(id, name, flags, timer_get_boot_us());
 }
 
+ulong bootstage_mark_code(const char *file, const char *func, int linenum)
+{
+	char *str, *p;
+	__maybe_unused char *end;
+	int len = 0;
+
+	/* First work out the length we need to allocate */
+	if (linenum != -1)
+		len = 11;
+	if (func)
+		len += strlen(func);
+	if (file)
+		len += strlen(file);
+
+	str = malloc(len + 1);
+	p = str;
+	end = p + len;
+	if (file)
+		p += snprintf(p, end - p, "%s,", file);
+	if (linenum != -1)
+		p += snprintf(p, end - p, "%d", linenum);
+	if (func)
+		p += snprintf(p, end - p, ": %s", func);
+
+	return bootstage_mark_name(BOOTSTAGE_ID_ALLOC, str);
+}
+
 uint32_t bootstage_start(enum bootstage_id id, const char *name)
 {
 	struct bootstage_record *rec = &record[id];
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 85279d5e7b8..17dc96179bb 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -84,6 +84,10 @@ static void print_mhz(const char *name, unsigned long hz)
 }
 
 #if defined(CONFIG_PPC)
+void __weak board_detail(void)
+{
+	/* Please define boot_detail() for your platform */
+}
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
@@ -130,13 +134,6 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #endif
 	print_mhz("busfreq",		bd->bi_busfreq);
 #endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
-#if defined(CONFIG_MPC8220)
-	print_mhz("inpfreq",		bd->bi_inpfreq);
-	print_mhz("flbfreq",		bd->bi_flbfreq);
-	print_mhz("pcifreq",		bd->bi_pcifreq);
-	print_mhz("vcofreq",		bd->bi_vcofreq);
-	print_mhz("pevfreq",		bd->bi_pevfreq);
-#endif
 
 #ifdef CONFIG_ENABLE_36BIT_PHYS
 #ifdef CONFIG_PHYS_64BIT
@@ -169,6 +166,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	printf("IP addr     = %s\n", getenv("ipaddr"));
 	printf("baudrate    = %6u bps\n", bd->bi_baudrate);
 	print_num("relocaddr", gd->relocaddr);
+	board_detail();
 	return 0;
 }
 
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 7438469d091..15f4599d45f 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -36,6 +36,7 @@
 #include <lmb.h>
 #include <linux/ctype.h>
 #include <asm/byteorder.h>
+#include <asm/io.h>
 #include <linux/compiler.h>
 
 #if defined(CONFIG_CMD_USB)
@@ -97,7 +98,7 @@ static image_header_t *image_get_kernel(ulong img_addr, int verify);
 static int fit_check_kernel(const void *fit, int os_noffset, int verify);
 #endif
 
-static void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
+static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 				char * const argv[], bootm_headers_t *images,
 				ulong *os_data, ulong *os_len);
 
@@ -203,8 +204,8 @@ static inline void boot_start_lmb(bootm_headers_t *images) { }
 
 static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	void		*os_hdr;
-	int		ret;
+	const void *os_hdr;
+	int ret;
 
 	memset((void *)&images, 0, sizeof(images));
 	images.verify = getenv_yesno("verify");
@@ -275,7 +276,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]
 #if defined(CONFIG_FIT)
 	} else if (images.fit_uname_os) {
 		ret = fit_image_get_entry(images.fit_hdr_os,
-				images.fit_noffset_os, &images.ep);
+					  images.fit_noffset_os, &images.ep);
 		if (ret) {
 			puts("Can't get entry point property!\n");
 			return 1;
@@ -815,7 +816,7 @@ static int fit_check_kernel(const void *fit, int os_noffset, int verify)
 
 	if (verify) {
 		puts("   Verifying Hash Integrity ... ");
-		if (!fit_image_check_hashes(fit, os_noffset)) {
+		if (!fit_image_verify(fit, os_noffset)) {
 			puts("Bad Data Hash\n");
 			bootstage_error(BOOTSTAGE_ID_FIT_CHECK_HASH);
 			return 0;
@@ -855,14 +856,15 @@ static int fit_check_kernel(const void *fit, int os_noffset, int verify)
  *     pointer to image header if valid image was found, plus kernel start
  *     address and length, otherwise NULL
  */
-static void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
+static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 		char * const argv[], bootm_headers_t *images, ulong *os_data,
 		ulong *os_len)
 {
 	image_header_t	*hdr;
 	ulong		img_addr;
+	const void *buf;
 #if defined(CONFIG_FIT)
-	void		*fit_hdr;
+	const void	*fit_hdr;
 	const char	*fit_uname_config = NULL;
 	const char	*fit_uname_kernel = NULL;
 	const void	*data;
@@ -898,7 +900,8 @@ static void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	/* check image type, for FIT images get FIT kernel node */
 	*os_data = *os_len = 0;
-	switch (genimg_get_format((void *)img_addr)) {
+	buf = map_sysmem(img_addr, 0);
+	switch (genimg_get_format(buf)) {
 	case IMAGE_FORMAT_LEGACY:
 		printf("## Booting kernel from Legacy Image at %08lx ...\n",
 				img_addr);
@@ -943,7 +946,7 @@ static void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 		break;
 #if defined(CONFIG_FIT)
 	case IMAGE_FORMAT_FIT:
-		fit_hdr = (void *)img_addr;
+		fit_hdr = buf;
 		printf("## Booting kernel from FIT Image at %08lx ...\n",
 				img_addr);
 
@@ -1020,7 +1023,7 @@ static void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 
 		*os_len = len;
 		*os_data = (ulong)data;
-		images->fit_hdr_os = fit_hdr;
+		images->fit_hdr_os = (void *)fit_hdr;
 		images->fit_uname_os = fit_uname_kernel;
 		images->fit_noffset_os = os_noffset;
 		break;
@@ -1034,7 +1037,7 @@ static void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 	debug("   kernel data at 0x%08lx, len = 0x%08lx (%ld)\n",
 			*os_data, *os_len, *os_len);
 
-	return (void *)img_addr;
+	return buf;
 }
 
 #ifdef CONFIG_SYS_LONGHELP
@@ -1169,7 +1172,7 @@ static int image_info(ulong addr)
 
 		fit_print_contents(hdr);
 
-		if (!fit_all_image_check_hashes(hdr)) {
+		if (!fit_all_image_verify(hdr)) {
 			puts("Bad hash in FIT image!\n");
 			return 1;
 		}
@@ -1420,9 +1423,14 @@ U_BOOT_CMD(
 /* helper routines */
 /*******************************************************************/
 #if defined(CONFIG_SILENT_CONSOLE) && !defined(CONFIG_SILENT_U_BOOT_ONLY)
+
+#define CONSOLE_ARG     "console="
+#define CONSOLE_ARG_LEN (sizeof(CONSOLE_ARG) - 1)
+
 static void fixup_silent_linux(void)
 {
-	char buf[256], *start, *end;
+	char *buf;
+	const char *env_val;
 	char *cmdline = getenv("bootargs");
 
 	/* Only fix cmdline when requested */
@@ -1430,25 +1438,37 @@ static void fixup_silent_linux(void)
 		return;
 
 	debug("before silent fix-up: %s\n", cmdline);
-	if (cmdline) {
-		start = strstr(cmdline, "console=");
+	if (cmdline && (cmdline[0] != '\0')) {
+		char *start = strstr(cmdline, CONSOLE_ARG);
+
+		/* Allocate space for maximum possible new command line */
+		buf = malloc(strlen(cmdline) + 1 + CONSOLE_ARG_LEN + 1);
+		if (!buf) {
+			debug("%s: out of memory\n", __func__);
+			return;
+		}
+
 		if (start) {
-			end = strchr(start, ' ');
-			strncpy(buf, cmdline, (start - cmdline + 8));
+			char *end = strchr(start, ' ');
+			int num_start_bytes = start - cmdline + CONSOLE_ARG_LEN;
+
+			strncpy(buf, cmdline, num_start_bytes);
 			if (end)
-				strcpy(buf + (start - cmdline + 8), end);
+				strcpy(buf + num_start_bytes, end);
 			else
-				buf[start - cmdline + 8] = '\0';
+				buf[num_start_bytes] = '\0';
 		} else {
-			strcpy(buf, cmdline);
-			strcat(buf, " console=");
+			sprintf(buf, "%s %s", cmdline, CONSOLE_ARG);
 		}
+		env_val = buf;
 	} else {
-		strcpy(buf, "console=");
+		buf = NULL;
+		env_val = CONSOLE_ARG;
 	}
 
-	setenv("bootargs", buf);
-	debug("after silent fix-up: %s\n", buf);
+	setenv("bootargs", env_val);
+	debug("after silent fix-up: %s\n", env_val);
+	free(buf);
 }
 #endif /* CONFIG_SILENT_CONSOLE */
 
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index 5e1d0378536..3cd1b13b337 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -210,8 +210,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 				}
 
 				/* verify integrity */
-				if (!fit_image_check_hashes(fit_hdr, noffset)) {
-					puts("Bad Data Hash\n");
+				if (!fit_image_verify(fit_hdr, noffset)) {
+					puts ("Bad Data Hash\n");
 					return 1;
 				}
 
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index 64dd76a0f5d..6df00b15d3f 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -445,7 +445,7 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #endif
 
 	bytes = size * count;
-	buf = map_sysmem(addr, bytes);
+	buf = map_sysmem(dest, bytes);
 	src = map_sysmem(addr, bytes);
 	while (count-- > 0) {
 		if (size == 4)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index f8dc38e89a2..2478c95b736 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -314,7 +314,7 @@ int setenv(const char *varname, const char *varvalue)
 /**
  * Set an environment variable to an integer value
  *
- * @param varname	Environmet variable to set
+ * @param varname	Environment variable to set
  * @param value		Value to set it to
  * @return 0 if ok, 1 on error
  */
@@ -329,7 +329,7 @@ int setenv_ulong(const char *varname, ulong value)
 /**
  * Set an environment variable to an value in hex
  *
- * @param varname	Environmet variable to set
+ * @param varname	Environment variable to set
  * @param value		Value to set it to
  * @return 0 if ok, 1 on error
  */
diff --git a/common/cmd_softswitch.c b/common/cmd_softswitch.c
new file mode 100644
index 00000000000..f75d926770f
--- /dev/null
+++ b/common/cmd_softswitch.c
@@ -0,0 +1,41 @@
+/*
+ * cmd_softswitch.c - set the softswitch for bf60x
+ *
+ * Copyright (c) 2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/blackfin.h>
+#include <asm/soft_switch.h>
+
+int do_softswitch(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	int switchaddr, value, pin, port;
+
+	if (argc != 5)
+		return CMD_RET_USAGE;
+
+	if (strcmp(argv[2], "GPA") == 0)
+		port = IO_PORT_A;
+	else if (strcmp(argv[2], "GPB") == 0)
+		port = IO_PORT_B;
+	else
+		return CMD_RET_USAGE;
+
+	switchaddr = simple_strtoul(argv[1], NULL, 16);
+	pin = simple_strtoul(argv[3], NULL, 16);
+	value = simple_strtoul(argv[4], NULL, 16);
+
+	config_switch_bit(switchaddr, port, (1 << pin), IO_PORT_OUTPUT, value);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	softswitch_output, 5, 1, do_softswitch,
+	"switchaddr GPA/GPB pin_offset value",
+	""
+);
diff --git a/common/cmd_source.c b/common/cmd_source.c
index f0d7f52bcec..a4406143244 100644
--- a/common/cmd_source.c
+++ b/common/cmd_source.c
@@ -127,7 +127,7 @@ source (ulong addr, const char *fit_uname)
 
 		/* verify integrity */
 		if (verify) {
-			if (!fit_image_check_hashes (fit_hdr, noffset)) {
+			if (!fit_image_verify(fit_hdr, noffset)) {
 				puts ("Bad Data Hash\n");
 				return 1;
 			}
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index dacdc2d5b1c..70e803b5bb6 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -269,14 +269,42 @@ static void usb_display_config(struct usb_device *dev)
 	printf("\n");
 }
 
+static struct usb_device *usb_find_device(int devnum)
+{
+	struct usb_device *dev;
+	int d;
+
+	for (d = 0; d < USB_MAX_DEVICE; d++) {
+		dev = usb_get_dev_index(d);
+		if (dev == NULL)
+			return NULL;
+		if (dev->devnum == devnum)
+			return dev;
+	}
+
+	return NULL;
+}
+
 static inline char *portspeed(int speed)
 {
-	if (speed == USB_SPEED_HIGH)
-		return "480 Mb/s";
-	else if (speed == USB_SPEED_LOW)
-		return "1.5 Mb/s";
-	else
-		return "12 Mb/s";
+	char *speed_str;
+
+	switch (speed) {
+	case USB_SPEED_SUPER:
+		speed_str = "5 Gb/s";
+		break;
+	case USB_SPEED_HIGH:
+		speed_str = "480 Mb/s";
+		break;
+	case USB_SPEED_LOW:
+		speed_str = "1.5 Mb/s";
+		break;
+	default:
+		speed_str = "12 Mb/s";
+		break;
+	}
+
+	return speed_str;
 }
 
 /* shows the device tree recursively */
@@ -348,6 +376,66 @@ static void usb_show_tree(struct usb_device *dev)
 	usb_show_tree_graph(dev, &preamble[0]);
 }
 
+static int usb_test(struct usb_device *dev, int port, char* arg)
+{
+	int mode;
+
+	if (port > dev->maxchild) {
+		printf("Device is no hub or does not have %d ports.\n", port);
+		return 1;
+	}
+
+	switch (arg[0]) {
+	case 'J':
+	case 'j':
+		printf("Setting Test_J mode");
+		mode = USB_TEST_MODE_J;
+		break;
+	case 'K':
+	case 'k':
+		printf("Setting Test_K mode");
+		mode = USB_TEST_MODE_K;
+		break;
+	case 'S':
+	case 's':
+		printf("Setting Test_SE0_NAK mode");
+		mode = USB_TEST_MODE_SE0_NAK;
+		break;
+	case 'P':
+	case 'p':
+		printf("Setting Test_Packet mode");
+		mode = USB_TEST_MODE_PACKET;
+		break;
+	case 'F':
+	case 'f':
+		printf("Setting Test_Force_Enable mode");
+		mode = USB_TEST_MODE_FORCE_ENABLE;
+		break;
+	default:
+		printf("Unrecognized test mode: %s\nAvailable modes: "
+		       "J, K, S[E0_NAK], P[acket], F[orce_Enable]\n", arg);
+		return 1;
+	}
+
+	if (port)
+		printf(" on downstream facing port %d...\n", port);
+	else
+		printf(" on upstream facing port...\n");
+
+	if (usb_control_msg(dev, usb_sndctrlpipe(dev, 0), USB_REQ_SET_FEATURE,
+			    port ? USB_RT_PORT : USB_RECIP_DEVICE,
+			    port ? USB_PORT_FEAT_TEST : USB_FEAT_TEST,
+			    (mode << 8) | port,
+			    NULL, 0, USB_CNTL_TIMEOUT) == -1) {
+		printf("Error during SET_FEATURE.\n");
+		return 1;
+	} else {
+		printf("Test mode successfully set. Use 'usb start' "
+		       "to return to normal operation.\n");
+		return 0;
+	}
+}
+
 
 /******************************************************************************
  * usb boot command intepreter. Derived from diskboot
@@ -441,17 +529,9 @@ static int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			}
 			return 0;
 		} else {
-			int d;
-
-			i = simple_strtoul(argv[2], NULL, 16);
+			i = simple_strtoul(argv[2], NULL, 10);
 			printf("config for device %d\n", i);
-			for (d = 0; d < USB_MAX_DEVICE; d++) {
-				dev = usb_get_dev_index(d);
-				if (dev == NULL)
-					break;
-				if (dev->devnum == i)
-					break;
-			}
+			dev = usb_find_device(i);
 			if (dev == NULL) {
 				printf("*** No device available ***\n");
 				return 0;
@@ -462,6 +542,18 @@ static int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		}
 		return 0;
 	}
+	if (strncmp(argv[1], "test", 4) == 0) {
+		if (argc < 5)
+			return CMD_RET_USAGE;
+		i = simple_strtoul(argv[2], NULL, 10);
+		dev = usb_find_device(i);
+		if (dev == NULL) {
+			printf("Device %d does not exist.\n", i);
+			return 1;
+		}
+		i = simple_strtoul(argv[3], NULL, 10);
+		return usb_test(dev, i, argv[4]);
+	}
 #ifdef CONFIG_USB_STORAGE
 	if (strncmp(argv[1], "stor", 4) == 0)
 		return usb_stor_info();
@@ -571,7 +663,6 @@ static int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_USAGE;
 }
 
-#ifdef CONFIG_USB_STORAGE
 U_BOOT_CMD(
 	usb,	5,	1,	do_usb,
 	"USB sub-system",
@@ -580,30 +671,26 @@ U_BOOT_CMD(
 	"usb stop [f] - stop USB [f]=force stop\n"
 	"usb tree - show USB device tree\n"
 	"usb info [dev] - show available USB devices\n"
+	"usb test [dev] [port] [mode] - set USB 2.0 test mode\n"
+	"    (specify port 0 to indicate the device's upstream port)\n"
+	"    Available modes: J, K, S[E0_NAK], P[acket], F[orce_Enable]\n"
+#ifdef CONFIG_USB_STORAGE
 	"usb storage - show details of USB storage devices\n"
 	"usb dev [dev] - show or set current USB storage device\n"
 	"usb part [dev] - print partition table of one or all USB storage"
-	" devices\n"
+	"    devices\n"
 	"usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n"
 	"    to memory address `addr'\n"
 	"usb write addr blk# cnt - write `cnt' blocks starting at block `blk#'\n"
 	"    from memory address `addr'"
+#endif /* CONFIG_USB_STORAGE */
 );
 
 
+#ifdef CONFIG_USB_STORAGE
 U_BOOT_CMD(
 	usbboot,	3,	1,	do_usbboot,
 	"boot from USB device",
 	"loadAddr dev:part"
 );
-
-#else
-U_BOOT_CMD(
-	usb,	5,	1,	do_usb,
-	"USB sub-system",
-	"start - start (scan) USB controller\n"
-	"usb reset - reset (rescan) USB controller\n"
-	"usb tree - show USB device tree\n"
-	"usb info [dev] - show available USB devices"
-);
-#endif
+#endif /* CONFIG_USB_STORAGE */
diff --git a/common/cmd_ximg.c b/common/cmd_ximg.c
index ea0a26e7845..270e8030992 100644
--- a/common/cmd_ximg.c
+++ b/common/cmd_ximg.c
@@ -58,7 +58,9 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	const void	*fit_data;
 	size_t		fit_len;
 #endif
+#ifdef CONFIG_GZIP
 	uint		unc_len = CONFIG_SYS_XIMG_LEN;
+#endif
 	uint8_t		comp;
 
 	verify = getenv_yesno("verify");
@@ -160,7 +162,7 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 
 		/* verify integrity */
 		if (verify) {
-			if (!fit_image_check_hashes(fit_hdr, noffset)) {
+			if (!fit_image_verify(fit_hdr, noffset)) {
 				puts("Bad Data Hash\n");
 				return 1;
 			}
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 812acb401c1..416100e394d 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -387,7 +387,11 @@ static void write_cell(u8 *addr, u64 val, int size)
 	}
 }
 
+#ifdef CONFIG_NR_DRAM_BANKS
+#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
+#else
 #define MEMORY_BANKS_MAX 4
+#endif
 int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 {
 	int err, nodeoffset;
diff --git a/common/hash.c b/common/hash.c
index c9ac33e2c40..fe19b735a19 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -30,6 +30,7 @@
 #include <sha1.h>
 #include <sha256.h>
 #include <asm/io.h>
+#include <asm/errno.h>
 
 /*
  * These are the hash algorithms we support. Chips which support accelerated
@@ -238,6 +239,28 @@ static void show_hash(struct hash_algo *algo, ulong addr, ulong len,
 		printf("%02x", output[i]);
 }
 
+int hash_block(const char *algo_name, const void *data, unsigned int len,
+	       uint8_t *output, int *output_size)
+{
+	struct hash_algo *algo;
+
+	algo = find_hash_algo(algo_name);
+	if (!algo) {
+		debug("Unknown hash algorithm '%s'\n", algo_name);
+		return -EPROTONOSUPPORT;
+	}
+	if (output_size && *output_size < algo->digest_size) {
+		debug("Output buffer size %d too small (need %d bytes)",
+		      *output_size, algo->digest_size);
+		return -ENOSPC;
+	}
+	if (output_size)
+		*output_size = algo->digest_size;
+	algo->hash_func_ws(data, len, output, algo->chunk_size);
+
+	return 0;
+}
+
 int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
 		 int argc, char * const argv[])
 {
diff --git a/common/image-fdt.c b/common/image-fdt.c
new file mode 100644
index 00000000000..158c9cfbf57
--- /dev/null
+++ b/common/image-fdt.c
@@ -0,0 +1,653 @@
+/*
+ * Copyright (c) 2013, Google Inc.
+ *
+ * (C) Copyright 2008 Semihalf
+ *
+ * (C) Copyright 2000-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <fdt_support.h>
+#include <errno.h>
+#include <image.h>
+#include <libfdt.h>
+#include <asm/io.h>
+
+#ifndef CONFIG_SYS_FDT_PAD
+#define CONFIG_SYS_FDT_PAD 0x3000
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void fdt_error(const char *msg)
+{
+	puts("ERROR: ");
+	puts(msg);
+	puts(" - must RESET the board to recover.\n");
+}
+
+static const image_header_t *image_get_fdt(ulong fdt_addr)
+{
+	const image_header_t *fdt_hdr = map_sysmem(fdt_addr, 0);
+
+	image_print_contents(fdt_hdr);
+
+	puts("   Verifying Checksum ... ");
+	if (!image_check_hcrc(fdt_hdr)) {
+		fdt_error("fdt header checksum invalid");
+		return NULL;
+	}
+
+	if (!image_check_dcrc(fdt_hdr)) {
+		fdt_error("fdt checksum invalid");
+		return NULL;
+	}
+	puts("OK\n");
+
+	if (!image_check_type(fdt_hdr, IH_TYPE_FLATDT)) {
+		fdt_error("uImage is not a fdt");
+		return NULL;
+	}
+	if (image_get_comp(fdt_hdr) != IH_COMP_NONE) {
+		fdt_error("uImage is compressed");
+		return NULL;
+	}
+	if (fdt_check_header((char *)image_get_data(fdt_hdr)) != 0) {
+		fdt_error("uImage data is not a fdt");
+		return NULL;
+	}
+	return fdt_hdr;
+}
+
+/**
+ * boot_fdt_add_mem_rsv_regions - Mark the memreserve sections as unusable
+ * @lmb: pointer to lmb handle, will be used for memory mgmt
+ * @fdt_blob: pointer to fdt blob base address
+ *
+ * Adds the memreserve regions in the dtb to the lmb block.  Adding the
+ * memreserve regions prevents u-boot from using them to store the initrd
+ * or the fdt blob.
+ */
+void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
+{
+	uint64_t addr, size;
+	int i, total;
+
+	if (fdt_check_header(fdt_blob) != 0)
+		return;
+
+	total = fdt_num_mem_rsv(fdt_blob);
+	for (i = 0; i < total; i++) {
+		if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
+			continue;
+		printf("   reserving fdt memory region: addr=%llx size=%llx\n",
+		       (unsigned long long)addr, (unsigned long long)size);
+		lmb_reserve(lmb, addr, size);
+	}
+}
+
+/**
+ * boot_relocate_fdt - relocate flat device tree
+ * @lmb: pointer to lmb handle, will be used for memory mgmt
+ * @of_flat_tree: pointer to a char* variable, will hold fdt start address
+ * @of_size: pointer to a ulong variable, will hold fdt length
+ *
+ * boot_relocate_fdt() allocates a region of memory within the bootmap and
+ * relocates the of_flat_tree into that region, even if the fdt is already in
+ * the bootmap.  It also expands the size of the fdt by CONFIG_SYS_FDT_PAD
+ * bytes.
+ *
+ * of_flat_tree and of_size are set to final (after relocation) values
+ *
+ * returns:
+ *      0 - success
+ *      1 - failure
+ */
+int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size)
+{
+	void	*fdt_blob = *of_flat_tree;
+	void	*of_start = NULL;
+	char	*fdt_high;
+	ulong	of_len = 0;
+	int	err;
+	int	disable_relocation = 0;
+
+	/* nothing to do */
+	if (*of_size == 0)
+		return 0;
+
+	if (fdt_check_header(fdt_blob) != 0) {
+		fdt_error("image is not a fdt");
+		goto error;
+	}
+
+	/* position on a 4K boundary before the alloc_current */
+	/* Pad the FDT by a specified amount */
+	of_len = *of_size + CONFIG_SYS_FDT_PAD;
+
+	/* If fdt_high is set use it to select the relocation address */
+	fdt_high = getenv("fdt_high");
+	if (fdt_high) {
+		void *desired_addr = (void *)simple_strtoul(fdt_high, NULL, 16);
+
+		if (((ulong) desired_addr) == ~0UL) {
+			/* All ones means use fdt in place */
+			of_start = fdt_blob;
+			lmb_reserve(lmb, (ulong)of_start, of_len);
+			disable_relocation = 1;
+		} else if (desired_addr) {
+			of_start =
+			    (void *)(ulong) lmb_alloc_base(lmb, of_len, 0x1000,
+							   (ulong)desired_addr);
+			if (of_start == NULL) {
+				puts("Failed using fdt_high value for Device Tree");
+				goto error;
+			}
+		} else {
+			of_start =
+			    (void *)(ulong) lmb_alloc(lmb, of_len, 0x1000);
+		}
+	} else {
+		of_start =
+		    (void *)(ulong) lmb_alloc_base(lmb, of_len, 0x1000,
+						   getenv_bootm_mapsize()
+						   + getenv_bootm_low());
+	}
+
+	if (of_start == NULL) {
+		puts("device tree - allocation error\n");
+		goto error;
+	}
+
+	if (disable_relocation) {
+		/*
+		 * We assume there is space after the existing fdt to use
+		 * for padding
+		 */
+		fdt_set_totalsize(of_start, of_len);
+		printf("   Using Device Tree in place at %p, end %p\n",
+		       of_start, of_start + of_len - 1);
+	} else {
+		debug("## device tree at %p ... %p (len=%ld [0x%lX])\n",
+		      fdt_blob, fdt_blob + *of_size - 1, of_len, of_len);
+
+		printf("   Loading Device Tree to %p, end %p ... ",
+		       of_start, of_start + of_len - 1);
+
+		err = fdt_open_into(fdt_blob, of_start, of_len);
+		if (err != 0) {
+			fdt_error("fdt move failed");
+			goto error;
+		}
+		puts("OK\n");
+	}
+
+	*of_flat_tree = of_start;
+	*of_size = of_len;
+
+	set_working_fdt_addr(*of_flat_tree);
+	return 0;
+
+error:
+	return 1;
+}
+
+#if defined(CONFIG_FIT)
+/**
+ * fit_check_fdt - verify FIT format FDT subimage
+ * @fit_hdr: pointer to the FIT  header
+ * fdt_noffset: FDT subimage node offset within FIT image
+ * @verify: data CRC verification flag
+ *
+ * fit_check_fdt() verifies integrity of the FDT subimage and from
+ * specified FIT image.
+ *
+ * returns:
+ *     1, on success
+ *     0, on failure
+ */
+static int fit_check_fdt(const void *fit, int fdt_noffset, int verify)
+{
+	fit_image_print(fit, fdt_noffset, "   ");
+
+	if (verify) {
+		puts("   Verifying Hash Integrity ... ");
+		if (!fit_image_verify(fit, fdt_noffset)) {
+			fdt_error("Bad Data Hash");
+			return 0;
+		}
+		puts("OK\n");
+	}
+
+	if (!fit_image_check_type(fit, fdt_noffset, IH_TYPE_FLATDT)) {
+		fdt_error("Not a FDT image");
+		return 0;
+	}
+
+	if (!fit_image_check_comp(fit, fdt_noffset, IH_COMP_NONE)) {
+		fdt_error("FDT image is compressed");
+		return 0;
+	}
+
+	return 1;
+}
+#endif
+
+/**
+ * boot_get_fdt - main fdt handling routine
+ * @argc: command argument count
+ * @argv: command argument list
+ * @images: pointer to the bootm images structure
+ * @of_flat_tree: pointer to a char* variable, will hold fdt start address
+ * @of_size: pointer to a ulong variable, will hold fdt length
+ *
+ * boot_get_fdt() is responsible for finding a valid flat device tree image.
+ * Curently supported are the following ramdisk sources:
+ *      - multicomponent kernel/ramdisk image,
+ *      - commandline provided address of decicated ramdisk image.
+ *
+ * returns:
+ *     0, if fdt image was found and valid, or skipped
+ *     of_flat_tree and of_size are set to fdt start address and length if
+ *     fdt image is found and valid
+ *
+ *     1, if fdt image is found but corrupted
+ *     of_flat_tree and of_size are set to 0 if no fdt exists
+ */
+int boot_get_fdt(int flag, int argc, char * const argv[],
+		bootm_headers_t *images, char **of_flat_tree, ulong *of_size)
+{
+	const image_header_t *fdt_hdr;
+	ulong		fdt_addr;
+	char		*fdt_blob = NULL;
+	ulong		image_start, image_data, image_end;
+	ulong		load_start, load_end;
+	void		*buf;
+#if defined(CONFIG_FIT)
+	void		*fit_hdr;
+	const char	*fit_uname_config = NULL;
+	const char	*fit_uname_fdt = NULL;
+	ulong		default_addr;
+	int		cfg_noffset;
+	int		fdt_noffset;
+	const void	*data;
+	size_t		size;
+#endif
+
+	*of_flat_tree = NULL;
+	*of_size = 0;
+
+	if (argc > 3 || genimg_has_config(images)) {
+#if defined(CONFIG_FIT)
+		if (argc > 3) {
+			/*
+			 * If the FDT blob comes from the FIT image and the
+			 * FIT image address is omitted in the command line
+			 * argument, try to use ramdisk or os FIT image
+			 * address or default load address.
+			 */
+			if (images->fit_uname_rd)
+				default_addr = (ulong)images->fit_hdr_rd;
+			else if (images->fit_uname_os)
+				default_addr = (ulong)images->fit_hdr_os;
+			else
+				default_addr = load_addr;
+
+			if (fit_parse_conf(argv[3], default_addr,
+					   &fdt_addr, &fit_uname_config)) {
+				debug("*  fdt: config '%s' from image at 0x%08lx\n",
+				      fit_uname_config, fdt_addr);
+			} else if (fit_parse_subimage(argv[3], default_addr,
+				   &fdt_addr, &fit_uname_fdt)) {
+				debug("*  fdt: subimage '%s' from image at 0x%08lx\n",
+				      fit_uname_fdt, fdt_addr);
+			} else
+#endif
+			{
+				fdt_addr = simple_strtoul(argv[3], NULL, 16);
+				debug("*  fdt: cmdline image address = 0x%08lx\n",
+				      fdt_addr);
+			}
+#if defined(CONFIG_FIT)
+		} else {
+			/* use FIT configuration provided in first bootm
+			 * command argument
+			 */
+			fdt_addr = map_to_sysmem(images->fit_hdr_os);
+			fit_uname_config = images->fit_uname_cfg;
+			debug("*  fdt: using config '%s' from image at 0x%08lx\n",
+			      fit_uname_config, fdt_addr);
+
+			/*
+			 * Check whether configuration has FDT blob defined,
+			 * if not quit silently.
+			 */
+			fit_hdr = images->fit_hdr_os;
+			cfg_noffset = fit_conf_get_node(fit_hdr,
+					fit_uname_config);
+			if (cfg_noffset < 0) {
+				debug("*  fdt: no such config\n");
+				return 0;
+			}
+
+			fdt_noffset = fit_conf_get_fdt_node(fit_hdr,
+					cfg_noffset);
+			if (fdt_noffset < 0) {
+				debug("*  fdt: no fdt in config\n");
+				return 0;
+			}
+		}
+#endif
+
+		debug("## Checking for 'FDT'/'FDT Image' at %08lx\n",
+		      fdt_addr);
+
+		/* copy from dataflash if needed */
+		fdt_addr = genimg_get_image(fdt_addr);
+
+		/*
+		 * Check if there is an FDT image at the
+		 * address provided in the second bootm argument
+		 * check image type, for FIT images get a FIT node.
+		 */
+		buf = map_sysmem(fdt_addr, 0);
+		switch (genimg_get_format(buf)) {
+		case IMAGE_FORMAT_LEGACY:
+			/* verify fdt_addr points to a valid image header */
+			printf("## Flattened Device Tree from Legacy Image at %08lx\n",
+			       fdt_addr);
+			fdt_hdr = image_get_fdt(fdt_addr);
+			if (!fdt_hdr)
+				goto error;
+
+			/*
+			 * move image data to the load address,
+			 * make sure we don't overwrite initial image
+			 */
+			image_start = (ulong)fdt_hdr;
+			image_data = (ulong)image_get_data(fdt_hdr);
+			image_end = image_get_image_end(fdt_hdr);
+
+			load_start = image_get_load(fdt_hdr);
+			load_end = load_start + image_get_data_size(fdt_hdr);
+
+			if (load_start == image_start ||
+			    load_start == image_data) {
+				fdt_blob = (char *)image_data;
+				break;
+			}
+
+			if ((load_start < image_end) &&
+			    (load_end > image_start)) {
+				fdt_error("fdt overwritten");
+				goto error;
+			}
+
+			debug("   Loading FDT from 0x%08lx to 0x%08lx\n",
+			      image_data, load_start);
+
+			memmove((void *)load_start,
+				(void *)image_data,
+				image_get_data_size(fdt_hdr));
+
+			fdt_blob = (char *)load_start;
+			break;
+		case IMAGE_FORMAT_FIT:
+			/*
+			 * This case will catch both: new uImage format
+			 * (libfdt based) and raw FDT blob (also libfdt
+			 * based).
+			 */
+#if defined(CONFIG_FIT)
+			/* check FDT blob vs FIT blob */
+			if (fit_check_format(buf)) {
+				/*
+				 * FIT image
+				 */
+				fit_hdr = buf;
+				printf("## Flattened Device Tree from FIT Image at %08lx\n",
+				       fdt_addr);
+
+				if (!fit_uname_fdt) {
+					/*
+					 * no FDT blob image node unit name,
+					 * try to get config node first. If
+					 * config unit node name is NULL
+					 * fit_conf_get_node() will try to
+					 * find default config node
+					 */
+					cfg_noffset = fit_conf_get_node(fit_hdr,
+							fit_uname_config);
+
+					if (cfg_noffset < 0) {
+						fdt_error("Could not find configuration node\n");
+						goto error;
+					}
+
+					fit_uname_config = fdt_get_name(fit_hdr,
+							cfg_noffset, NULL);
+					printf("   Using '%s' configuration\n",
+					       fit_uname_config);
+
+					fdt_noffset = fit_conf_get_fdt_node(
+							fit_hdr,
+							cfg_noffset);
+					fit_uname_fdt = fit_get_name(fit_hdr,
+							fdt_noffset, NULL);
+				} else {
+					/*
+					 * get FDT component image node
+					 * offset
+					 */
+					fdt_noffset = fit_image_get_node(
+								fit_hdr,
+								fit_uname_fdt);
+				}
+				if (fdt_noffset < 0) {
+					fdt_error("Could not find subimage node\n");
+					goto error;
+				}
+
+				printf("   Trying '%s' FDT blob subimage\n",
+				       fit_uname_fdt);
+
+				if (!fit_check_fdt(fit_hdr, fdt_noffset,
+						   images->verify))
+					goto error;
+
+				/* get ramdisk image data address and length */
+				if (fit_image_get_data(fit_hdr, fdt_noffset,
+						       &data, &size)) {
+					fdt_error("Could not find FDT subimage data");
+					goto error;
+				}
+
+				/*
+				 * verify that image data is a proper FDT
+				 * blob
+				 */
+				if (fdt_check_header((char *)data) != 0) {
+					fdt_error("Subimage data is not a FTD");
+					goto error;
+				}
+
+				/*
+				 * move image data to the load address,
+				 * make sure we don't overwrite initial image
+				 */
+				image_start = (ulong)fit_hdr;
+				image_end = fit_get_end(fit_hdr);
+
+				if (fit_image_get_load(fit_hdr, fdt_noffset,
+						       &load_start) == 0) {
+					load_end = load_start + size;
+
+					if ((load_start < image_end) &&
+					    (load_end > image_start)) {
+						fdt_error("FDT overwritten");
+						goto error;
+					}
+
+					printf("   Loading FDT from 0x%08lx to 0x%08lx\n",
+					       (ulong)data, load_start);
+
+					memmove((void *)load_start,
+						(void *)data, size);
+
+					fdt_blob = (char *)load_start;
+				} else {
+					fdt_blob = (char *)data;
+				}
+
+				images->fit_hdr_fdt = fit_hdr;
+				images->fit_uname_fdt = fit_uname_fdt;
+				images->fit_noffset_fdt = fdt_noffset;
+				break;
+			} else
+#endif
+			{
+				/*
+				 * FDT blob
+				 */
+				fdt_blob = buf;
+				debug("*  fdt: raw FDT blob\n");
+				printf("## Flattened Device Tree blob at %08lx\n",
+				       (long)fdt_addr);
+			}
+			break;
+		default:
+			puts("ERROR: Did not find a cmdline Flattened Device Tree\n");
+			goto error;
+		}
+
+		printf("   Booting using the fdt blob at 0x%p\n", fdt_blob);
+
+	} else if (images->legacy_hdr_valid &&
+			image_check_type(&images->legacy_hdr_os_copy,
+					 IH_TYPE_MULTI)) {
+		ulong fdt_data, fdt_len;
+
+		/*
+		 * Now check if we have a legacy multi-component image,
+		 * get second entry data start address and len.
+		 */
+		printf("## Flattened Device Tree from multi component Image at %08lX\n",
+		       (ulong)images->legacy_hdr_os);
+
+		image_multi_getimg(images->legacy_hdr_os, 2, &fdt_data,
+				   &fdt_len);
+		if (fdt_len) {
+			fdt_blob = (char *)fdt_data;
+			printf("   Booting using the fdt at 0x%p\n", fdt_blob);
+
+			if (fdt_check_header(fdt_blob) != 0) {
+				fdt_error("image is not a fdt");
+				goto error;
+			}
+
+			if (fdt_totalsize(fdt_blob) != fdt_len) {
+				fdt_error("fdt size != image size");
+				goto error;
+			}
+		} else {
+			debug("## No Flattened Device Tree\n");
+			return 0;
+		}
+	} else {
+		debug("## No Flattened Device Tree\n");
+		return 0;
+	}
+
+	*of_flat_tree = fdt_blob;
+	*of_size = fdt_totalsize(fdt_blob);
+	debug("   of_flat_tree at 0x%08lx size 0x%08lx\n",
+	      (ulong)*of_flat_tree, *of_size);
+
+	return 0;
+
+error:
+	*of_flat_tree = NULL;
+	*of_size = 0;
+	return 1;
+}
+
+/*
+ * Verify the device tree.
+ *
+ * This function is called after all device tree fix-ups have been enacted,
+ * so that the final device tree can be verified.  The definition of "verified"
+ * is up to the specific implementation.  However, it generally means that the
+ * addresses of some of the devices in the device tree are compared with the
+ * actual addresses at which U-Boot has placed them.
+ *
+ * Returns 1 on success, 0 on failure.  If 0 is returned, U-boot will halt the
+ * boot process.
+ */
+__weak int ft_verify_fdt(void *fdt)
+{
+	return 1;
+}
+
+__weak int arch_fixup_memory_node(void *blob)
+{
+	return 0;
+}
+
+int image_setup_libfdt(bootm_headers_t *images, void *blob,
+		       int of_size, struct lmb *lmb)
+{
+	ulong *initrd_start = &images->initrd_start;
+	ulong *initrd_end = &images->initrd_end;
+	int ret;
+
+	if (fdt_chosen(blob, 1) < 0) {
+		puts("ERROR: /chosen node create failed");
+		puts(" - must RESET the board to recover.\n");
+		return -1;
+	}
+	arch_fixup_memory_node(blob);
+	if (IMAAGE_OF_BOARD_SETUP)
+		ft_board_setup(blob, gd->bd);
+	fdt_fixup_ethernet(blob);
+
+	/* Delete the old LMB reservation */
+	lmb_free(lmb, (phys_addr_t)(u32)(uintptr_t)blob,
+		 (phys_size_t)fdt_totalsize(blob));
+
+	ret = fdt_resize(blob);
+	if (ret < 0)
+		return ret;
+	of_size = ret;
+
+	if (*initrd_start && *initrd_end) {
+		of_size += FDT_RAMDISK_OVERHEAD;
+		fdt_set_totalsize(blob, of_size);
+	}
+	/* Create a new LMB reservation */
+	lmb_reserve(lmb, (ulong)blob, of_size);
+
+	fdt_initrd(blob, *initrd_start, *initrd_end, 1);
+	if (!ft_verify_fdt(blob))
+		return -1;
+
+	return 0;
+}
diff --git a/common/image-fit.c b/common/image-fit.c
new file mode 100644
index 00000000000..254feecaad7
--- /dev/null
+++ b/common/image-fit.c
@@ -0,0 +1,1492 @@
+/*
+ * Copyright (c) 2013, Google Inc.
+ *
+ * (C) Copyright 2008 Semihalf
+ *
+ * (C) Copyright 2000-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifdef USE_HOSTCC
+#include "mkimage.h"
+#include <image.h>
+#include <time.h>
+#else
+#include <common.h>
+#endif /* !USE_HOSTCC*/
+
+#include <bootstage.h>
+#include <sha1.h>
+#include <u-boot/crc.h>
+#include <u-boot/md5.h>
+
+/*****************************************************************************/
+/* New uImage format routines */
+/*****************************************************************************/
+#ifndef USE_HOSTCC
+static int fit_parse_spec(const char *spec, char sepc, ulong addr_curr,
+		ulong *addr, const char **name)
+{
+	const char *sep;
+
+	*addr = addr_curr;
+	*name = NULL;
+
+	sep = strchr(spec, sepc);
+	if (sep) {
+		if (sep - spec > 0)
+			*addr = simple_strtoul(spec, NULL, 16);
+
+		*name = sep + 1;
+		return 1;
+	}
+
+	return 0;
+}
+
+/**
+ * fit_parse_conf - parse FIT configuration spec
+ * @spec: input string, containing configuration spec
+ * @add_curr: current image address (to be used as a possible default)
+ * @addr: pointer to a ulong variable, will hold FIT image address of a given
+ * configuration
+ * @conf_name double pointer to a char, will hold pointer to a configuration
+ * unit name
+ *
+ * fit_parse_conf() expects configuration spec in the for of [<addr>]#<conf>,
+ * where <addr> is a FIT image address that contains configuration
+ * with a <conf> unit name.
+ *
+ * Address part is optional, and if omitted default add_curr will
+ * be used instead.
+ *
+ * returns:
+ *     1 if spec is a valid configuration string,
+ *     addr and conf_name are set accordingly
+ *     0 otherwise
+ */
+int fit_parse_conf(const char *spec, ulong addr_curr,
+		ulong *addr, const char **conf_name)
+{
+	return fit_parse_spec(spec, '#', addr_curr, addr, conf_name);
+}
+
+/**
+ * fit_parse_subimage - parse FIT subimage spec
+ * @spec: input string, containing subimage spec
+ * @add_curr: current image address (to be used as a possible default)
+ * @addr: pointer to a ulong variable, will hold FIT image address of a given
+ * subimage
+ * @image_name: double pointer to a char, will hold pointer to a subimage name
+ *
+ * fit_parse_subimage() expects subimage spec in the for of
+ * [<addr>]:<subimage>, where <addr> is a FIT image address that contains
+ * subimage with a <subimg> unit name.
+ *
+ * Address part is optional, and if omitted default add_curr will
+ * be used instead.
+ *
+ * returns:
+ *     1 if spec is a valid subimage string,
+ *     addr and image_name are set accordingly
+ *     0 otherwise
+ */
+int fit_parse_subimage(const char *spec, ulong addr_curr,
+		ulong *addr, const char **image_name)
+{
+	return fit_parse_spec(spec, ':', addr_curr, addr, image_name);
+}
+#endif /* !USE_HOSTCC */
+
+static void fit_get_debug(const void *fit, int noffset,
+		char *prop_name, int err)
+{
+	debug("Can't get '%s' property from FIT 0x%08lx, node: offset %d, name %s (%s)\n",
+	      prop_name, (ulong)fit, noffset, fit_get_name(fit, noffset, NULL),
+	      fdt_strerror(err));
+}
+
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_FIT_SPL_PRINT)
+/**
+ * fit_print_contents - prints out the contents of the FIT format image
+ * @fit: pointer to the FIT format image header
+ * @p: pointer to prefix string
+ *
+ * fit_print_contents() formats a multi line FIT image contents description.
+ * The routine prints out FIT image properties (root node level) follwed by
+ * the details of each component image.
+ *
+ * returns:
+ *     no returned results
+ */
+void fit_print_contents(const void *fit)
+{
+	char *desc;
+	char *uname;
+	int images_noffset;
+	int confs_noffset;
+	int noffset;
+	int ndepth;
+	int count = 0;
+	int ret;
+	const char *p;
+	time_t timestamp;
+
+	/* Indent string is defined in header image.h */
+	p = IMAGE_INDENT_STRING;
+
+	/* Root node properties */
+	ret = fit_get_desc(fit, 0, &desc);
+	printf("%sFIT description: ", p);
+	if (ret)
+		printf("unavailable\n");
+	else
+		printf("%s\n", desc);
+
+	if (IMAGE_ENABLE_TIMESTAMP) {
+		ret = fit_get_timestamp(fit, 0, &timestamp);
+		printf("%sCreated:         ", p);
+		if (ret)
+			printf("unavailable\n");
+		else
+			genimg_print_time(timestamp);
+	}
+
+	/* Find images parent node offset */
+	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images_noffset < 0) {
+		printf("Can't find images parent node '%s' (%s)\n",
+		       FIT_IMAGES_PATH, fdt_strerror(images_noffset));
+		return;
+	}
+
+	/* Process its subnodes, print out component images details */
+	for (ndepth = 0, count = 0,
+		noffset = fdt_next_node(fit, images_noffset, &ndepth);
+	     (noffset >= 0) && (ndepth > 0);
+	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
+		if (ndepth == 1) {
+			/*
+			 * Direct child node of the images parent node,
+			 * i.e. component image node.
+			 */
+			printf("%s Image %u (%s)\n", p, count++,
+			       fit_get_name(fit, noffset, NULL));
+
+			fit_image_print(fit, noffset, p);
+		}
+	}
+
+	/* Find configurations parent node offset */
+	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
+	if (confs_noffset < 0) {
+		debug("Can't get configurations parent node '%s' (%s)\n",
+		      FIT_CONFS_PATH, fdt_strerror(confs_noffset));
+		return;
+	}
+
+	/* get default configuration unit name from default property */
+	uname = (char *)fdt_getprop(fit, noffset, FIT_DEFAULT_PROP, NULL);
+	if (uname)
+		printf("%s Default Configuration: '%s'\n", p, uname);
+
+	/* Process its subnodes, print out configurations details */
+	for (ndepth = 0, count = 0,
+		noffset = fdt_next_node(fit, confs_noffset, &ndepth);
+	     (noffset >= 0) && (ndepth > 0);
+	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
+		if (ndepth == 1) {
+			/*
+			 * Direct child node of the configurations parent node,
+			 * i.e. configuration node.
+			 */
+			printf("%s Configuration %u (%s)\n", p, count++,
+			       fit_get_name(fit, noffset, NULL));
+
+			fit_conf_print(fit, noffset, p);
+		}
+	}
+}
+
+/**
+ * fit_image_print_data() - prints out the hash node details
+ * @fit: pointer to the FIT format image header
+ * @noffset: offset of the hash node
+ * @p: pointer to prefix string
+ *
+ * fit_image_print_data() lists properies for the processed hash node
+ *
+ * returns:
+ *     no returned results
+ */
+static void fit_image_print_data(const void *fit, int noffset, const char *p)
+{
+	char *algo;
+	uint8_t *value;
+	int value_len;
+	int i, ret;
+
+	/*
+	 * Check subnode name, must be equal to "hash".
+	 * Multiple hash nodes require unique unit node
+	 * names, e.g. hash@1, hash@2, etc.
+	 */
+	if (strncmp(fit_get_name(fit, noffset, NULL),
+		    FIT_HASH_NODENAME,
+		    strlen(FIT_HASH_NODENAME)) != 0)
+		return;
+
+	debug("%s  Hash node:    '%s'\n", p,
+	      fit_get_name(fit, noffset, NULL));
+
+	printf("%s  Hash algo:    ", p);
+	if (fit_image_hash_get_algo(fit, noffset, &algo)) {
+		printf("invalid/unsupported\n");
+		return;
+	}
+	printf("%s\n", algo);
+
+	ret = fit_image_hash_get_value(fit, noffset, &value,
+					&value_len);
+	printf("%s  Hash value:   ", p);
+	if (ret) {
+		printf("unavailable\n");
+	} else {
+		for (i = 0; i < value_len; i++)
+			printf("%02x", value[i]);
+		printf("\n");
+	}
+
+	debug("%s  Hash len:     %d\n", p, value_len);
+}
+
+/**
+ * fit_image_print_verification_data() - prints out the hash/signature details
+ * @fit: pointer to the FIT format image header
+ * @noffset: offset of the hash or signature node
+ * @p: pointer to prefix string
+ *
+ * This lists properies for the processed hash node
+ *
+ * returns:
+ *     no returned results
+ */
+static void fit_image_print_verification_data(const void *fit, int noffset,
+				       const char *p)
+{
+	const char *name;
+
+	/*
+	 * Check subnode name, must be equal to "hash" or "signature".
+	 * Multiple hash/signature nodes require unique unit node
+	 * names, e.g. hash@1, hash@2, signature@1, signature@2, etc.
+	 */
+	name = fit_get_name(fit, noffset, NULL);
+	if (!strncmp(name, FIT_HASH_NODENAME, strlen(FIT_HASH_NODENAME)))
+		fit_image_print_data(fit, noffset, p);
+}
+
+/**
+ * fit_image_print - prints out the FIT component image details
+ * @fit: pointer to the FIT format image header
+ * @image_noffset: offset of the component image node
+ * @p: pointer to prefix string
+ *
+ * fit_image_print() lists all mandatory properies for the processed component
+ * image. If present, hash nodes are printed out as well. Load
+ * address for images of type firmware is also printed out. Since the load
+ * address is not mandatory for firmware images, it will be output as
+ * "unavailable" when not present.
+ *
+ * returns:
+ *     no returned results
+ */
+void fit_image_print(const void *fit, int image_noffset, const char *p)
+{
+	char *desc;
+	uint8_t type, arch, os, comp;
+	size_t size;
+	ulong load, entry;
+	const void *data;
+	int noffset;
+	int ndepth;
+	int ret;
+
+	/* Mandatory properties */
+	ret = fit_get_desc(fit, image_noffset, &desc);
+	printf("%s  Description:  ", p);
+	if (ret)
+		printf("unavailable\n");
+	else
+		printf("%s\n", desc);
+
+	fit_image_get_type(fit, image_noffset, &type);
+	printf("%s  Type:         %s\n", p, genimg_get_type_name(type));
+
+	fit_image_get_comp(fit, image_noffset, &comp);
+	printf("%s  Compression:  %s\n", p, genimg_get_comp_name(comp));
+
+	ret = fit_image_get_data(fit, image_noffset, &data, &size);
+
+#ifndef USE_HOSTCC
+	printf("%s  Data Start:   ", p);
+	if (ret)
+		printf("unavailable\n");
+	else
+		printf("0x%08lx\n", (ulong)data);
+#endif
+
+	printf("%s  Data Size:    ", p);
+	if (ret)
+		printf("unavailable\n");
+	else
+		genimg_print_size(size);
+
+	/* Remaining, type dependent properties */
+	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
+	    (type == IH_TYPE_RAMDISK) || (type == IH_TYPE_FIRMWARE) ||
+	    (type == IH_TYPE_FLATDT)) {
+		fit_image_get_arch(fit, image_noffset, &arch);
+		printf("%s  Architecture: %s\n", p, genimg_get_arch_name(arch));
+	}
+
+	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_RAMDISK)) {
+		fit_image_get_os(fit, image_noffset, &os);
+		printf("%s  OS:           %s\n", p, genimg_get_os_name(os));
+	}
+
+	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
+	    (type == IH_TYPE_FIRMWARE) || (type == IH_TYPE_RAMDISK)) {
+		ret = fit_image_get_load(fit, image_noffset, &load);
+		printf("%s  Load Address: ", p);
+		if (ret)
+			printf("unavailable\n");
+		else
+			printf("0x%08lx\n", load);
+	}
+
+	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
+	    (type == IH_TYPE_RAMDISK)) {
+		fit_image_get_entry(fit, image_noffset, &entry);
+		printf("%s  Entry Point:  ", p);
+		if (ret)
+			printf("unavailable\n");
+		else
+			printf("0x%08lx\n", entry);
+	}
+
+	/* Process all hash subnodes of the component image node */
+	for (ndepth = 0, noffset = fdt_next_node(fit, image_noffset, &ndepth);
+	     (noffset >= 0) && (ndepth > 0);
+	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
+		if (ndepth == 1) {
+			/* Direct child node of the component image node */
+			fit_image_print_verification_data(fit, noffset, p);
+		}
+	}
+}
+#endif
+
+/**
+ * fit_get_desc - get node description property
+ * @fit: pointer to the FIT format image header
+ * @noffset: node offset
+ * @desc: double pointer to the char, will hold pointer to the descrption
+ *
+ * fit_get_desc() reads description property from a given node, if
+ * description is found pointer to it is returened in third call argument.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_get_desc(const void *fit, int noffset, char **desc)
+{
+	int len;
+
+	*desc = (char *)fdt_getprop(fit, noffset, FIT_DESC_PROP, &len);
+	if (*desc == NULL) {
+		fit_get_debug(fit, noffset, FIT_DESC_PROP, len);
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * fit_get_timestamp - get node timestamp property
+ * @fit: pointer to the FIT format image header
+ * @noffset: node offset
+ * @timestamp: pointer to the time_t, will hold read timestamp
+ *
+ * fit_get_timestamp() reads timestamp poperty from given node, if timestamp
+ * is found and has a correct size its value is retured in third call
+ * argument.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on property read failure
+ *     -2, on wrong timestamp size
+ */
+int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp)
+{
+	int len;
+	const void *data;
+
+	data = fdt_getprop(fit, noffset, FIT_TIMESTAMP_PROP, &len);
+	if (data == NULL) {
+		fit_get_debug(fit, noffset, FIT_TIMESTAMP_PROP, len);
+		return -1;
+	}
+	if (len != sizeof(uint32_t)) {
+		debug("FIT timestamp with incorrect size of (%u)\n", len);
+		return -2;
+	}
+
+	*timestamp = uimage_to_cpu(*((uint32_t *)data));
+	return 0;
+}
+
+/**
+ * fit_image_get_node - get node offset for component image of a given unit name
+ * @fit: pointer to the FIT format image header
+ * @image_uname: component image node unit name
+ *
+ * fit_image_get_node() finds a component image (withing the '/images'
+ * node) of a provided unit name. If image is found its node offset is
+ * returned to the caller.
+ *
+ * returns:
+ *     image node offset when found (>=0)
+ *     negative number on failure (FDT_ERR_* code)
+ */
+int fit_image_get_node(const void *fit, const char *image_uname)
+{
+	int noffset, images_noffset;
+
+	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images_noffset < 0) {
+		debug("Can't find images parent node '%s' (%s)\n",
+		      FIT_IMAGES_PATH, fdt_strerror(images_noffset));
+		return images_noffset;
+	}
+
+	noffset = fdt_subnode_offset(fit, images_noffset, image_uname);
+	if (noffset < 0) {
+		debug("Can't get node offset for image unit name: '%s' (%s)\n",
+		      image_uname, fdt_strerror(noffset));
+	}
+
+	return noffset;
+}
+
+/**
+ * fit_image_get_os - get os id for a given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @os: pointer to the uint8_t, will hold os numeric id
+ *
+ * fit_image_get_os() finds os property in a given component image node.
+ * If the property is found, its (string) value is translated to the numeric
+ * id which is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_os(const void *fit, int noffset, uint8_t *os)
+{
+	int len;
+	const void *data;
+
+	/* Get OS name from property data */
+	data = fdt_getprop(fit, noffset, FIT_OS_PROP, &len);
+	if (data == NULL) {
+		fit_get_debug(fit, noffset, FIT_OS_PROP, len);
+		*os = -1;
+		return -1;
+	}
+
+	/* Translate OS name to id */
+	*os = genimg_get_os_id(data);
+	return 0;
+}
+
+/**
+ * fit_image_get_arch - get arch id for a given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @arch: pointer to the uint8_t, will hold arch numeric id
+ *
+ * fit_image_get_arch() finds arch property in a given component image node.
+ * If the property is found, its (string) value is translated to the numeric
+ * id which is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_arch(const void *fit, int noffset, uint8_t *arch)
+{
+	int len;
+	const void *data;
+
+	/* Get architecture name from property data */
+	data = fdt_getprop(fit, noffset, FIT_ARCH_PROP, &len);
+	if (data == NULL) {
+		fit_get_debug(fit, noffset, FIT_ARCH_PROP, len);
+		*arch = -1;
+		return -1;
+	}
+
+	/* Translate architecture name to id */
+	*arch = genimg_get_arch_id(data);
+	return 0;
+}
+
+/**
+ * fit_image_get_type - get type id for a given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @type: pointer to the uint8_t, will hold type numeric id
+ *
+ * fit_image_get_type() finds type property in a given component image node.
+ * If the property is found, its (string) value is translated to the numeric
+ * id which is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_type(const void *fit, int noffset, uint8_t *type)
+{
+	int len;
+	const void *data;
+
+	/* Get image type name from property data */
+	data = fdt_getprop(fit, noffset, FIT_TYPE_PROP, &len);
+	if (data == NULL) {
+		fit_get_debug(fit, noffset, FIT_TYPE_PROP, len);
+		*type = -1;
+		return -1;
+	}
+
+	/* Translate image type name to id */
+	*type = genimg_get_type_id(data);
+	return 0;
+}
+
+/**
+ * fit_image_get_comp - get comp id for a given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @comp: pointer to the uint8_t, will hold comp numeric id
+ *
+ * fit_image_get_comp() finds comp property in a given component image node.
+ * If the property is found, its (string) value is translated to the numeric
+ * id which is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp)
+{
+	int len;
+	const void *data;
+
+	/* Get compression name from property data */
+	data = fdt_getprop(fit, noffset, FIT_COMP_PROP, &len);
+	if (data == NULL) {
+		fit_get_debug(fit, noffset, FIT_COMP_PROP, len);
+		*comp = -1;
+		return -1;
+	}
+
+	/* Translate compression name to id */
+	*comp = genimg_get_comp_id(data);
+	return 0;
+}
+
+/**
+ * fit_image_get_load() - get load addr property for given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @load: pointer to the uint32_t, will hold load address
+ *
+ * fit_image_get_load() finds load address property in a given component
+ * image node. If the property is found, its value is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_load(const void *fit, int noffset, ulong *load)
+{
+	int len;
+	const uint32_t *data;
+
+	data = fdt_getprop(fit, noffset, FIT_LOAD_PROP, &len);
+	if (data == NULL) {
+		fit_get_debug(fit, noffset, FIT_LOAD_PROP, len);
+		return -1;
+	}
+
+	*load = uimage_to_cpu(*data);
+	return 0;
+}
+
+/**
+ * fit_image_get_entry() - get entry point address property
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @entry: pointer to the uint32_t, will hold entry point address
+ *
+ * This gets the entry point address property for a given component image
+ * node.
+ *
+ * fit_image_get_entry() finds entry point address property in a given
+ * component image node.  If the property is found, its value is returned
+ * to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_entry(const void *fit, int noffset, ulong *entry)
+{
+	int len;
+	const uint32_t *data;
+
+	data = fdt_getprop(fit, noffset, FIT_ENTRY_PROP, &len);
+	if (data == NULL) {
+		fit_get_debug(fit, noffset, FIT_ENTRY_PROP, len);
+		return -1;
+	}
+
+	*entry = uimage_to_cpu(*data);
+	return 0;
+}
+
+/**
+ * fit_image_get_data - get data property and its size for a given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @data: double pointer to void, will hold data property's data address
+ * @size: pointer to size_t, will hold data property's data size
+ *
+ * fit_image_get_data() finds data property in a given component image node.
+ * If the property is found its data start address and size are returned to
+ * the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_data(const void *fit, int noffset,
+		const void **data, size_t *size)
+{
+	int len;
+
+	*data = fdt_getprop(fit, noffset, FIT_DATA_PROP, &len);
+	if (*data == NULL) {
+		fit_get_debug(fit, noffset, FIT_DATA_PROP, len);
+		*size = 0;
+		return -1;
+	}
+
+	*size = len;
+	return 0;
+}
+
+/**
+ * fit_image_hash_get_algo - get hash algorithm name
+ * @fit: pointer to the FIT format image header
+ * @noffset: hash node offset
+ * @algo: double pointer to char, will hold pointer to the algorithm name
+ *
+ * fit_image_hash_get_algo() finds hash algorithm property in a given hash node.
+ * If the property is found its data start address is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_hash_get_algo(const void *fit, int noffset, char **algo)
+{
+	int len;
+
+	*algo = (char *)fdt_getprop(fit, noffset, FIT_ALGO_PROP, &len);
+	if (*algo == NULL) {
+		fit_get_debug(fit, noffset, FIT_ALGO_PROP, len);
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * fit_image_hash_get_value - get hash value and length
+ * @fit: pointer to the FIT format image header
+ * @noffset: hash node offset
+ * @value: double pointer to uint8_t, will hold address of a hash value data
+ * @value_len: pointer to an int, will hold hash data length
+ *
+ * fit_image_hash_get_value() finds hash value property in a given hash node.
+ * If the property is found its data start address and size are returned to
+ * the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
+				int *value_len)
+{
+	int len;
+
+	*value = (uint8_t *)fdt_getprop(fit, noffset, FIT_VALUE_PROP, &len);
+	if (*value == NULL) {
+		fit_get_debug(fit, noffset, FIT_VALUE_PROP, len);
+		*value_len = 0;
+		return -1;
+	}
+
+	*value_len = len;
+	return 0;
+}
+
+/**
+ * fit_image_hash_get_ignore - get hash ignore flag
+ * @fit: pointer to the FIT format image header
+ * @noffset: hash node offset
+ * @ignore: pointer to an int, will hold hash ignore flag
+ *
+ * fit_image_hash_get_ignore() finds hash ignore property in a given hash node.
+ * If the property is found and non-zero, the hash algorithm is not verified by
+ * u-boot automatically.
+ *
+ * returns:
+ *     0, on ignore not found
+ *     value, on ignore found
+ */
+static int fit_image_hash_get_ignore(const void *fit, int noffset, int *ignore)
+{
+	int len;
+	int *value;
+
+	value = (int *)fdt_getprop(fit, noffset, FIT_IGNORE_PROP, &len);
+	if (value == NULL || len != sizeof(int))
+		*ignore = 0;
+	else
+		*ignore = *value;
+
+	return 0;
+}
+
+/**
+ * fit_set_timestamp - set node timestamp property
+ * @fit: pointer to the FIT format image header
+ * @noffset: node offset
+ * @timestamp: timestamp value to be set
+ *
+ * fit_set_timestamp() attempts to set timestamp property in the requested
+ * node and returns operation status to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on property read failure
+ */
+int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
+{
+	uint32_t t;
+	int ret;
+
+	t = cpu_to_uimage(timestamp);
+	ret = fdt_setprop(fit, noffset, FIT_TIMESTAMP_PROP, &t,
+				sizeof(uint32_t));
+	if (ret) {
+		printf("Can't set '%s' property for '%s' node (%s)\n",
+		       FIT_TIMESTAMP_PROP, fit_get_name(fit, noffset, NULL),
+		       fdt_strerror(ret));
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * calculate_hash - calculate and return hash for provided input data
+ * @data: pointer to the input data
+ * @data_len: data length
+ * @algo: requested hash algorithm
+ * @value: pointer to the char, will hold hash value data (caller must
+ * allocate enough free space)
+ * value_len: length of the calculated hash
+ *
+ * calculate_hash() computes input data hash according to the requested
+ * algorithm.
+ * Resulting hash value is placed in caller provided 'value' buffer, length
+ * of the calculated hash is returned via value_len pointer argument.
+ *
+ * returns:
+ *     0, on success
+ *    -1, when algo is unsupported
+ */
+int calculate_hash(const void *data, int data_len, const char *algo,
+			uint8_t *value, int *value_len)
+{
+	if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
+		*((uint32_t *)value) = crc32_wd(0, data, data_len,
+							CHUNKSZ_CRC32);
+		*((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
+		*value_len = 4;
+	} else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
+		sha1_csum_wd((unsigned char *)data, data_len,
+			     (unsigned char *)value, CHUNKSZ_SHA1);
+		*value_len = 20;
+	} else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
+		md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
+		*value_len = 16;
+	} else {
+		debug("Unsupported hash alogrithm\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int fit_image_check_hash(const void *fit, int noffset, const void *data,
+				size_t size, char **err_msgp)
+{
+	uint8_t value[FIT_MAX_HASH_LEN];
+	int value_len;
+	char *algo;
+	uint8_t *fit_value;
+	int fit_value_len;
+	int ignore;
+
+	*err_msgp = NULL;
+
+	if (fit_image_hash_get_algo(fit, noffset, &algo)) {
+		*err_msgp = "Can't get hash algo property";
+		return -1;
+	}
+	printf("%s", algo);
+
+	if (IMAGE_ENABLE_IGNORE) {
+		fit_image_hash_get_ignore(fit, noffset, &ignore);
+		if (ignore) {
+			printf("-skipped ");
+			return 0;
+		}
+	}
+
+	if (fit_image_hash_get_value(fit, noffset, &fit_value,
+				     &fit_value_len)) {
+		*err_msgp = "Can't get hash value property";
+		return -1;
+	}
+
+	if (calculate_hash(data, size, algo, value, &value_len)) {
+		*err_msgp = "Unsupported hash algorithm";
+		return -1;
+	}
+
+	if (value_len != fit_value_len) {
+		*err_msgp = "Bad hash value len";
+		return -1;
+	} else if (memcmp(value, fit_value, value_len) != 0) {
+		*err_msgp = "Bad hash value";
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * fit_image_verify - verify data intergity
+ * @fit: pointer to the FIT format image header
+ * @image_noffset: component image node offset
+ *
+ * fit_image_verify() goes over component image hash nodes,
+ * re-calculates each data hash and compares with the value stored in hash
+ * node.
+ *
+ * returns:
+ *     1, if all hashes are valid
+ *     0, otherwise (or on error)
+ */
+int fit_image_verify(const void *fit, int image_noffset)
+{
+	const void	*data;
+	size_t		size;
+	int		noffset;
+	char		*err_msg = "";
+
+	/* Get image data and data length */
+	if (fit_image_get_data(fit, image_noffset, &data, &size)) {
+		err_msg = "Can't get image data/size";
+		return 0;
+	}
+
+	/* Process all hash subnodes of the component image node */
+	for (noffset = fdt_first_subnode(fit, image_noffset);
+	     noffset >= 0;
+	     noffset = fdt_next_subnode(fit, noffset)) {
+		const char *name = fit_get_name(fit, noffset, NULL);
+
+		/*
+		 * Check subnode name, must be equal to "hash".
+		 * Multiple hash nodes require unique unit node
+		 * names, e.g. hash@1, hash@2, etc.
+		 */
+		if (!strncmp(name, FIT_HASH_NODENAME,
+			     strlen(FIT_HASH_NODENAME))) {
+			if (fit_image_check_hash(fit, noffset, data, size,
+						 &err_msg))
+				goto error;
+			puts("+ ");
+		}
+	}
+
+	if (noffset == -FDT_ERR_TRUNCATED || noffset == -FDT_ERR_BADSTRUCTURE) {
+		err_msg = "Corrupted or truncated tree";
+		goto error;
+	}
+
+	return 1;
+
+error:
+	printf(" error!\n%s for '%s' hash node in '%s' image node\n",
+	       err_msg, fit_get_name(fit, noffset, NULL),
+	       fit_get_name(fit, image_noffset, NULL));
+	return 0;
+}
+
+/**
+ * fit_all_image_verify - verify data intergity for all images
+ * @fit: pointer to the FIT format image header
+ *
+ * fit_all_image_verify() goes over all images in the FIT and
+ * for every images checks if all it's hashes are valid.
+ *
+ * returns:
+ *     1, if all hashes of all images are valid
+ *     0, otherwise (or on error)
+ */
+int fit_all_image_verify(const void *fit)
+{
+	int images_noffset;
+	int noffset;
+	int ndepth;
+	int count;
+
+	/* Find images parent node offset */
+	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images_noffset < 0) {
+		printf("Can't find images parent node '%s' (%s)\n",
+		       FIT_IMAGES_PATH, fdt_strerror(images_noffset));
+		return 0;
+	}
+
+	/* Process all image subnodes, check hashes for each */
+	printf("## Checking hash(es) for FIT Image at %08lx ...\n",
+	       (ulong)fit);
+	for (ndepth = 0, count = 0,
+	     noffset = fdt_next_node(fit, images_noffset, &ndepth);
+			(noffset >= 0) && (ndepth > 0);
+			noffset = fdt_next_node(fit, noffset, &ndepth)) {
+		if (ndepth == 1) {
+			/*
+			 * Direct child node of the images parent node,
+			 * i.e. component image node.
+			 */
+			printf("   Hash(es) for Image %u (%s): ", count++,
+			       fit_get_name(fit, noffset, NULL));
+
+			if (!fit_image_verify(fit, noffset))
+				return 0;
+			printf("\n");
+		}
+	}
+	return 1;
+}
+
+/**
+ * fit_image_check_os - check whether image node is of a given os type
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @os: requested image os
+ *
+ * fit_image_check_os() reads image os property and compares its numeric
+ * id with the requested os. Comparison result is returned to the caller.
+ *
+ * returns:
+ *     1 if image is of given os type
+ *     0 otherwise (or on error)
+ */
+int fit_image_check_os(const void *fit, int noffset, uint8_t os)
+{
+	uint8_t image_os;
+
+	if (fit_image_get_os(fit, noffset, &image_os))
+		return 0;
+	return (os == image_os);
+}
+
+/**
+ * fit_image_check_arch - check whether image node is of a given arch
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @arch: requested imagearch
+ *
+ * fit_image_check_arch() reads image arch property and compares its numeric
+ * id with the requested arch. Comparison result is returned to the caller.
+ *
+ * returns:
+ *     1 if image is of given arch
+ *     0 otherwise (or on error)
+ */
+int fit_image_check_arch(const void *fit, int noffset, uint8_t arch)
+{
+	uint8_t image_arch;
+
+	if (fit_image_get_arch(fit, noffset, &image_arch))
+		return 0;
+	return (arch == image_arch);
+}
+
+/**
+ * fit_image_check_type - check whether image node is of a given type
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @type: requested image type
+ *
+ * fit_image_check_type() reads image type property and compares its numeric
+ * id with the requested type. Comparison result is returned to the caller.
+ *
+ * returns:
+ *     1 if image is of given type
+ *     0 otherwise (or on error)
+ */
+int fit_image_check_type(const void *fit, int noffset, uint8_t type)
+{
+	uint8_t image_type;
+
+	if (fit_image_get_type(fit, noffset, &image_type))
+		return 0;
+	return (type == image_type);
+}
+
+/**
+ * fit_image_check_comp - check whether image node uses given compression
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @comp: requested image compression type
+ *
+ * fit_image_check_comp() reads image compression property and compares its
+ * numeric id with the requested compression type. Comparison result is
+ * returned to the caller.
+ *
+ * returns:
+ *     1 if image uses requested compression
+ *     0 otherwise (or on error)
+ */
+int fit_image_check_comp(const void *fit, int noffset, uint8_t comp)
+{
+	uint8_t image_comp;
+
+	if (fit_image_get_comp(fit, noffset, &image_comp))
+		return 0;
+	return (comp == image_comp);
+}
+
+/**
+ * fit_check_format - sanity check FIT image format
+ * @fit: pointer to the FIT format image header
+ *
+ * fit_check_format() runs a basic sanity FIT image verification.
+ * Routine checks for mandatory properties, nodes, etc.
+ *
+ * returns:
+ *     1, on success
+ *     0, on failure
+ */
+int fit_check_format(const void *fit)
+{
+	/* mandatory / node 'description' property */
+	if (fdt_getprop(fit, 0, FIT_DESC_PROP, NULL) == NULL) {
+		debug("Wrong FIT format: no description\n");
+		return 0;
+	}
+
+	if (IMAGE_ENABLE_TIMESTAMP) {
+		/* mandatory / node 'timestamp' property */
+		if (fdt_getprop(fit, 0, FIT_TIMESTAMP_PROP, NULL) == NULL) {
+			debug("Wrong FIT format: no timestamp\n");
+			return 0;
+		}
+	}
+
+	/* mandatory subimages parent '/images' node */
+	if (fdt_path_offset(fit, FIT_IMAGES_PATH) < 0) {
+		debug("Wrong FIT format: no images parent node\n");
+		return 0;
+	}
+
+	return 1;
+}
+
+
+/**
+ * fit_conf_find_compat
+ * @fit: pointer to the FIT format image header
+ * @fdt: pointer to the device tree to compare against
+ *
+ * fit_conf_find_compat() attempts to find the configuration whose fdt is the
+ * most compatible with the passed in device tree.
+ *
+ * Example:
+ *
+ * / o image-tree
+ *   |-o images
+ *   | |-o fdt@1
+ *   | |-o fdt@2
+ *   |
+ *   |-o configurations
+ *     |-o config@1
+ *     | |-fdt = fdt@1
+ *     |
+ *     |-o config@2
+ *       |-fdt = fdt@2
+ *
+ * / o U-Boot fdt
+ *   |-compatible = "foo,bar", "bim,bam"
+ *
+ * / o kernel fdt1
+ *   |-compatible = "foo,bar",
+ *
+ * / o kernel fdt2
+ *   |-compatible = "bim,bam", "baz,biz"
+ *
+ * Configuration 1 would be picked because the first string in U-Boot's
+ * compatible list, "foo,bar", matches a compatible string in the root of fdt1.
+ * "bim,bam" in fdt2 matches the second string which isn't as good as fdt1.
+ *
+ * returns:
+ *     offset to the configuration to use if one was found
+ *     -1 otherwise
+ */
+int fit_conf_find_compat(const void *fit, const void *fdt)
+{
+	int ndepth = 0;
+	int noffset, confs_noffset, images_noffset;
+	const void *fdt_compat;
+	int fdt_compat_len;
+	int best_match_offset = 0;
+	int best_match_pos = 0;
+
+	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
+	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (confs_noffset < 0 || images_noffset < 0) {
+		debug("Can't find configurations or images nodes.\n");
+		return -1;
+	}
+
+	fdt_compat = fdt_getprop(fdt, 0, "compatible", &fdt_compat_len);
+	if (!fdt_compat) {
+		debug("Fdt for comparison has no \"compatible\" property.\n");
+		return -1;
+	}
+
+	/*
+	 * Loop over the configurations in the FIT image.
+	 */
+	for (noffset = fdt_next_node(fit, confs_noffset, &ndepth);
+			(noffset >= 0) && (ndepth > 0);
+			noffset = fdt_next_node(fit, noffset, &ndepth)) {
+		const void *kfdt;
+		const char *kfdt_name;
+		int kfdt_noffset;
+		const char *cur_fdt_compat;
+		int len;
+		size_t size;
+		int i;
+
+		if (ndepth > 1)
+			continue;
+
+		kfdt_name = fdt_getprop(fit, noffset, "fdt", &len);
+		if (!kfdt_name) {
+			debug("No fdt property found.\n");
+			continue;
+		}
+		kfdt_noffset = fdt_subnode_offset(fit, images_noffset,
+						  kfdt_name);
+		if (kfdt_noffset < 0) {
+			debug("No image node named \"%s\" found.\n",
+			      kfdt_name);
+			continue;
+		}
+		/*
+		 * Get a pointer to this configuration's fdt.
+		 */
+		if (fit_image_get_data(fit, kfdt_noffset, &kfdt, &size)) {
+			debug("Failed to get fdt \"%s\".\n", kfdt_name);
+			continue;
+		}
+
+		len = fdt_compat_len;
+		cur_fdt_compat = fdt_compat;
+		/*
+		 * Look for a match for each U-Boot compatibility string in
+		 * turn in this configuration's fdt.
+		 */
+		for (i = 0; len > 0 &&
+		     (!best_match_offset || best_match_pos > i); i++) {
+			int cur_len = strlen(cur_fdt_compat) + 1;
+
+			if (!fdt_node_check_compatible(kfdt, 0,
+						       cur_fdt_compat)) {
+				best_match_offset = noffset;
+				best_match_pos = i;
+				break;
+			}
+			len -= cur_len;
+			cur_fdt_compat += cur_len;
+		}
+	}
+	if (!best_match_offset) {
+		debug("No match found.\n");
+		return -1;
+	}
+
+	return best_match_offset;
+}
+
+/**
+ * fit_conf_get_node - get node offset for configuration of a given unit name
+ * @fit: pointer to the FIT format image header
+ * @conf_uname: configuration node unit name
+ *
+ * fit_conf_get_node() finds a configuration (withing the '/configurations'
+ * parant node) of a provided unit name. If configuration is found its node
+ * offset is returned to the caller.
+ *
+ * When NULL is provided in second argument fit_conf_get_node() will search
+ * for a default configuration node instead. Default configuration node unit
+ * name is retrived from FIT_DEFAULT_PROP property of the '/configurations'
+ * node.
+ *
+ * returns:
+ *     configuration node offset when found (>=0)
+ *     negative number on failure (FDT_ERR_* code)
+ */
+int fit_conf_get_node(const void *fit, const char *conf_uname)
+{
+	int noffset, confs_noffset;
+	int len;
+
+	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
+	if (confs_noffset < 0) {
+		debug("Can't find configurations parent node '%s' (%s)\n",
+		      FIT_CONFS_PATH, fdt_strerror(confs_noffset));
+		return confs_noffset;
+	}
+
+	if (conf_uname == NULL) {
+		/* get configuration unit name from the default property */
+		debug("No configuration specified, trying default...\n");
+		conf_uname = (char *)fdt_getprop(fit, confs_noffset,
+						 FIT_DEFAULT_PROP, &len);
+		if (conf_uname == NULL) {
+			fit_get_debug(fit, confs_noffset, FIT_DEFAULT_PROP,
+				      len);
+			return len;
+		}
+		debug("Found default configuration: '%s'\n", conf_uname);
+	}
+
+	noffset = fdt_subnode_offset(fit, confs_noffset, conf_uname);
+	if (noffset < 0) {
+		debug("Can't get node offset for configuration unit name: '%s' (%s)\n",
+		      conf_uname, fdt_strerror(noffset));
+	}
+
+	return noffset;
+}
+
+int fit_conf_get_prop_node(const void *fit, int noffset,
+		const char *prop_name)
+{
+	char *uname;
+	int len;
+
+	/* get kernel image unit name from configuration kernel property */
+	uname = (char *)fdt_getprop(fit, noffset, prop_name, &len);
+	if (uname == NULL)
+		return len;
+
+	return fit_image_get_node(fit, uname);
+}
+
+/**
+ * fit_conf_get_kernel_node - get kernel image node offset that corresponds to
+ * a given configuration
+ * @fit: pointer to the FIT format image header
+ * @noffset: configuration node offset
+ *
+ * fit_conf_get_kernel_node() retrives kernel image node unit name from
+ * configuration FIT_KERNEL_PROP property and translates it to the node
+ * offset.
+ *
+ * returns:
+ *     image node offset when found (>=0)
+ *     negative number on failure (FDT_ERR_* code)
+ */
+int fit_conf_get_kernel_node(const void *fit, int noffset)
+{
+	return fit_conf_get_prop_node(fit, noffset, FIT_KERNEL_PROP);
+}
+
+/**
+ * fit_conf_get_ramdisk_node - get ramdisk image node offset that corresponds to
+ * a given configuration
+ * @fit: pointer to the FIT format image header
+ * @noffset: configuration node offset
+ *
+ * fit_conf_get_ramdisk_node() retrives ramdisk image node unit name from
+ * configuration FIT_KERNEL_PROP property and translates it to the node
+ * offset.
+ *
+ * returns:
+ *     image node offset when found (>=0)
+ *     negative number on failure (FDT_ERR_* code)
+ */
+int fit_conf_get_ramdisk_node(const void *fit, int noffset)
+{
+	return fit_conf_get_prop_node(fit, noffset, FIT_RAMDISK_PROP);
+}
+
+/**
+ * fit_conf_get_fdt_node - get fdt image node offset that corresponds to
+ * a given configuration
+ * @fit: pointer to the FIT format image header
+ * @noffset: configuration node offset
+ *
+ * fit_conf_get_fdt_node() retrives fdt image node unit name from
+ * configuration FIT_KERNEL_PROP property and translates it to the node
+ * offset.
+ *
+ * returns:
+ *     image node offset when found (>=0)
+ *     negative number on failure (FDT_ERR_* code)
+ */
+int fit_conf_get_fdt_node(const void *fit, int noffset)
+{
+	return fit_conf_get_prop_node(fit, noffset, FIT_FDT_PROP);
+}
+
+/**
+ * fit_conf_print - prints out the FIT configuration details
+ * @fit: pointer to the FIT format image header
+ * @noffset: offset of the configuration node
+ * @p: pointer to prefix string
+ *
+ * fit_conf_print() lists all mandatory properies for the processed
+ * configuration node.
+ *
+ * returns:
+ *     no returned results
+ */
+void fit_conf_print(const void *fit, int noffset, const char *p)
+{
+	char *desc;
+	char *uname;
+	int ret;
+
+	/* Mandatory properties */
+	ret = fit_get_desc(fit, noffset, &desc);
+	printf("%s  Description:  ", p);
+	if (ret)
+		printf("unavailable\n");
+	else
+		printf("%s\n", desc);
+
+	uname = (char *)fdt_getprop(fit, noffset, FIT_KERNEL_PROP, NULL);
+	printf("%s  Kernel:       ", p);
+	if (uname == NULL)
+		printf("unavailable\n");
+	else
+		printf("%s\n", uname);
+
+	/* Optional properties */
+	uname = (char *)fdt_getprop(fit, noffset, FIT_RAMDISK_PROP, NULL);
+	if (uname)
+		printf("%s  Init Ramdisk: %s\n", p, uname);
+
+	uname = (char *)fdt_getprop(fit, noffset, FIT_FDT_PROP, NULL);
+	if (uname)
+		printf("%s  FDT:          %s\n", p, uname);
+}
+
+/**
+ * fit_check_ramdisk - verify FIT format ramdisk subimage
+ * @fit_hdr: pointer to the FIT ramdisk header
+ * @rd_noffset: ramdisk subimage node offset within FIT image
+ * @arch: requested ramdisk image architecture type
+ * @verify: data CRC verification flag
+ *
+ * fit_check_ramdisk() verifies integrity of the ramdisk subimage and from
+ * specified FIT image.
+ *
+ * returns:
+ *     1, on success
+ *     0, on failure
+ */
+int fit_check_ramdisk(const void *fit, int rd_noffset, uint8_t arch,
+			int verify)
+{
+	fit_image_print(fit, rd_noffset, "   ");
+
+	if (verify) {
+		puts("   Verifying Hash Integrity ... ");
+		if (!fit_image_verify(fit, rd_noffset)) {
+			puts("Bad Data Hash\n");
+			bootstage_error(BOOTSTAGE_ID_FIT_RD_HASH);
+			return 0;
+		}
+		puts("OK\n");
+	}
+
+	bootstage_mark(BOOTSTAGE_ID_FIT_RD_CHECK_ALL);
+	if (!fit_image_check_os(fit, rd_noffset, IH_OS_LINUX) ||
+	    !fit_image_check_arch(fit, rd_noffset, arch) ||
+	    !fit_image_check_type(fit, rd_noffset, IH_TYPE_RAMDISK)) {
+		printf("No Linux %s Ramdisk Image\n",
+		       genimg_get_arch_name(arch));
+		bootstage_error(BOOTSTAGE_ID_FIT_RD_CHECK_ALL);
+		return 0;
+	}
+
+	bootstage_mark(BOOTSTAGE_ID_FIT_RD_CHECK_ALL_OK);
+	return 1;
+}
diff --git a/common/image.c b/common/image.c
index 60c21270398..e91c89e1c5d 100644
--- a/common/image.c
+++ b/common/image.c
@@ -39,9 +39,7 @@
 #include <logbuff.h>
 #endif
 
-#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE)
 #include <rtc.h>
-#endif
 
 #include <environment.h>
 #include <image.h>
@@ -51,13 +49,9 @@
 #include <fdt_support.h>
 #endif
 
-#if defined(CONFIG_FIT)
 #include <u-boot/md5.h>
 #include <sha1.h>
-
-static int fit_check_ramdisk(const void *fit, int os_noffset,
-		uint8_t arch, int verify);
-#endif
+#include <asm/io.h>
 
 #ifdef CONFIG_CMD_BDI
 extern int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
@@ -76,6 +70,10 @@ static const image_header_t *image_get_ramdisk(ulong rd_addr, uint8_t arch,
 
 #include <u-boot/crc.h>
 
+#ifndef CONFIG_SYS_BARGSIZE
+#define CONFIG_SYS_BARGSIZE 512
+#endif
+
 static const table_entry_t uimage_arch[] = {
 	{	IH_ARCH_INVALID,	NULL,		"Invalid ARCH",	},
 	{	IH_ARCH_ALPHA,		"alpha",	"Alpha",	},
@@ -97,6 +95,7 @@ static const table_entry_t uimage_arch[] = {
 	{	IH_ARCH_AVR32,		"avr32",	"AVR32",	},
 	{	IH_ARCH_NDS32,		"nds32",	"NDS32",	},
 	{	IH_ARCH_OPENRISC,	"or1k",		"OpenRISC 1000",},
+	{	IH_ARCH_SANDBOX,	"sandbox",	"Sandbox",	},
 	{	-1,			"",		"",		},
 };
 
@@ -163,10 +162,6 @@ static const table_entry_t uimage_comp[] = {
 	{	-1,		"",		"",			},
 };
 
-#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || defined(USE_HOSTCC)
-static void genimg_print_time(time_t timestamp);
-#endif
-
 /*****************************************************************************/
 /* Legacy format routines */
 /*****************************************************************************/
@@ -305,17 +300,12 @@ void image_print_contents(const void *ptr)
 	const image_header_t *hdr = (const image_header_t *)ptr;
 	const char *p;
 
-#ifdef USE_HOSTCC
-	p = "";
-#else
-	p = "   ";
-#endif
-
+	p = IMAGE_INDENT_STRING;
 	printf("%sImage Name:   %.*s\n", p, IH_NMLEN, image_get_name(hdr));
-#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || defined(USE_HOSTCC)
-	printf("%sCreated:      ", p);
-	genimg_print_time((time_t)image_get_time(hdr));
-#endif
+	if (IMAGE_ENABLE_TIMESTAMP) {
+		printf("%sCreated:      ", p);
+		genimg_print_time((time_t)image_get_time(hdr));
+	}
 	printf("%sImage Type:   ", p);
 	image_print_type(hdr);
 	printf("%sData Size:    ", p);
@@ -524,8 +514,8 @@ void genimg_print_size(uint32_t size)
 #endif
 }
 
-#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || defined(USE_HOSTCC)
-static void genimg_print_time(time_t timestamp)
+#if IMAGE_ENABLE_TIMESTAMP
+void genimg_print_time(time_t timestamp)
 {
 #ifndef USE_HOSTCC
 	struct rtc_time tm;
@@ -538,7 +528,7 @@ static void genimg_print_time(time_t timestamp)
 	printf("%s", ctime(&timestamp));
 #endif
 }
-#endif /* CONFIG_TIMESTAMP || CONFIG_CMD_DATE || USE_HOSTCC */
+#endif
 
 /**
  * get_table_entry_name - translate entry id to long name
@@ -672,7 +662,7 @@ int genimg_get_comp_id(const char *name)
  * returns:
  *     image format type or IMAGE_FORMAT_INVALID if no image is present
  */
-int genimg_get_format(void *img_addr)
+int genimg_get_format(const void *img_addr)
 {
 	ulong format = IMAGE_FORMAT_INVALID;
 	const image_header_t *hdr;
@@ -712,6 +702,8 @@ ulong genimg_get_image(ulong img_addr)
 	ulong h_size, d_size;
 
 	if (addr_dataflash(img_addr)) {
+		void *buf;
+
 		/* ger RAM address */
 		ram_addr = CONFIG_SYS_LOAD_ADDR;
 
@@ -726,20 +718,20 @@ ulong genimg_get_image(ulong img_addr)
 		debug("   Reading image header from dataflash address "
 			"%08lx to RAM address %08lx\n", img_addr, ram_addr);
 
-		read_dataflash(img_addr, h_size, (char *)ram_addr);
+		buf = map_sysmem(ram_addr, 0);
+		read_dataflash(img_addr, h_size, buf);
 
 		/* get data size */
-		switch (genimg_get_format((void *)ram_addr)) {
+		switch (genimg_get_format(buf)) {
 		case IMAGE_FORMAT_LEGACY:
-			d_size = image_get_data_size(
-					(const image_header_t *)ram_addr);
+			d_size = image_get_data_size(buf);
 			debug("   Legacy format image found at 0x%08lx, "
 					"size 0x%08lx\n",
 					ram_addr, d_size);
 			break;
 #if defined(CONFIG_FIT)
 		case IMAGE_FORMAT_FIT:
-			d_size = fit_get_size((const void *)ram_addr) - h_size;
+			d_size = fit_get_size(buf) - h_size;
 			debug("   FIT/FDT format image found at 0x%08lx, "
 					"size 0x%08lx\n",
 					ram_addr, d_size);
@@ -757,7 +749,7 @@ ulong genimg_get_image(ulong img_addr)
 			ram_addr + h_size);
 
 		read_dataflash(img_addr + h_size, d_size,
-				(char *)(ram_addr + h_size));
+				(char *)(buf + h_size));
 
 	}
 #endif /* CONFIG_HAS_DATAFLASH */
@@ -813,6 +805,7 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 	ulong rd_addr, rd_load;
 	ulong rd_data, rd_len;
 	const image_header_t *rd_hdr;
+	void *buf;
 #ifdef CONFIG_SUPPORT_RAW_INITRD
 	char *end;
 #endif
@@ -874,7 +867,7 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 			/* use FIT configuration provided in first bootm
 			 * command argument
 			 */
-			rd_addr = (ulong)images->fit_hdr_os;
+			rd_addr = map_to_sysmem(images->fit_hdr_os);
 			fit_uname_config = images->fit_uname_cfg;
 			debug("*  ramdisk: using config '%s' from image "
 					"at 0x%08lx\n",
@@ -884,7 +877,7 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 			 * Check whether configuration has ramdisk defined,
 			 * if not, don't try to use it, quit silently.
 			 */
-			fit_hdr = (void *)rd_addr;
+			fit_hdr = images->fit_hdr_os;
 			cfg_noffset = fit_conf_get_node(fit_hdr,
 							fit_uname_config);
 			if (cfg_noffset < 0) {
@@ -909,7 +902,8 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 		 * address provided in the second bootm argument
 		 * check image type, for FIT images get FIT node.
 		 */
-		switch (genimg_get_format((void *)rd_addr)) {
+		buf = map_sysmem(rd_addr, 0);
+		switch (genimg_get_format(buf)) {
 		case IMAGE_FORMAT_LEGACY:
 			printf("## Loading init Ramdisk from Legacy "
 					"Image at %08lx ...\n", rd_addr);
@@ -927,7 +921,7 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 			break;
 #if defined(CONFIG_FIT)
 		case IMAGE_FORMAT_FIT:
-			fit_hdr = (void *)rd_addr;
+			fit_hdr = buf;
 			printf("## Loading init Ramdisk from FIT "
 					"Image at %08lx ...\n", rd_addr);
 
@@ -1160,570 +1154,6 @@ error:
 }
 #endif /* CONFIG_SYS_BOOT_RAMDISK_HIGH */
 
-#ifdef CONFIG_OF_LIBFDT
-static void fdt_error(const char *msg)
-{
-	puts("ERROR: ");
-	puts(msg);
-	puts(" - must RESET the board to recover.\n");
-}
-
-static const image_header_t *image_get_fdt(ulong fdt_addr)
-{
-	const image_header_t *fdt_hdr = (const image_header_t *)fdt_addr;
-
-	image_print_contents(fdt_hdr);
-
-	puts("   Verifying Checksum ... ");
-	if (!image_check_hcrc(fdt_hdr)) {
-		fdt_error("fdt header checksum invalid");
-		return NULL;
-	}
-
-	if (!image_check_dcrc(fdt_hdr)) {
-		fdt_error("fdt checksum invalid");
-		return NULL;
-	}
-	puts("OK\n");
-
-	if (!image_check_type(fdt_hdr, IH_TYPE_FLATDT)) {
-		fdt_error("uImage is not a fdt");
-		return NULL;
-	}
-	if (image_get_comp(fdt_hdr) != IH_COMP_NONE) {
-		fdt_error("uImage is compressed");
-		return NULL;
-	}
-	if (fdt_check_header((char *)image_get_data(fdt_hdr)) != 0) {
-		fdt_error("uImage data is not a fdt");
-		return NULL;
-	}
-	return fdt_hdr;
-}
-
-/**
- * fit_check_fdt - verify FIT format FDT subimage
- * @fit_hdr: pointer to the FIT  header
- * fdt_noffset: FDT subimage node offset within FIT image
- * @verify: data CRC verification flag
- *
- * fit_check_fdt() verifies integrity of the FDT subimage and from
- * specified FIT image.
- *
- * returns:
- *     1, on success
- *     0, on failure
- */
-#if defined(CONFIG_FIT)
-static int fit_check_fdt(const void *fit, int fdt_noffset, int verify)
-{
-	fit_image_print(fit, fdt_noffset, "   ");
-
-	if (verify) {
-		puts("   Verifying Hash Integrity ... ");
-		if (!fit_image_check_hashes(fit, fdt_noffset)) {
-			fdt_error("Bad Data Hash");
-			return 0;
-		}
-		puts("OK\n");
-	}
-
-	if (!fit_image_check_type(fit, fdt_noffset, IH_TYPE_FLATDT)) {
-		fdt_error("Not a FDT image");
-		return 0;
-	}
-
-	if (!fit_image_check_comp(fit, fdt_noffset, IH_COMP_NONE)) {
-		fdt_error("FDT image is compressed");
-		return 0;
-	}
-
-	return 1;
-}
-#endif /* CONFIG_FIT */
-
-#ifndef CONFIG_SYS_FDT_PAD
-#define CONFIG_SYS_FDT_PAD 0x3000
-#endif
-
-#if defined(CONFIG_OF_LIBFDT)
-/**
- * boot_fdt_add_mem_rsv_regions - Mark the memreserve sections as unusable
- * @lmb: pointer to lmb handle, will be used for memory mgmt
- * @fdt_blob: pointer to fdt blob base address
- *
- * Adds the memreserve regions in the dtb to the lmb block.  Adding the
- * memreserve regions prevents u-boot from using them to store the initrd
- * or the fdt blob.
- */
-void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
-{
-	uint64_t addr, size;
-	int i, total;
-
-	if (fdt_check_header(fdt_blob) != 0)
-		return;
-
-	total = fdt_num_mem_rsv(fdt_blob);
-	for (i = 0; i < total; i++) {
-		if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
-			continue;
-		printf("   reserving fdt memory region: addr=%llx size=%llx\n",
-			(unsigned long long)addr, (unsigned long long)size);
-		lmb_reserve(lmb, addr, size);
-	}
-}
-
-/**
- * boot_relocate_fdt - relocate flat device tree
- * @lmb: pointer to lmb handle, will be used for memory mgmt
- * @of_flat_tree: pointer to a char* variable, will hold fdt start address
- * @of_size: pointer to a ulong variable, will hold fdt length
- *
- * boot_relocate_fdt() allocates a region of memory within the bootmap and
- * relocates the of_flat_tree into that region, even if the fdt is already in
- * the bootmap.  It also expands the size of the fdt by CONFIG_SYS_FDT_PAD
- * bytes.
- *
- * of_flat_tree and of_size are set to final (after relocation) values
- *
- * returns:
- *      0 - success
- *      1 - failure
- */
-int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size)
-{
-	void	*fdt_blob = *of_flat_tree;
-	void	*of_start = NULL;
-	char	*fdt_high;
-	ulong	of_len = 0;
-	int	err;
-	int	disable_relocation = 0;
-
-	/* nothing to do */
-	if (*of_size == 0)
-		return 0;
-
-	if (fdt_check_header(fdt_blob) != 0) {
-		fdt_error("image is not a fdt");
-		goto error;
-	}
-
-	/* position on a 4K boundary before the alloc_current */
-	/* Pad the FDT by a specified amount */
-	of_len = *of_size + CONFIG_SYS_FDT_PAD;
-
-	/* If fdt_high is set use it to select the relocation address */
-	fdt_high = getenv("fdt_high");
-	if (fdt_high) {
-		void *desired_addr = (void *)simple_strtoul(fdt_high, NULL, 16);
-
-		if (((ulong) desired_addr) == ~0UL) {
-			/* All ones means use fdt in place */
-			of_start = fdt_blob;
-			lmb_reserve(lmb, (ulong)of_start, of_len);
-			disable_relocation = 1;
-		} else if (desired_addr) {
-			of_start =
-			    (void *)(ulong) lmb_alloc_base(lmb, of_len, 0x1000,
-							   (ulong)desired_addr);
-			if (of_start == NULL) {
-				puts("Failed using fdt_high value for Device Tree");
-				goto error;
-			}
-		} else {
-			of_start =
-			    (void *)(ulong) lmb_alloc(lmb, of_len, 0x1000);
-		}
-	} else {
-		of_start =
-		    (void *)(ulong) lmb_alloc_base(lmb, of_len, 0x1000,
-						   getenv_bootm_mapsize()
-						   + getenv_bootm_low());
-	}
-
-	if (of_start == NULL) {
-		puts("device tree - allocation error\n");
-		goto error;
-	}
-
-	if (disable_relocation) {
-		/* We assume there is space after the existing fdt to use for padding */
-		fdt_set_totalsize(of_start, of_len);
-		printf("   Using Device Tree in place at %p, end %p\n",
-		       of_start, of_start + of_len - 1);
-	} else {
-		debug("## device tree at %p ... %p (len=%ld [0x%lX])\n",
-			fdt_blob, fdt_blob + *of_size - 1, of_len, of_len);
-
-		printf("   Loading Device Tree to %p, end %p ... ",
-			of_start, of_start + of_len - 1);
-
-		err = fdt_open_into(fdt_blob, of_start, of_len);
-		if (err != 0) {
-			fdt_error("fdt move failed");
-			goto error;
-		}
-		puts("OK\n");
-	}
-
-	*of_flat_tree = of_start;
-	*of_size = of_len;
-
-	set_working_fdt_addr(*of_flat_tree);
-	return 0;
-
-error:
-	return 1;
-}
-#endif /* CONFIG_OF_LIBFDT */
-
-/**
- * boot_get_fdt - main fdt handling routine
- * @argc: command argument count
- * @argv: command argument list
- * @images: pointer to the bootm images structure
- * @of_flat_tree: pointer to a char* variable, will hold fdt start address
- * @of_size: pointer to a ulong variable, will hold fdt length
- *
- * boot_get_fdt() is responsible for finding a valid flat device tree image.
- * Curently supported are the following ramdisk sources:
- *      - multicomponent kernel/ramdisk image,
- *      - commandline provided address of decicated ramdisk image.
- *
- * returns:
- *     0, if fdt image was found and valid, or skipped
- *     of_flat_tree and of_size are set to fdt start address and length if
- *     fdt image is found and valid
- *
- *     1, if fdt image is found but corrupted
- *     of_flat_tree and of_size are set to 0 if no fdt exists
- */
-int boot_get_fdt(int flag, int argc, char * const argv[],
-		bootm_headers_t *images, char **of_flat_tree, ulong *of_size)
-{
-	const image_header_t *fdt_hdr;
-	ulong		fdt_addr;
-	char		*fdt_blob = NULL;
-	ulong		image_start, image_data, image_end;
-	ulong		load_start, load_end;
-#if defined(CONFIG_FIT)
-	void		*fit_hdr;
-	const char	*fit_uname_config = NULL;
-	const char	*fit_uname_fdt = NULL;
-	ulong		default_addr;
-	int		cfg_noffset;
-	int		fdt_noffset;
-	const void	*data;
-	size_t		size;
-#endif
-
-	*of_flat_tree = NULL;
-	*of_size = 0;
-
-	if (argc > 3 || genimg_has_config(images)) {
-#if defined(CONFIG_FIT)
-		if (argc > 3) {
-			/*
-			 * If the FDT blob comes from the FIT image and the
-			 * FIT image address is omitted in the command line
-			 * argument, try to use ramdisk or os FIT image
-			 * address or default load address.
-			 */
-			if (images->fit_uname_rd)
-				default_addr = (ulong)images->fit_hdr_rd;
-			else if (images->fit_uname_os)
-				default_addr = (ulong)images->fit_hdr_os;
-			else
-				default_addr = load_addr;
-
-			if (fit_parse_conf(argv[3], default_addr,
-						&fdt_addr, &fit_uname_config)) {
-				debug("*  fdt: config '%s' from image at "
-						"0x%08lx\n",
-						fit_uname_config, fdt_addr);
-			} else if (fit_parse_subimage(argv[3], default_addr,
-						&fdt_addr, &fit_uname_fdt)) {
-				debug("*  fdt: subimage '%s' from image at "
-						"0x%08lx\n",
-						fit_uname_fdt, fdt_addr);
-			} else
-#endif
-			{
-				fdt_addr = simple_strtoul(argv[3], NULL, 16);
-				debug("*  fdt: cmdline image address = "
-						"0x%08lx\n",
-						fdt_addr);
-			}
-#if defined(CONFIG_FIT)
-		} else {
-			/* use FIT configuration provided in first bootm
-			 * command argument
-			 */
-			fdt_addr = (ulong)images->fit_hdr_os;
-			fit_uname_config = images->fit_uname_cfg;
-			debug("*  fdt: using config '%s' from image "
-					"at 0x%08lx\n",
-					fit_uname_config, fdt_addr);
-
-			/*
-			 * Check whether configuration has FDT blob defined,
-			 * if not quit silently.
-			 */
-			fit_hdr = (void *)fdt_addr;
-			cfg_noffset = fit_conf_get_node(fit_hdr,
-					fit_uname_config);
-			if (cfg_noffset < 0) {
-				debug("*  fdt: no such config\n");
-				return 0;
-			}
-
-			fdt_noffset = fit_conf_get_fdt_node(fit_hdr,
-					cfg_noffset);
-			if (fdt_noffset < 0) {
-				debug("*  fdt: no fdt in config\n");
-				return 0;
-			}
-		}
-#endif
-
-		debug("## Checking for 'FDT'/'FDT Image' at %08lx\n",
-				fdt_addr);
-
-		/* copy from dataflash if needed */
-		fdt_addr = genimg_get_image(fdt_addr);
-
-		/*
-		 * Check if there is an FDT image at the
-		 * address provided in the second bootm argument
-		 * check image type, for FIT images get a FIT node.
-		 */
-		switch (genimg_get_format((void *)fdt_addr)) {
-		case IMAGE_FORMAT_LEGACY:
-			/* verify fdt_addr points to a valid image header */
-			printf("## Flattened Device Tree from Legacy Image "
-					"at %08lx\n",
-					fdt_addr);
-			fdt_hdr = image_get_fdt(fdt_addr);
-			if (!fdt_hdr)
-				goto error;
-
-			/*
-			 * move image data to the load address,
-			 * make sure we don't overwrite initial image
-			 */
-			image_start = (ulong)fdt_hdr;
-			image_data = (ulong)image_get_data(fdt_hdr);
-			image_end = image_get_image_end(fdt_hdr);
-
-			load_start = image_get_load(fdt_hdr);
-			load_end = load_start + image_get_data_size(fdt_hdr);
-
-			if (load_start == image_start ||
-			    load_start == image_data) {
-				fdt_blob = (char *)image_data;
-				break;
-			}
-
-			if ((load_start < image_end) && (load_end > image_start)) {
-				fdt_error("fdt overwritten");
-				goto error;
-			}
-
-			debug("   Loading FDT from 0x%08lx to 0x%08lx\n",
-					image_data, load_start);
-
-			memmove((void *)load_start,
-					(void *)image_data,
-					image_get_data_size(fdt_hdr));
-
-			fdt_blob = (char *)load_start;
-			break;
-		case IMAGE_FORMAT_FIT:
-			/*
-			 * This case will catch both: new uImage format
-			 * (libfdt based) and raw FDT blob (also libfdt
-			 * based).
-			 */
-#if defined(CONFIG_FIT)
-			/* check FDT blob vs FIT blob */
-			if (fit_check_format((const void *)fdt_addr)) {
-				/*
-				 * FIT image
-				 */
-				fit_hdr = (void *)fdt_addr;
-				printf("## Flattened Device Tree from FIT "
-						"Image at %08lx\n",
-						fdt_addr);
-
-				if (!fit_uname_fdt) {
-					/*
-					 * no FDT blob image node unit name,
-					 * try to get config node first. If
-					 * config unit node name is NULL
-					 * fit_conf_get_node() will try to
-					 * find default config node
-					 */
-					cfg_noffset = fit_conf_get_node(fit_hdr,
-							fit_uname_config);
-
-					if (cfg_noffset < 0) {
-						fdt_error("Could not find "
-							    "configuration "
-							    "node\n");
-						goto error;
-					}
-
-					fit_uname_config = fdt_get_name(fit_hdr,
-							cfg_noffset, NULL);
-					printf("   Using '%s' configuration\n",
-							fit_uname_config);
-
-					fdt_noffset = fit_conf_get_fdt_node(
-							fit_hdr,
-							cfg_noffset);
-					fit_uname_fdt = fit_get_name(fit_hdr,
-							fdt_noffset, NULL);
-				} else {
-					/* get FDT component image node offset */
-					fdt_noffset = fit_image_get_node(
-								fit_hdr,
-								fit_uname_fdt);
-				}
-				if (fdt_noffset < 0) {
-					fdt_error("Could not find subimage "
-							"node\n");
-					goto error;
-				}
-
-				printf("   Trying '%s' FDT blob subimage\n",
-						fit_uname_fdt);
-
-				if (!fit_check_fdt(fit_hdr, fdt_noffset,
-							images->verify))
-					goto error;
-
-				/* get ramdisk image data address and length */
-				if (fit_image_get_data(fit_hdr, fdt_noffset,
-							&data, &size)) {
-					fdt_error("Could not find FDT "
-							"subimage data");
-					goto error;
-				}
-
-				/* verift that image data is a proper FDT blob */
-				if (fdt_check_header((char *)data) != 0) {
-					fdt_error("Subimage data is not a FTD");
-					goto error;
-				}
-
-				/*
-				 * move image data to the load address,
-				 * make sure we don't overwrite initial image
-				 */
-				image_start = (ulong)fit_hdr;
-				image_end = fit_get_end(fit_hdr);
-
-				if (fit_image_get_load(fit_hdr, fdt_noffset,
-							&load_start) == 0) {
-					load_end = load_start + size;
-
-					if ((load_start < image_end) &&
-							(load_end > image_start)) {
-						fdt_error("FDT overwritten");
-						goto error;
-					}
-
-					printf("   Loading FDT from 0x%08lx "
-							"to 0x%08lx\n",
-							(ulong)data,
-							load_start);
-
-					memmove((void *)load_start,
-							(void *)data, size);
-
-					fdt_blob = (char *)load_start;
-				} else {
-					fdt_blob = (char *)data;
-				}
-
-				images->fit_hdr_fdt = fit_hdr;
-				images->fit_uname_fdt = fit_uname_fdt;
-				images->fit_noffset_fdt = fdt_noffset;
-				break;
-			} else
-#endif
-			{
-				/*
-				 * FDT blob
-				 */
-				fdt_blob = (char *)fdt_addr;
-				debug("*  fdt: raw FDT blob\n");
-				printf("## Flattened Device Tree blob at "
-					"%08lx\n", (long)fdt_blob);
-			}
-			break;
-		default:
-			puts("ERROR: Did not find a cmdline Flattened Device "
-				"Tree\n");
-			goto error;
-		}
-
-		printf("   Booting using the fdt blob at 0x%p\n", fdt_blob);
-
-	} else if (images->legacy_hdr_valid &&
-			image_check_type(&images->legacy_hdr_os_copy,
-						IH_TYPE_MULTI)) {
-
-		ulong fdt_data, fdt_len;
-
-		/*
-		 * Now check if we have a legacy multi-component image,
-		 * get second entry data start address and len.
-		 */
-		printf("## Flattened Device Tree from multi "
-			"component Image at %08lX\n",
-			(ulong)images->legacy_hdr_os);
-
-		image_multi_getimg(images->legacy_hdr_os, 2, &fdt_data,
-					&fdt_len);
-		if (fdt_len) {
-
-			fdt_blob = (char *)fdt_data;
-			printf("   Booting using the fdt at 0x%p\n", fdt_blob);
-
-			if (fdt_check_header(fdt_blob) != 0) {
-				fdt_error("image is not a fdt");
-				goto error;
-			}
-
-			if (fdt_totalsize(fdt_blob) != fdt_len) {
-				fdt_error("fdt size != image size");
-				goto error;
-			}
-		} else {
-			debug("## No Flattened Device Tree\n");
-			return 0;
-		}
-	} else {
-		debug("## No Flattened Device Tree\n");
-		return 0;
-	}
-
-	*of_flat_tree = fdt_blob;
-	*of_size = fdt_totalsize(fdt_blob);
-	debug("   of_flat_tree at 0x%08lx size 0x%08lx\n",
-			(ulong)*of_flat_tree, *of_size);
-
-	return 0;
-
-error:
-	*of_flat_tree = NULL;
-	*of_size = 0;
-	return 1;
-}
-#endif /* CONFIG_OF_LIBFDT */
-
 #ifdef CONFIG_SYS_BOOT_GET_CMDLINE
 /**
  * boot_get_cmdline - allocate and initialize kernel cmdline
@@ -1797,1608 +1227,50 @@ int boot_get_kbd(struct lmb *lmb, bd_t **kbd)
 	return 0;
 }
 #endif /* CONFIG_SYS_BOOT_GET_KBD */
-#endif /* !USE_HOSTCC */
 
-#if defined(CONFIG_FIT)
-/*****************************************************************************/
-/* New uImage format routines */
-/*****************************************************************************/
-#ifndef USE_HOSTCC
-static int fit_parse_spec(const char *spec, char sepc, ulong addr_curr,
-		ulong *addr, const char **name)
+#ifdef CONFIG_LMB
+int image_setup_linux(bootm_headers_t *images)
 {
-	const char *sep;
-
-	*addr = addr_curr;
-	*name = NULL;
-
-	sep = strchr(spec, sepc);
-	if (sep) {
-		if (sep - spec > 0)
-			*addr = simple_strtoul(spec, NULL, 16);
-
-		*name = sep + 1;
-		return 1;
-	}
-
-	return 0;
-}
-
-/**
- * fit_parse_conf - parse FIT configuration spec
- * @spec: input string, containing configuration spec
- * @add_curr: current image address (to be used as a possible default)
- * @addr: pointer to a ulong variable, will hold FIT image address of a given
- * configuration
- * @conf_name double pointer to a char, will hold pointer to a configuration
- * unit name
- *
- * fit_parse_conf() expects configuration spec in the for of [<addr>]#<conf>,
- * where <addr> is a FIT image address that contains configuration
- * with a <conf> unit name.
- *
- * Address part is optional, and if omitted default add_curr will
- * be used instead.
- *
- * returns:
- *     1 if spec is a valid configuration string,
- *     addr and conf_name are set accordingly
- *     0 otherwise
- */
-int fit_parse_conf(const char *spec, ulong addr_curr,
-		ulong *addr, const char **conf_name)
-{
-	return fit_parse_spec(spec, '#', addr_curr, addr, conf_name);
-}
-
-/**
- * fit_parse_subimage - parse FIT subimage spec
- * @spec: input string, containing subimage spec
- * @add_curr: current image address (to be used as a possible default)
- * @addr: pointer to a ulong variable, will hold FIT image address of a given
- * subimage
- * @image_name: double pointer to a char, will hold pointer to a subimage name
- *
- * fit_parse_subimage() expects subimage spec in the for of
- * [<addr>]:<subimage>, where <addr> is a FIT image address that contains
- * subimage with a <subimg> unit name.
- *
- * Address part is optional, and if omitted default add_curr will
- * be used instead.
- *
- * returns:
- *     1 if spec is a valid subimage string,
- *     addr and image_name are set accordingly
- *     0 otherwise
- */
-int fit_parse_subimage(const char *spec, ulong addr_curr,
-		ulong *addr, const char **image_name)
-{
-	return fit_parse_spec(spec, ':', addr_curr, addr, image_name);
-}
-#endif /* !USE_HOSTCC */
-
-static void fit_get_debug(const void *fit, int noffset,
-		char *prop_name, int err)
-{
-	debug("Can't get '%s' property from FIT 0x%08lx, "
-		"node: offset %d, name %s (%s)\n",
-		prop_name, (ulong)fit, noffset,
-		fit_get_name(fit, noffset, NULL),
-		fdt_strerror(err));
-}
-
-/**
- * fit_print_contents - prints out the contents of the FIT format image
- * @fit: pointer to the FIT format image header
- * @p: pointer to prefix string
- *
- * fit_print_contents() formats a multi line FIT image contents description.
- * The routine prints out FIT image properties (root node level) follwed by
- * the details of each component image.
- *
- * returns:
- *     no returned results
- */
-void fit_print_contents(const void *fit)
-{
-	char *desc;
-	char *uname;
-	int images_noffset;
-	int confs_noffset;
-	int noffset;
-	int ndepth;
-	int count = 0;
+	ulong of_size = images->ft_len;
+	char **of_flat_tree = &images->ft_addr;
+	ulong *initrd_start = &images->initrd_start;
+	ulong *initrd_end = &images->initrd_end;
+	struct lmb *lmb = &images->lmb;
+	ulong rd_len;
 	int ret;
-	const char *p;
-#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || defined(USE_HOSTCC)
-	time_t timestamp;
-#endif
 
-#ifdef USE_HOSTCC
-	p = "";
-#else
-	p = "   ";
-#endif
+	if (IMAGE_ENABLE_OF_LIBFDT)
+		boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree);
 
-	/* Root node properties */
-	ret = fit_get_desc(fit, 0, &desc);
-	printf("%sFIT description: ", p);
-	if (ret)
-		printf("unavailable\n");
-	else
-		printf("%s\n", desc);
-
-#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || defined(USE_HOSTCC)
-	ret = fit_get_timestamp(fit, 0, &timestamp);
-	printf("%sCreated:         ", p);
-	if (ret)
-		printf("unavailable\n");
-	else
-		genimg_print_time(timestamp);
-#endif
-
-	/* Find images parent node offset */
-	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
-	if (images_noffset < 0) {
-		printf("Can't find images parent node '%s' (%s)\n",
-			FIT_IMAGES_PATH, fdt_strerror(images_noffset));
-		return;
-	}
-
-	/* Process its subnodes, print out component images details */
-	for (ndepth = 0, count = 0,
-		noffset = fdt_next_node(fit, images_noffset, &ndepth);
-	     (noffset >= 0) && (ndepth > 0);
-	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		if (ndepth == 1) {
-			/*
-			 * Direct child node of the images parent node,
-			 * i.e. component image node.
-			 */
-			printf("%s Image %u (%s)\n", p, count++,
-					fit_get_name(fit, noffset, NULL));
-
-			fit_image_print(fit, noffset, p);
-		}
-	}
-
-	/* Find configurations parent node offset */
-	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
-	if (confs_noffset < 0) {
-		debug("Can't get configurations parent node '%s' (%s)\n",
-			FIT_CONFS_PATH, fdt_strerror(confs_noffset));
-		return;
-	}
-
-	/* get default configuration unit name from default property */
-	uname = (char *)fdt_getprop(fit, noffset, FIT_DEFAULT_PROP, NULL);
-	if (uname)
-		printf("%s Default Configuration: '%s'\n", p, uname);
-
-	/* Process its subnodes, print out configurations details */
-	for (ndepth = 0, count = 0,
-		noffset = fdt_next_node(fit, confs_noffset, &ndepth);
-	     (noffset >= 0) && (ndepth > 0);
-	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		if (ndepth == 1) {
-			/*
-			 * Direct child node of the configurations parent node,
-			 * i.e. configuration node.
-			 */
-			printf("%s Configuration %u (%s)\n", p, count++,
-					fit_get_name(fit, noffset, NULL));
-
-			fit_conf_print(fit, noffset, p);
+	if (IMAGE_BOOT_GET_CMDLINE) {
+		ret = boot_get_cmdline(lmb, &images->cmdline_start,
+				&images->cmdline_end);
+		if (ret) {
+			puts("ERROR with allocation of cmdline\n");
+			return ret;
 		}
 	}
-}
-
-/**
- * fit_image_print - prints out the FIT component image details
- * @fit: pointer to the FIT format image header
- * @image_noffset: offset of the component image node
- * @p: pointer to prefix string
- *
- * fit_image_print() lists all mandatory properies for the processed component
- * image. If present, hash nodes are printed out as well. Load
- * address for images of type firmware is also printed out. Since the load
- * address is not mandatory for firmware images, it will be output as
- * "unavailable" when not present.
- *
- * returns:
- *     no returned results
- */
-void fit_image_print(const void *fit, int image_noffset, const char *p)
-{
-	char *desc;
-	uint8_t type, arch, os, comp;
-	size_t size;
-	ulong load, entry;
-	const void *data;
-	int noffset;
-	int ndepth;
-	int ret;
-
-	/* Mandatory properties */
-	ret = fit_get_desc(fit, image_noffset, &desc);
-	printf("%s  Description:  ", p);
-	if (ret)
-		printf("unavailable\n");
-	else
-		printf("%s\n", desc);
-
-	fit_image_get_type(fit, image_noffset, &type);
-	printf("%s  Type:         %s\n", p, genimg_get_type_name(type));
-
-	fit_image_get_comp(fit, image_noffset, &comp);
-	printf("%s  Compression:  %s\n", p, genimg_get_comp_name(comp));
-
-	ret = fit_image_get_data(fit, image_noffset, &data, &size);
-
-#ifndef USE_HOSTCC
-	printf("%s  Data Start:   ", p);
-	if (ret)
-		printf("unavailable\n");
-	else
-		printf("0x%08lx\n", (ulong)data);
-#endif
-
-	printf("%s  Data Size:    ", p);
-	if (ret)
-		printf("unavailable\n");
-	else
-		genimg_print_size(size);
-
-	/* Remaining, type dependent properties */
-	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
-	    (type == IH_TYPE_RAMDISK) || (type == IH_TYPE_FIRMWARE) ||
-	    (type == IH_TYPE_FLATDT)) {
-		fit_image_get_arch(fit, image_noffset, &arch);
-		printf("%s  Architecture: %s\n", p, genimg_get_arch_name(arch));
-	}
-
-	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_RAMDISK)) {
-		fit_image_get_os(fit, image_noffset, &os);
-		printf("%s  OS:           %s\n", p, genimg_get_os_name(os));
-	}
-
-	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
-		(type == IH_TYPE_FIRMWARE) || (type == IH_TYPE_RAMDISK)) {
-		ret = fit_image_get_load(fit, image_noffset, &load);
-		printf("%s  Load Address: ", p);
+	if (IMAGE_ENABLE_RAMDISK_HIGH) {
+		rd_len = images->rd_end - images->rd_start;
+		ret = boot_ramdisk_high(lmb, images->rd_start, rd_len,
+				initrd_start, initrd_end);
 		if (ret)
-			printf("unavailable\n");
-		else
-			printf("0x%08lx\n", load);
+			return ret;
 	}
 
-	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
-		(type == IH_TYPE_RAMDISK)) {
-		fit_image_get_entry(fit, image_noffset, &entry);
-		printf("%s  Entry Point:  ", p);
+	if (IMAGE_ENABLE_OF_LIBFDT) {
+		ret = boot_relocate_fdt(lmb, of_flat_tree, &of_size);
 		if (ret)
-			printf("unavailable\n");
-		else
-			printf("0x%08lx\n", entry);
-	}
-
-	/* Process all hash subnodes of the component image node */
-	for (ndepth = 0, noffset = fdt_next_node(fit, image_noffset, &ndepth);
-	     (noffset >= 0) && (ndepth > 0);
-	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		if (ndepth == 1) {
-			/* Direct child node of the component image node */
-			fit_image_print_hash(fit, noffset, p);
-		}
-	}
-}
-
-/**
- * fit_image_print_hash - prints out the hash node details
- * @fit: pointer to the FIT format image header
- * @noffset: offset of the hash node
- * @p: pointer to prefix string
- *
- * fit_image_print_hash() lists properies for the processed hash node
- *
- * returns:
- *     no returned results
- */
-void fit_image_print_hash(const void *fit, int noffset, const char *p)
-{
-	char *algo;
-	uint8_t *value;
-	int value_len;
-	int i, ret;
-
-	/*
-	 * Check subnode name, must be equal to "hash".
-	 * Multiple hash nodes require unique unit node
-	 * names, e.g. hash@1, hash@2, etc.
-	 */
-	if (strncmp(fit_get_name(fit, noffset, NULL),
-			FIT_HASH_NODENAME,
-			strlen(FIT_HASH_NODENAME)) != 0)
-		return;
-
-	debug("%s  Hash node:    '%s'\n", p,
-			fit_get_name(fit, noffset, NULL));
-
-	printf("%s  Hash algo:    ", p);
-	if (fit_image_hash_get_algo(fit, noffset, &algo)) {
-		printf("invalid/unsupported\n");
-		return;
-	}
-	printf("%s\n", algo);
-
-	ret = fit_image_hash_get_value(fit, noffset, &value,
-					&value_len);
-	printf("%s  Hash value:   ", p);
-	if (ret) {
-		printf("unavailable\n");
-	} else {
-		for (i = 0; i < value_len; i++)
-			printf("%02x", value[i]);
-		printf("\n");
-	}
-
-	debug("%s  Hash len:     %d\n", p, value_len);
-}
-
-/**
- * fit_get_desc - get node description property
- * @fit: pointer to the FIT format image header
- * @noffset: node offset
- * @desc: double pointer to the char, will hold pointer to the descrption
- *
- * fit_get_desc() reads description property from a given node, if
- * description is found pointer to it is returened in third call argument.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_get_desc(const void *fit, int noffset, char **desc)
-{
-	int len;
-
-	*desc = (char *)fdt_getprop(fit, noffset, FIT_DESC_PROP, &len);
-	if (*desc == NULL) {
-		fit_get_debug(fit, noffset, FIT_DESC_PROP, len);
-		return -1;
-	}
-
-	return 0;
-}
-
-/**
- * fit_get_timestamp - get node timestamp property
- * @fit: pointer to the FIT format image header
- * @noffset: node offset
- * @timestamp: pointer to the time_t, will hold read timestamp
- *
- * fit_get_timestamp() reads timestamp poperty from given node, if timestamp
- * is found and has a correct size its value is retured in third call
- * argument.
- *
- * returns:
- *     0, on success
- *     -1, on property read failure
- *     -2, on wrong timestamp size
- */
-int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp)
-{
-	int len;
-	const void *data;
-
-	data = fdt_getprop(fit, noffset, FIT_TIMESTAMP_PROP, &len);
-	if (data == NULL) {
-		fit_get_debug(fit, noffset, FIT_TIMESTAMP_PROP, len);
-		return -1;
-	}
-	if (len != sizeof(uint32_t)) {
-		debug("FIT timestamp with incorrect size of (%u)\n", len);
-		return -2;
-	}
-
-	*timestamp = uimage_to_cpu(*((uint32_t *)data));
-	return 0;
-}
-
-/**
- * fit_image_get_node - get node offset for component image of a given unit name
- * @fit: pointer to the FIT format image header
- * @image_uname: component image node unit name
- *
- * fit_image_get_node() finds a component image (withing the '/images'
- * node) of a provided unit name. If image is found its node offset is
- * returned to the caller.
- *
- * returns:
- *     image node offset when found (>=0)
- *     negative number on failure (FDT_ERR_* code)
- */
-int fit_image_get_node(const void *fit, const char *image_uname)
-{
-	int noffset, images_noffset;
-
-	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
-	if (images_noffset < 0) {
-		debug("Can't find images parent node '%s' (%s)\n",
-			FIT_IMAGES_PATH, fdt_strerror(images_noffset));
-		return images_noffset;
-	}
-
-	noffset = fdt_subnode_offset(fit, images_noffset, image_uname);
-	if (noffset < 0) {
-		debug("Can't get node offset for image unit name: '%s' (%s)\n",
-			image_uname, fdt_strerror(noffset));
-	}
-
-	return noffset;
-}
-
-/**
- * fit_image_get_os - get os id for a given component image node
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @os: pointer to the uint8_t, will hold os numeric id
- *
- * fit_image_get_os() finds os property in a given component image node.
- * If the property is found, its (string) value is translated to the numeric
- * id which is returned to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_get_os(const void *fit, int noffset, uint8_t *os)
-{
-	int len;
-	const void *data;
-
-	/* Get OS name from property data */
-	data = fdt_getprop(fit, noffset, FIT_OS_PROP, &len);
-	if (data == NULL) {
-		fit_get_debug(fit, noffset, FIT_OS_PROP, len);
-		*os = -1;
-		return -1;
-	}
-
-	/* Translate OS name to id */
-	*os = genimg_get_os_id(data);
-	return 0;
-}
-
-/**
- * fit_image_get_arch - get arch id for a given component image node
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @arch: pointer to the uint8_t, will hold arch numeric id
- *
- * fit_image_get_arch() finds arch property in a given component image node.
- * If the property is found, its (string) value is translated to the numeric
- * id which is returned to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_get_arch(const void *fit, int noffset, uint8_t *arch)
-{
-	int len;
-	const void *data;
-
-	/* Get architecture name from property data */
-	data = fdt_getprop(fit, noffset, FIT_ARCH_PROP, &len);
-	if (data == NULL) {
-		fit_get_debug(fit, noffset, FIT_ARCH_PROP, len);
-		*arch = -1;
-		return -1;
-	}
-
-	/* Translate architecture name to id */
-	*arch = genimg_get_arch_id(data);
-	return 0;
-}
-
-/**
- * fit_image_get_type - get type id for a given component image node
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @type: pointer to the uint8_t, will hold type numeric id
- *
- * fit_image_get_type() finds type property in a given component image node.
- * If the property is found, its (string) value is translated to the numeric
- * id which is returned to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_get_type(const void *fit, int noffset, uint8_t *type)
-{
-	int len;
-	const void *data;
-
-	/* Get image type name from property data */
-	data = fdt_getprop(fit, noffset, FIT_TYPE_PROP, &len);
-	if (data == NULL) {
-		fit_get_debug(fit, noffset, FIT_TYPE_PROP, len);
-		*type = -1;
-		return -1;
-	}
-
-	/* Translate image type name to id */
-	*type = genimg_get_type_id(data);
-	return 0;
-}
-
-/**
- * fit_image_get_comp - get comp id for a given component image node
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @comp: pointer to the uint8_t, will hold comp numeric id
- *
- * fit_image_get_comp() finds comp property in a given component image node.
- * If the property is found, its (string) value is translated to the numeric
- * id which is returned to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp)
-{
-	int len;
-	const void *data;
-
-	/* Get compression name from property data */
-	data = fdt_getprop(fit, noffset, FIT_COMP_PROP, &len);
-	if (data == NULL) {
-		fit_get_debug(fit, noffset, FIT_COMP_PROP, len);
-		*comp = -1;
-		return -1;
-	}
-
-	/* Translate compression name to id */
-	*comp = genimg_get_comp_id(data);
-	return 0;
-}
-
-/**
- * fit_image_get_load - get load address property for a given component image node
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @load: pointer to the uint32_t, will hold load address
- *
- * fit_image_get_load() finds load address property in a given component image node.
- * If the property is found, its value is returned to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_get_load(const void *fit, int noffset, ulong *load)
-{
-	int len;
-	const uint32_t *data;
-
-	data = fdt_getprop(fit, noffset, FIT_LOAD_PROP, &len);
-	if (data == NULL) {
-		fit_get_debug(fit, noffset, FIT_LOAD_PROP, len);
-		return -1;
-	}
-
-	*load = uimage_to_cpu(*data);
-	return 0;
-}
-
-/**
- * fit_image_get_entry - get entry point address property for a given component image node
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @entry: pointer to the uint32_t, will hold entry point address
- *
- * fit_image_get_entry() finds entry point address property in a given component image node.
- * If the property is found, its value is returned to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_get_entry(const void *fit, int noffset, ulong *entry)
-{
-	int len;
-	const uint32_t *data;
-
-	data = fdt_getprop(fit, noffset, FIT_ENTRY_PROP, &len);
-	if (data == NULL) {
-		fit_get_debug(fit, noffset, FIT_ENTRY_PROP, len);
-		return -1;
-	}
-
-	*entry = uimage_to_cpu(*data);
-	return 0;
-}
-
-/**
- * fit_image_get_data - get data property and its size for a given component image node
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @data: double pointer to void, will hold data property's data address
- * @size: pointer to size_t, will hold data property's data size
- *
- * fit_image_get_data() finds data property in a given component image node.
- * If the property is found its data start address and size are returned to
- * the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_get_data(const void *fit, int noffset,
-		const void **data, size_t *size)
-{
-	int len;
-
-	*data = fdt_getprop(fit, noffset, FIT_DATA_PROP, &len);
-	if (*data == NULL) {
-		fit_get_debug(fit, noffset, FIT_DATA_PROP, len);
-		*size = 0;
-		return -1;
-	}
-
-	*size = len;
-	return 0;
-}
-
-/**
- * fit_image_hash_get_algo - get hash algorithm name
- * @fit: pointer to the FIT format image header
- * @noffset: hash node offset
- * @algo: double pointer to char, will hold pointer to the algorithm name
- *
- * fit_image_hash_get_algo() finds hash algorithm property in a given hash node.
- * If the property is found its data start address is returned to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_hash_get_algo(const void *fit, int noffset, char **algo)
-{
-	int len;
-
-	*algo = (char *)fdt_getprop(fit, noffset, FIT_ALGO_PROP, &len);
-	if (*algo == NULL) {
-		fit_get_debug(fit, noffset, FIT_ALGO_PROP, len);
-		return -1;
-	}
-
-	return 0;
-}
-
-/**
- * fit_image_hash_get_value - get hash value and length
- * @fit: pointer to the FIT format image header
- * @noffset: hash node offset
- * @value: double pointer to uint8_t, will hold address of a hash value data
- * @value_len: pointer to an int, will hold hash data length
- *
- * fit_image_hash_get_value() finds hash value property in a given hash node.
- * If the property is found its data start address and size are returned to
- * the caller.
- *
- * returns:
- *     0, on success
- *     -1, on failure
- */
-int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
-				int *value_len)
-{
-	int len;
-
-	*value = (uint8_t *)fdt_getprop(fit, noffset, FIT_VALUE_PROP, &len);
-	if (*value == NULL) {
-		fit_get_debug(fit, noffset, FIT_VALUE_PROP, len);
-		*value_len = 0;
-		return -1;
-	}
-
-	*value_len = len;
-	return 0;
-}
-
-#ifndef USE_HOSTCC
-/**
- * fit_image_hash_get_ignore - get hash ignore flag
- * @fit: pointer to the FIT format image header
- * @noffset: hash node offset
- * @ignore: pointer to an int, will hold hash ignore flag
- *
- * fit_image_hash_get_ignore() finds hash ignore property in a given hash node.
- * If the property is found and non-zero, the hash algorithm is not verified by
- * u-boot automatically.
- *
- * returns:
- *     0, on ignore not found
- *     value, on ignore found
- */
-int fit_image_hash_get_ignore(const void *fit, int noffset, int *ignore)
-{
-	int len;
-	int *value;
-
-	value = (int *)fdt_getprop(fit, noffset, FIT_IGNORE_PROP, &len);
-	if (value == NULL || len != sizeof(int))
-		*ignore = 0;
-	else
-		*ignore = *value;
-
-	return 0;
-}
-#endif
-
-/**
- * fit_set_timestamp - set node timestamp property
- * @fit: pointer to the FIT format image header
- * @noffset: node offset
- * @timestamp: timestamp value to be set
- *
- * fit_set_timestamp() attempts to set timestamp property in the requested
- * node and returns operation status to the caller.
- *
- * returns:
- *     0, on success
- *     -1, on property read failure
- */
-int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
-{
-	uint32_t t;
-	int ret;
-
-	t = cpu_to_uimage(timestamp);
-	ret = fdt_setprop(fit, noffset, FIT_TIMESTAMP_PROP, &t,
-				sizeof(uint32_t));
-	if (ret) {
-		printf("Can't set '%s' property for '%s' node (%s)\n",
-			FIT_TIMESTAMP_PROP, fit_get_name(fit, noffset, NULL),
-			fdt_strerror(ret));
-		return -1;
-	}
-
-	return 0;
-}
-
-/**
- * calculate_hash - calculate and return hash for provided input data
- * @data: pointer to the input data
- * @data_len: data length
- * @algo: requested hash algorithm
- * @value: pointer to the char, will hold hash value data (caller must
- * allocate enough free space)
- * value_len: length of the calculated hash
- *
- * calculate_hash() computes input data hash according to the requested algorithm.
- * Resulting hash value is placed in caller provided 'value' buffer, length
- * of the calculated hash is returned via value_len pointer argument.
- *
- * returns:
- *     0, on success
- *    -1, when algo is unsupported
- */
-static int calculate_hash(const void *data, int data_len, const char *algo,
-			uint8_t *value, int *value_len)
-{
-	if (strcmp(algo, "crc32") == 0) {
-		*((uint32_t *)value) = crc32_wd(0, data, data_len,
-							CHUNKSZ_CRC32);
-		*((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
-		*value_len = 4;
-	} else if (strcmp(algo, "sha1") == 0) {
-		sha1_csum_wd((unsigned char *) data, data_len,
-				(unsigned char *) value, CHUNKSZ_SHA1);
-		*value_len = 20;
-	} else if (strcmp(algo, "md5") == 0) {
-		md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
-		*value_len = 16;
-	} else {
-		debug("Unsupported hash alogrithm\n");
-		return -1;
-	}
-	return 0;
-}
-
-#ifdef USE_HOSTCC
-/**
- * fit_set_hashes - process FIT component image nodes and calculate hashes
- * @fit: pointer to the FIT format image header
- *
- * fit_set_hashes() adds hash values for all component images in the FIT blob.
- * Hashes are calculated for all component images which have hash subnodes
- * with algorithm property set to one of the supported hash algorithms.
- *
- * returns
- *     0, on success
- *     libfdt error code, on failure
- */
-int fit_set_hashes(void *fit)
-{
-	int images_noffset;
-	int noffset;
-	int ndepth;
-	int ret;
-
-	/* Find images parent node offset */
-	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
-	if (images_noffset < 0) {
-		printf("Can't find images parent node '%s' (%s)\n",
-			FIT_IMAGES_PATH, fdt_strerror(images_noffset));
-		return images_noffset;
-	}
-
-	/* Process its subnodes, print out component images details */
-	for (ndepth = 0, noffset = fdt_next_node(fit, images_noffset, &ndepth);
-	     (noffset >= 0) && (ndepth > 0);
-	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		if (ndepth == 1) {
-			/*
-			 * Direct child node of the images parent node,
-			 * i.e. component image node.
-			 */
-			ret = fit_image_set_hashes(fit, noffset);
-			if (ret)
-				return ret;
-		}
-	}
-
-	return 0;
-}
-
-/**
- * fit_image_set_hashes - calculate/set hashes for given component image node
- * @fit: pointer to the FIT format image header
- * @image_noffset: requested component image node
- *
- * fit_image_set_hashes() adds hash values for an component image node. All
- * existing hash subnodes are checked, if algorithm property is set to one of
- * the supported hash algorithms, hash value is computed and corresponding
- * hash node property is set, for example:
- *
- * Input component image node structure:
- *
- * o image@1 (at image_noffset)
- *   | - data = [binary data]
- *   o hash@1
- *     |- algo = "sha1"
- *
- * Output component image node structure:
- *
- * o image@1 (at image_noffset)
- *   | - data = [binary data]
- *   o hash@1
- *     |- algo = "sha1"
- *     |- value = sha1(data)
- *
- * returns:
- *     0 on sucess
- *    <0 on failure
- */
-int fit_image_set_hashes(void *fit, int image_noffset)
-{
-	const void *data;
-	size_t size;
-	char *algo;
-	uint8_t value[FIT_MAX_HASH_LEN];
-	int value_len;
-	int noffset;
-	int ndepth;
-
-	/* Get image data and data length */
-	if (fit_image_get_data(fit, image_noffset, &data, &size)) {
-		printf("Can't get image data/size\n");
-		return -1;
-	}
-
-	/* Process all hash subnodes of the component image node */
-	for (ndepth = 0, noffset = fdt_next_node(fit, image_noffset, &ndepth);
-	     (noffset >= 0) && (ndepth > 0);
-	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		if (ndepth == 1) {
-			/* Direct child node of the component image node */
-
-			/*
-			 * Check subnode name, must be equal to "hash".
-			 * Multiple hash nodes require unique unit node
-			 * names, e.g. hash@1, hash@2, etc.
-			 */
-			if (strncmp(fit_get_name(fit, noffset, NULL),
-						FIT_HASH_NODENAME,
-						strlen(FIT_HASH_NODENAME)) != 0) {
-				/* Not a hash subnode, skip it */
-				continue;
-			}
-
-			if (fit_image_hash_get_algo(fit, noffset, &algo)) {
-				printf("Can't get hash algo property for "
-					"'%s' hash node in '%s' image node\n",
-					fit_get_name(fit, noffset, NULL),
-					fit_get_name(fit, image_noffset, NULL));
-				return -1;
-			}
-
-			if (calculate_hash(data, size, algo, value,
-						&value_len)) {
-				printf("Unsupported hash algorithm (%s) for "
-					"'%s' hash node in '%s' image node\n",
-					algo, fit_get_name(fit, noffset, NULL),
-					fit_get_name(fit, image_noffset,
-							NULL));
-				return -1;
-			}
-
-			if (fit_image_hash_set_value(fit, noffset, value,
-							value_len)) {
-				printf("Can't set hash value for "
-					"'%s' hash node in '%s' image node\n",
-					fit_get_name(fit, noffset, NULL),
-					fit_get_name(fit, image_noffset, NULL));
-				return -1;
-			}
-		}
-	}
-
-	return 0;
-}
-
-/**
- * fit_image_hash_set_value - set hash value in requested has node
- * @fit: pointer to the FIT format image header
- * @noffset: hash node offset
- * @value: hash value to be set
- * @value_len: hash value length
- *
- * fit_image_hash_set_value() attempts to set hash value in a node at offset
- * given and returns operation status to the caller.
- *
- * returns
- *     0, on success
- *     -1, on failure
- */
-int fit_image_hash_set_value(void *fit, int noffset, uint8_t *value,
-				int value_len)
-{
-	int ret;
-
-	ret = fdt_setprop(fit, noffset, FIT_VALUE_PROP, value, value_len);
-	if (ret) {
-		printf("Can't set hash '%s' property for '%s' node(%s)\n",
-			FIT_VALUE_PROP, fit_get_name(fit, noffset, NULL),
-			fdt_strerror(ret));
-		return -1;
-	}
-
-	return 0;
-}
-#endif /* USE_HOSTCC */
-
-/**
- * fit_image_check_hashes - verify data intergity
- * @fit: pointer to the FIT format image header
- * @image_noffset: component image node offset
- *
- * fit_image_check_hashes() goes over component image hash nodes,
- * re-calculates each data hash and compares with the value stored in hash
- * node.
- *
- * returns:
- *     1, if all hashes are valid
- *     0, otherwise (or on error)
- */
-int fit_image_check_hashes(const void *fit, int image_noffset)
-{
-	const void	*data;
-	size_t		size;
-	char		*algo;
-	uint8_t		*fit_value;
-	int		fit_value_len;
-#ifndef USE_HOSTCC
-	int		ignore;
-#endif
-	uint8_t		value[FIT_MAX_HASH_LEN];
-	int		value_len;
-	int		noffset;
-	int		ndepth;
-	char		*err_msg = "";
-
-	/* Get image data and data length */
-	if (fit_image_get_data(fit, image_noffset, &data, &size)) {
-		printf("Can't get image data/size\n");
-		return 0;
-	}
-
-	/* Process all hash subnodes of the component image node */
-	for (ndepth = 0, noffset = fdt_next_node(fit, image_noffset, &ndepth);
-	     (noffset >= 0) && (ndepth > 0);
-	     noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		if (ndepth == 1) {
-			/* Direct child node of the component image node */
-
-			/*
-			 * Check subnode name, must be equal to "hash".
-			 * Multiple hash nodes require unique unit node
-			 * names, e.g. hash@1, hash@2, etc.
-			 */
-			if (strncmp(fit_get_name(fit, noffset, NULL),
-					FIT_HASH_NODENAME,
-					strlen(FIT_HASH_NODENAME)) != 0)
-				continue;
-
-			if (fit_image_hash_get_algo(fit, noffset, &algo)) {
-				err_msg = " error!\nCan't get hash algo "
-						"property";
-				goto error;
-			}
-			printf("%s", algo);
-
-#ifndef USE_HOSTCC
-			fit_image_hash_get_ignore(fit, noffset, &ignore);
-			if (ignore) {
-				printf("-skipped ");
-				continue;
-			}
-#endif
-
-			if (fit_image_hash_get_value(fit, noffset, &fit_value,
-							&fit_value_len)) {
-				err_msg = " error!\nCan't get hash value "
-						"property";
-				goto error;
-			}
-
-			if (calculate_hash(data, size, algo, value,
-						&value_len)) {
-				err_msg = " error!\n"
-						"Unsupported hash algorithm";
-				goto error;
-			}
-
-			if (value_len != fit_value_len) {
-				err_msg = " error !\nBad hash value len";
-				goto error;
-			} else if (memcmp(value, fit_value, value_len) != 0) {
-				err_msg = " error!\nBad hash value";
-				goto error;
-			}
-			printf("+ ");
-		}
+			return ret;
 	}
 
-	if (noffset == -FDT_ERR_TRUNCATED || noffset == -FDT_ERR_BADSTRUCTURE) {
-		err_msg = " error!\nCorrupted or truncated tree";
-		goto error;
+	if (IMAGE_ENABLE_OF_LIBFDT && of_size) {
+		ret = image_setup_libfdt(images, *of_flat_tree, of_size, lmb);
+		if (ret)
+			return ret;
 	}
 
-	return 1;
-
-error:
-	printf("%s for '%s' hash node in '%s' image node\n",
-			err_msg, fit_get_name(fit, noffset, NULL),
-			fit_get_name(fit, image_noffset, NULL));
 	return 0;
 }
-
-/**
- * fit_all_image_check_hashes - verify data intergity for all images
- * @fit: pointer to the FIT format image header
- *
- * fit_all_image_check_hashes() goes over all images in the FIT and
- * for every images checks if all it's hashes are valid.
- *
- * returns:
- *     1, if all hashes of all images are valid
- *     0, otherwise (or on error)
- */
-int fit_all_image_check_hashes(const void *fit)
-{
-	int images_noffset;
-	int noffset;
-	int ndepth;
-	int count;
-
-	/* Find images parent node offset */
-	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
-	if (images_noffset < 0) {
-		printf("Can't find images parent node '%s' (%s)\n",
-			FIT_IMAGES_PATH, fdt_strerror(images_noffset));
-		return 0;
-	}
-
-	/* Process all image subnodes, check hashes for each */
-	printf("## Checking hash(es) for FIT Image at %08lx ...\n",
-		(ulong)fit);
-	for (ndepth = 0, count = 0,
-		noffset = fdt_next_node(fit, images_noffset, &ndepth);
-		(noffset >= 0) && (ndepth > 0);
-		noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		if (ndepth == 1) {
-			/*
-			 * Direct child node of the images parent node,
-			 * i.e. component image node.
-			 */
-			printf("   Hash(es) for Image %u (%s): ", count++,
-					fit_get_name(fit, noffset, NULL));
-
-			if (!fit_image_check_hashes(fit, noffset))
-				return 0;
-			printf("\n");
-		}
-	}
-	return 1;
-}
-
-/**
- * fit_image_check_os - check whether image node is of a given os type
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @os: requested image os
- *
- * fit_image_check_os() reads image os property and compares its numeric
- * id with the requested os. Comparison result is returned to the caller.
- *
- * returns:
- *     1 if image is of given os type
- *     0 otherwise (or on error)
- */
-int fit_image_check_os(const void *fit, int noffset, uint8_t os)
-{
-	uint8_t image_os;
-
-	if (fit_image_get_os(fit, noffset, &image_os))
-		return 0;
-	return (os == image_os);
-}
-
-/**
- * fit_image_check_arch - check whether image node is of a given arch
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @arch: requested imagearch
- *
- * fit_image_check_arch() reads image arch property and compares its numeric
- * id with the requested arch. Comparison result is returned to the caller.
- *
- * returns:
- *     1 if image is of given arch
- *     0 otherwise (or on error)
- */
-int fit_image_check_arch(const void *fit, int noffset, uint8_t arch)
-{
-	uint8_t image_arch;
-
-	if (fit_image_get_arch(fit, noffset, &image_arch))
-		return 0;
-	return (arch == image_arch);
-}
-
-/**
- * fit_image_check_type - check whether image node is of a given type
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @type: requested image type
- *
- * fit_image_check_type() reads image type property and compares its numeric
- * id with the requested type. Comparison result is returned to the caller.
- *
- * returns:
- *     1 if image is of given type
- *     0 otherwise (or on error)
- */
-int fit_image_check_type(const void *fit, int noffset, uint8_t type)
-{
-	uint8_t image_type;
-
-	if (fit_image_get_type(fit, noffset, &image_type))
-		return 0;
-	return (type == image_type);
-}
-
-/**
- * fit_image_check_comp - check whether image node uses given compression
- * @fit: pointer to the FIT format image header
- * @noffset: component image node offset
- * @comp: requested image compression type
- *
- * fit_image_check_comp() reads image compression property and compares its
- * numeric id with the requested compression type. Comparison result is
- * returned to the caller.
- *
- * returns:
- *     1 if image uses requested compression
- *     0 otherwise (or on error)
- */
-int fit_image_check_comp(const void *fit, int noffset, uint8_t comp)
-{
-	uint8_t image_comp;
-
-	if (fit_image_get_comp(fit, noffset, &image_comp))
-		return 0;
-	return (comp == image_comp);
-}
-
-/**
- * fit_check_format - sanity check FIT image format
- * @fit: pointer to the FIT format image header
- *
- * fit_check_format() runs a basic sanity FIT image verification.
- * Routine checks for mandatory properties, nodes, etc.
- *
- * returns:
- *     1, on success
- *     0, on failure
- */
-int fit_check_format(const void *fit)
-{
-	/* mandatory / node 'description' property */
-	if (fdt_getprop(fit, 0, FIT_DESC_PROP, NULL) == NULL) {
-		debug("Wrong FIT format: no description\n");
-		return 0;
-	}
-
-#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || defined(USE_HOSTCC)
-	/* mandatory / node 'timestamp' property */
-	if (fdt_getprop(fit, 0, FIT_TIMESTAMP_PROP, NULL) == NULL) {
-		debug("Wrong FIT format: no timestamp\n");
-		return 0;
-	}
-#endif
-
-	/* mandatory subimages parent '/images' node */
-	if (fdt_path_offset(fit, FIT_IMAGES_PATH) < 0) {
-		debug("Wrong FIT format: no images parent node\n");
-		return 0;
-	}
-
-	return 1;
-}
-
-
-/**
- * fit_conf_find_compat
- * @fit: pointer to the FIT format image header
- * @fdt: pointer to the device tree to compare against
- *
- * fit_conf_find_compat() attempts to find the configuration whose fdt is the
- * most compatible with the passed in device tree.
- *
- * Example:
- *
- * / o image-tree
- *   |-o images
- *   | |-o fdt@1
- *   | |-o fdt@2
- *   |
- *   |-o configurations
- *     |-o config@1
- *     | |-fdt = fdt@1
- *     |
- *     |-o config@2
- *       |-fdt = fdt@2
- *
- * / o U-Boot fdt
- *   |-compatible = "foo,bar", "bim,bam"
- *
- * / o kernel fdt1
- *   |-compatible = "foo,bar",
- *
- * / o kernel fdt2
- *   |-compatible = "bim,bam", "baz,biz"
- *
- * Configuration 1 would be picked because the first string in U-Boot's
- * compatible list, "foo,bar", matches a compatible string in the root of fdt1.
- * "bim,bam" in fdt2 matches the second string which isn't as good as fdt1.
- *
- * returns:
- *     offset to the configuration to use if one was found
- *     -1 otherwise
- */
-int fit_conf_find_compat(const void *fit, const void *fdt)
-{
-	int ndepth = 0;
-	int noffset, confs_noffset, images_noffset;
-	const void *fdt_compat;
-	int fdt_compat_len;
-	int best_match_offset = 0;
-	int best_match_pos = 0;
-
-	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
-	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
-	if (confs_noffset < 0 || images_noffset < 0) {
-		debug("Can't find configurations or images nodes.\n");
-		return -1;
-	}
-
-	fdt_compat = fdt_getprop(fdt, 0, "compatible", &fdt_compat_len);
-	if (!fdt_compat) {
-		debug("Fdt for comparison has no \"compatible\" property.\n");
-		return -1;
-	}
-
-	/*
-	 * Loop over the configurations in the FIT image.
-	 */
-	for (noffset = fdt_next_node(fit, confs_noffset, &ndepth);
-			(noffset >= 0) && (ndepth > 0);
-			noffset = fdt_next_node(fit, noffset, &ndepth)) {
-		const void *kfdt;
-		const char *kfdt_name;
-		int kfdt_noffset;
-		const char *cur_fdt_compat;
-		int len;
-		size_t size;
-		int i;
-
-		if (ndepth > 1)
-			continue;
-
-		kfdt_name = fdt_getprop(fit, noffset, "fdt", &len);
-		if (!kfdt_name) {
-			debug("No fdt property found.\n");
-			continue;
-		}
-		kfdt_noffset = fdt_subnode_offset(fit, images_noffset,
-						  kfdt_name);
-		if (kfdt_noffset < 0) {
-			debug("No image node named \"%s\" found.\n",
-			      kfdt_name);
-			continue;
-		}
-		/*
-		 * Get a pointer to this configuration's fdt.
-		 */
-		if (fit_image_get_data(fit, kfdt_noffset, &kfdt, &size)) {
-			debug("Failed to get fdt \"%s\".\n", kfdt_name);
-			continue;
-		}
-
-		len = fdt_compat_len;
-		cur_fdt_compat = fdt_compat;
-		/*
-		 * Look for a match for each U-Boot compatibility string in
-		 * turn in this configuration's fdt.
-		 */
-		for (i = 0; len > 0 &&
-		     (!best_match_offset || best_match_pos > i); i++) {
-			int cur_len = strlen(cur_fdt_compat) + 1;
-
-			if (!fdt_node_check_compatible(kfdt, 0,
-						       cur_fdt_compat)) {
-				best_match_offset = noffset;
-				best_match_pos = i;
-				break;
-			}
-			len -= cur_len;
-			cur_fdt_compat += cur_len;
-		}
-	}
-	if (!best_match_offset) {
-		debug("No match found.\n");
-		return -1;
-	}
-
-	return best_match_offset;
-}
-
-/**
- * fit_conf_get_node - get node offset for configuration of a given unit name
- * @fit: pointer to the FIT format image header
- * @conf_uname: configuration node unit name
- *
- * fit_conf_get_node() finds a configuration (withing the '/configurations'
- * parant node) of a provided unit name. If configuration is found its node offset
- * is returned to the caller.
- *
- * When NULL is provided in second argument fit_conf_get_node() will search
- * for a default configuration node instead. Default configuration node unit name
- * is retrived from FIT_DEFAULT_PROP property of the '/configurations' node.
- *
- * returns:
- *     configuration node offset when found (>=0)
- *     negative number on failure (FDT_ERR_* code)
- */
-int fit_conf_get_node(const void *fit, const char *conf_uname)
-{
-	int noffset, confs_noffset;
-	int len;
-
-	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
-	if (confs_noffset < 0) {
-		debug("Can't find configurations parent node '%s' (%s)\n",
-			FIT_CONFS_PATH, fdt_strerror(confs_noffset));
-		return confs_noffset;
-	}
-
-	if (conf_uname == NULL) {
-		/* get configuration unit name from the default property */
-		debug("No configuration specified, trying default...\n");
-		conf_uname = (char *)fdt_getprop(fit, confs_noffset,
-						 FIT_DEFAULT_PROP, &len);
-		if (conf_uname == NULL) {
-			fit_get_debug(fit, confs_noffset, FIT_DEFAULT_PROP,
-					len);
-			return len;
-		}
-		debug("Found default configuration: '%s'\n", conf_uname);
-	}
-
-	noffset = fdt_subnode_offset(fit, confs_noffset, conf_uname);
-	if (noffset < 0) {
-		debug("Can't get node offset for configuration unit name: "
-			"'%s' (%s)\n",
-			conf_uname, fdt_strerror(noffset));
-	}
-
-	return noffset;
-}
-
-static int __fit_conf_get_prop_node(const void *fit, int noffset,
-		const char *prop_name)
-{
-	char *uname;
-	int len;
-
-	/* get kernel image unit name from configuration kernel property */
-	uname = (char *)fdt_getprop(fit, noffset, prop_name, &len);
-	if (uname == NULL)
-		return len;
-
-	return fit_image_get_node(fit, uname);
-}
-
-/**
- * fit_conf_get_kernel_node - get kernel image node offset that corresponds to
- * a given configuration
- * @fit: pointer to the FIT format image header
- * @noffset: configuration node offset
- *
- * fit_conf_get_kernel_node() retrives kernel image node unit name from
- * configuration FIT_KERNEL_PROP property and translates it to the node
- * offset.
- *
- * returns:
- *     image node offset when found (>=0)
- *     negative number on failure (FDT_ERR_* code)
- */
-int fit_conf_get_kernel_node(const void *fit, int noffset)
-{
-	return __fit_conf_get_prop_node(fit, noffset, FIT_KERNEL_PROP);
-}
-
-/**
- * fit_conf_get_ramdisk_node - get ramdisk image node offset that corresponds to
- * a given configuration
- * @fit: pointer to the FIT format image header
- * @noffset: configuration node offset
- *
- * fit_conf_get_ramdisk_node() retrives ramdisk image node unit name from
- * configuration FIT_KERNEL_PROP property and translates it to the node
- * offset.
- *
- * returns:
- *     image node offset when found (>=0)
- *     negative number on failure (FDT_ERR_* code)
- */
-int fit_conf_get_ramdisk_node(const void *fit, int noffset)
-{
-	return __fit_conf_get_prop_node(fit, noffset, FIT_RAMDISK_PROP);
-}
-
-/**
- * fit_conf_get_fdt_node - get fdt image node offset that corresponds to
- * a given configuration
- * @fit: pointer to the FIT format image header
- * @noffset: configuration node offset
- *
- * fit_conf_get_fdt_node() retrives fdt image node unit name from
- * configuration FIT_KERNEL_PROP property and translates it to the node
- * offset.
- *
- * returns:
- *     image node offset when found (>=0)
- *     negative number on failure (FDT_ERR_* code)
- */
-int fit_conf_get_fdt_node(const void *fit, int noffset)
-{
-	return __fit_conf_get_prop_node(fit, noffset, FIT_FDT_PROP);
-}
-
-/**
- * fit_conf_print - prints out the FIT configuration details
- * @fit: pointer to the FIT format image header
- * @noffset: offset of the configuration node
- * @p: pointer to prefix string
- *
- * fit_conf_print() lists all mandatory properies for the processed
- * configuration node.
- *
- * returns:
- *     no returned results
- */
-void fit_conf_print(const void *fit, int noffset, const char *p)
-{
-	char *desc;
-	char *uname;
-	int ret;
-
-	/* Mandatory properties */
-	ret = fit_get_desc(fit, noffset, &desc);
-	printf("%s  Description:  ", p);
-	if (ret)
-		printf("unavailable\n");
-	else
-		printf("%s\n", desc);
-
-	uname = (char *)fdt_getprop(fit, noffset, FIT_KERNEL_PROP, NULL);
-	printf("%s  Kernel:       ", p);
-	if (uname == NULL)
-		printf("unavailable\n");
-	else
-		printf("%s\n", uname);
-
-	/* Optional properties */
-	uname = (char *)fdt_getprop(fit, noffset, FIT_RAMDISK_PROP, NULL);
-	if (uname)
-		printf("%s  Init Ramdisk: %s\n", p, uname);
-
-	uname = (char *)fdt_getprop(fit, noffset, FIT_FDT_PROP, NULL);
-	if (uname)
-		printf("%s  FDT:          %s\n", p, uname);
-}
-
-/**
- * fit_check_ramdisk - verify FIT format ramdisk subimage
- * @fit_hdr: pointer to the FIT ramdisk header
- * @rd_noffset: ramdisk subimage node offset within FIT image
- * @arch: requested ramdisk image architecture type
- * @verify: data CRC verification flag
- *
- * fit_check_ramdisk() verifies integrity of the ramdisk subimage and from
- * specified FIT image.
- *
- * returns:
- *     1, on success
- *     0, on failure
- */
-#ifndef USE_HOSTCC
-static int fit_check_ramdisk(const void *fit, int rd_noffset, uint8_t arch,
-				int verify)
-{
-	fit_image_print(fit, rd_noffset, "   ");
-
-	if (verify) {
-		puts("   Verifying Hash Integrity ... ");
-		if (!fit_image_check_hashes(fit, rd_noffset)) {
-			puts("Bad Data Hash\n");
-			bootstage_error(BOOTSTAGE_ID_FIT_RD_HASH);
-			return 0;
-		}
-		puts("OK\n");
-	}
-
-	bootstage_mark(BOOTSTAGE_ID_FIT_RD_CHECK_ALL);
-	if (!fit_image_check_os(fit, rd_noffset, IH_OS_LINUX) ||
-	    !fit_image_check_arch(fit, rd_noffset, arch) ||
-	    !fit_image_check_type(fit, rd_noffset, IH_TYPE_RAMDISK)) {
-		printf("No Linux %s Ramdisk Image\n",
-				genimg_get_arch_name(arch));
-		bootstage_error(BOOTSTAGE_ID_FIT_RD_CHECK_ALL);
-		return 0;
-	}
-
-	bootstage_mark(BOOTSTAGE_ID_FIT_RD_CHECK_ALL_OK);
-	return 1;
-}
-#endif /* USE_HOSTCC */
-#endif /* CONFIG_FIT */
+#endif /* CONFIG_LMB */
+#endif /* !USE_HOSTCC */
diff --git a/common/spl/Makefile b/common/spl/Makefile
index da2afc11b35..a74563cc4fe 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -20,6 +20,7 @@ COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
 COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
 COBJS-$(CONFIG_SPL_ONENAND_SUPPORT) += spl_onenand.o
 COBJS-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
+COBJS-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
 endif
 
 COBJS	:= $(sort $(COBJS-y))
diff --git a/drivers/mmc/spl_mmc.c b/common/spl/spl_mmc.c
index 7efdcb88b73..7efdcb88b73 100644
--- a/drivers/mmc/spl_mmc.c
+++ b/common/spl/spl_mmc.c
diff --git a/common/update.c b/common/update.c
index 94d6a82aeb1..87941ec8a88 100644
--- a/common/update.c
+++ b/common/update.c
@@ -297,7 +297,7 @@ got_update_file:
 		printf("Processing update '%s' :",
 			fit_get_name(fit, noffset, NULL));
 
-		if (!fit_image_check_hashes(fit, noffset)) {
+		if (!fit_image_verify(fit, noffset)) {
 			printf("Error: invalid update hash, aborting\n");
 			ret = 1;
 			goto next_node;
diff --git a/common/usb.c b/common/usb.c
index 6fc0fc1c0ec..55fff5b1e83 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -57,17 +57,6 @@
 #include <asm/4xx_pci.h>
 #endif
 
-#ifdef DEBUG
-#define USB_DEBUG	1
-#define USB_HUB_DEBUG	1
-#else
-#define USB_DEBUG	0
-#define USB_HUB_DEBUG	0
-#endif
-
-#define USB_PRINTF(fmt, args...)	debug_cond(USB_DEBUG, fmt, ##args)
-#define USB_HUB_PRINTF(fmt, args...)	debug_cond(USB_HUB_DEBUG, fmt, ##args)
-
 #define USB_BUFSIZ	512
 
 static struct usb_device usb_dev[USB_MAX_DEVICE];
@@ -130,7 +119,7 @@ int usb_init(void)
 		usb_started = 1;
 	}
 
-	USB_PRINTF("scan end\n");
+	debug("scan end\n");
 	/* if we were not able to find at least one working bus, bail out */
 	if (!usb_started) {
 		puts("USB error: all controllers failed lowlevel init\n");
@@ -216,9 +205,9 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe,
 	setup_packet->value = cpu_to_le16(value);
 	setup_packet->index = cpu_to_le16(index);
 	setup_packet->length = cpu_to_le16(size);
-	USB_PRINTF("usb_control_msg: request: 0x%X, requesttype: 0x%X, " \
-		   "value 0x%X index 0x%X length 0x%X\n",
-		   request, requesttype, value, index, size);
+	debug("usb_control_msg: request: 0x%X, requesttype: 0x%X, " \
+	      "value 0x%X index 0x%X length 0x%X\n",
+	      request, requesttype, value, index, size);
 	dev->status = USB_ST_NOT_PROC; /*not yet processed */
 
 	if (submit_control_msg(dev, pipe, data, size, setup_packet) < 0)
@@ -314,22 +303,22 @@ usb_set_maxpacket_ep(struct usb_device *dev, int if_idx, int ep_idx)
 		/* Control => bidirectional */
 		dev->epmaxpacketout[b] = ep_wMaxPacketSize;
 		dev->epmaxpacketin[b] = ep_wMaxPacketSize;
-		USB_PRINTF("##Control EP epmaxpacketout/in[%d] = %d\n",
-			   b, dev->epmaxpacketin[b]);
+		debug("##Control EP epmaxpacketout/in[%d] = %d\n",
+		      b, dev->epmaxpacketin[b]);
 	} else {
 		if ((ep->bEndpointAddress & 0x80) == 0) {
 			/* OUT Endpoint */
 			if (ep_wMaxPacketSize > dev->epmaxpacketout[b]) {
 				dev->epmaxpacketout[b] = ep_wMaxPacketSize;
-				USB_PRINTF("##EP epmaxpacketout[%d] = %d\n",
-					   b, dev->epmaxpacketout[b]);
+				debug("##EP epmaxpacketout[%d] = %d\n",
+				      b, dev->epmaxpacketout[b]);
 			}
 		} else {
 			/* IN Endpoint */
 			if (ep_wMaxPacketSize > dev->epmaxpacketin[b]) {
 				dev->epmaxpacketin[b] = ep_wMaxPacketSize;
-				USB_PRINTF("##EP epmaxpacketin[%d] = %d\n",
-					   b, dev->epmaxpacketin[b]);
+				debug("##EP epmaxpacketin[%d] = %d\n",
+				      b, dev->epmaxpacketin[b]);
 			}
 		} /* if out */
 	} /* if control */
@@ -358,8 +347,8 @@ static int usb_parse_config(struct usb_device *dev,
 {
 	struct usb_descriptor_header *head;
 	int index, ifno, epno, curr_if_num;
-	int i;
 	u16 ep_wMaxPacketSize;
+	struct usb_interface *if_desc = NULL;
 
 	ifno = -1;
 	epno = -1;
@@ -387,23 +376,27 @@ static int usb_parse_config(struct usb_device *dev,
 			     &buffer[index])->bInterfaceNumber != curr_if_num) {
 				/* this is a new interface, copy new desc */
 				ifno = dev->config.no_of_if;
+				if_desc = &dev->config.if_desc[ifno];
 				dev->config.no_of_if++;
-				memcpy(&dev->config.if_desc[ifno],
-					&buffer[index], buffer[index]);
-				dev->config.if_desc[ifno].no_of_ep = 0;
-				dev->config.if_desc[ifno].num_altsetting = 1;
+				memcpy(if_desc,	&buffer[index], buffer[index]);
+				if_desc->no_of_ep = 0;
+				if_desc->num_altsetting = 1;
 				curr_if_num =
-				     dev->config.if_desc[ifno].desc.bInterfaceNumber;
+				     if_desc->desc.bInterfaceNumber;
 			} else {
 				/* found alternate setting for the interface */
-				dev->config.if_desc[ifno].num_altsetting++;
+				if (ifno >= 0) {
+					if_desc = &dev->config.if_desc[ifno];
+					if_desc->num_altsetting++;
+				}
 			}
 			break;
 		case USB_DT_ENDPOINT:
 			epno = dev->config.if_desc[ifno].no_of_ep;
+			if_desc = &dev->config.if_desc[ifno];
 			/* found an endpoint */
-			dev->config.if_desc[ifno].no_of_ep++;
-			memcpy(&dev->config.if_desc[ifno].ep_desc[epno],
+			if_desc->no_of_ep++;
+			memcpy(&if_desc->ep_desc[epno],
 				&buffer[index], buffer[index]);
 			ep_wMaxPacketSize = get_unaligned(&dev->config.\
 							if_desc[ifno].\
@@ -414,23 +407,30 @@ static int usb_parse_config(struct usb_device *dev,
 					if_desc[ifno].\
 					ep_desc[epno].\
 					wMaxPacketSize);
-			USB_PRINTF("if %d, ep %d\n", ifno, epno);
+			debug("if %d, ep %d\n", ifno, epno);
+			break;
+		case USB_DT_SS_ENDPOINT_COMP:
+			if_desc = &dev->config.if_desc[ifno];
+			memcpy(&if_desc->ss_ep_comp_desc[epno],
+				&buffer[index], buffer[index]);
 			break;
 		default:
 			if (head->bLength == 0)
 				return 1;
 
-			USB_PRINTF("unknown Description Type : %x\n",
-				   head->bDescriptorType);
+			debug("unknown Description Type : %x\n",
+			      head->bDescriptorType);
 
+#ifdef DEBUG
 			{
-#ifdef USB_DEBUG
 				unsigned char *ch = (unsigned char *)head;
-#endif
+				int i;
+
 				for (i = 0; i < head->bLength; i++)
-					USB_PRINTF("%02X ", *ch++);
-				USB_PRINTF("\n\n\n");
+					debug("%02X ", *ch++);
+				debug("\n\n\n");
 			}
+#endif
 			break;
 		}
 		index += head->bLength;
@@ -514,8 +514,7 @@ int usb_get_configuration_no(struct usb_device *dev,
 	}
 
 	result = usb_get_descriptor(dev, USB_DT_CONFIG, cfgno, buffer, tmp);
-	USB_PRINTF("get_conf_no %d Result %d, wLength %d\n",
-		   cfgno, result, tmp);
+	debug("get_conf_no %d Result %d, wLength %d\n", cfgno, result, tmp);
 	return result;
 }
 
@@ -527,7 +526,7 @@ static int usb_set_address(struct usb_device *dev)
 {
 	int res;
 
-	USB_PRINTF("set address %d\n", dev->devnum);
+	debug("set address %d\n", dev->devnum);
 	res = usb_control_msg(dev, usb_snddefctrl(dev),
 				USB_REQ_SET_ADDRESS, 0,
 				(dev->devnum), 0,
@@ -579,7 +578,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate)
 static int usb_set_configuration(struct usb_device *dev, int configuration)
 {
 	int res;
-	USB_PRINTF("set configuration %d\n", configuration);
+	debug("set configuration %d\n", configuration);
 	/* set setup command */
 	res = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
 				USB_REQ_SET_CONFIGURATION, 0,
@@ -731,19 +730,19 @@ int usb_string(struct usb_device *dev, int index, char *buf, size_t size)
 	if (!dev->have_langid) {
 		err = usb_string_sub(dev, 0, 0, tbuf);
 		if (err < 0) {
-			USB_PRINTF("error getting string descriptor 0 " \
-				   "(error=%lx)\n", dev->status);
+			debug("error getting string descriptor 0 " \
+			      "(error=%lx)\n", dev->status);
 			return -1;
 		} else if (tbuf[0] < 4) {
-			USB_PRINTF("string descriptor 0 too short\n");
+			debug("string descriptor 0 too short\n");
 			return -1;
 		} else {
 			dev->have_langid = -1;
 			dev->string_langid = tbuf[2] | (tbuf[3] << 8);
 				/* always use the first langid listed */
-			USB_PRINTF("USB device number %d default " \
-				   "language ID 0x%x\n",
-				   dev->devnum, dev->string_langid);
+			debug("USB device number %d default " \
+			      "language ID 0x%x\n",
+			      dev->devnum, dev->string_langid);
 		}
 	}
 
@@ -789,7 +788,7 @@ struct usb_device *usb_get_dev_index(int index)
 struct usb_device *usb_alloc_new_device(void *controller)
 {
 	int i;
-	USB_PRINTF("New Device %d\n", dev_index);
+	debug("New Device %d\n", dev_index);
 	if (dev_index == USB_MAX_DEVICE) {
 		printf("ERROR, too many USB Devices, max=%d\n", USB_MAX_DEVICE);
 		return NULL;
@@ -813,7 +812,7 @@ struct usb_device *usb_alloc_new_device(void *controller)
 void usb_free_device(void)
 {
 	dev_index--;
-	USB_PRINTF("Freeing device node: %d\n", dev_index);
+	debug("Freeing device node: %d\n", dev_index);
 	memset(&usb_dev[dev_index], 0, sizeof(struct usb_device));
 	usb_dev[dev_index].devnum = -1;
 }
@@ -880,11 +879,16 @@ int usb_new_device(struct usb_device *dev)
 
 	err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, desc, 64);
 	if (err < 0) {
-		USB_PRINTF("usb_new_device: usb_get_descriptor() failed\n");
+		debug("usb_new_device: usb_get_descriptor() failed\n");
 		return 1;
 	}
 
 	dev->descriptor.bMaxPacketSize0 = desc->bMaxPacketSize0;
+	/*
+	 * Fetch the device class, driver can use this info
+	 * to differentiate between HUB and DEVICE.
+	 */
+	dev->descriptor.bDeviceClass = desc->bDeviceClass;
 
 	/* find the port number we're at */
 	if (parent) {
@@ -973,9 +977,9 @@ int usb_new_device(struct usb_device *dev)
 			"len %d, status %lX\n", dev->act_len, dev->status);
 		return -1;
 	}
-	USB_PRINTF("new device strings: Mfr=%d, Product=%d, SerialNumber=%d\n",
-		   dev->descriptor.iManufacturer, dev->descriptor.iProduct,
-		   dev->descriptor.iSerialNumber);
+	debug("new device strings: Mfr=%d, Product=%d, SerialNumber=%d\n",
+	      dev->descriptor.iManufacturer, dev->descriptor.iProduct,
+	      dev->descriptor.iSerialNumber);
 	memset(dev->mf, 0, sizeof(dev->mf));
 	memset(dev->prod, 0, sizeof(dev->prod));
 	memset(dev->serial, 0, sizeof(dev->serial));
@@ -988,9 +992,9 @@ int usb_new_device(struct usb_device *dev)
 	if (dev->descriptor.iSerialNumber)
 		usb_string(dev, dev->descriptor.iSerialNumber,
 			   dev->serial, sizeof(dev->serial));
-	USB_PRINTF("Manufacturer %s\n", dev->mf);
-	USB_PRINTF("Product      %s\n", dev->prod);
-	USB_PRINTF("SerialNumber %s\n", dev->serial);
+	debug("Manufacturer %s\n", dev->mf);
+	debug("Product      %s\n", dev->prod);
+	debug("SerialNumber %s\n", dev->serial);
 	/* now prode if the device is a hub */
 	usb_hub_probe(dev, 0);
 	return 0;
diff --git a/common/usb_hub.c b/common/usb_hub.c
index b5eeb62fbe5..0d79ec3ea84 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -53,17 +53,6 @@
 #include <asm/4xx_pci.h>
 #endif
 
-#ifdef DEBUG
-#define USB_DEBUG	1
-#define USB_HUB_DEBUG	1
-#else
-#define USB_DEBUG	0
-#define USB_HUB_DEBUG	0
-#endif
-
-#define USB_PRINTF(fmt, args...)	debug_cond(USB_DEBUG, fmt, ##args)
-#define USB_HUB_PRINTF(fmt, args...)	debug_cond(USB_HUB_DEBUG, fmt, ##args)
-
 #define USB_BUFSIZ	512
 
 static struct usb_hub_device hub_dev[USB_MAX_HUB];
@@ -111,13 +100,52 @@ static void usb_hub_power_on(struct usb_hub_device *hub)
 	int i;
 	struct usb_device *dev;
 	unsigned pgood_delay = hub->desc.bPwrOn2PwrGood * 2;
+	ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
+	unsigned short portstatus;
+	int ret;
 
 	dev = hub->pusb_dev;
-	/* Enable power to the ports */
-	USB_HUB_PRINTF("enabling power on all ports\n");
+
+	/*
+	 * Enable power to the ports:
+	 * Here we Power-cycle the ports: aka,
+	 * turning them off and turning on again.
+	 */
+	debug("enabling power on all ports\n");
+	for (i = 0; i < dev->maxchild; i++) {
+		usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_POWER);
+		debug("port %d returns %lX\n", i + 1, dev->status);
+	}
+
+	/* Wait at least 2*bPwrOn2PwrGood for PP to change */
+	mdelay(pgood_delay);
+
+	for (i = 0; i < dev->maxchild; i++) {
+		ret = usb_get_port_status(dev, i + 1, portsts);
+		if (ret < 0) {
+			debug("port %d: get_port_status failed\n", i + 1);
+			return;
+		}
+
+		/*
+		 * Check to confirm the state of Port Power:
+		 * xHCI says "After modifying PP, s/w shall read
+		 * PP and confirm that it has reached the desired state
+		 * before modifying it again, undefined behavior may occur
+		 * if this procedure is not followed".
+		 * EHCI doesn't say anything like this, but no harm in keeping
+		 * this.
+		 */
+		portstatus = le16_to_cpu(portsts->wPortStatus);
+		if (portstatus & (USB_PORT_STAT_POWER << 1)) {
+			debug("port %d: Port power change failed\n", i + 1);
+			return;
+		}
+	}
+
 	for (i = 0; i < dev->maxchild; i++) {
 		usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_POWER);
-		USB_HUB_PRINTF("port %d returns %lX\n", i + 1, dev->status);
+		debug("port %d returns %lX\n", i + 1, dev->status);
 	}
 
 	/* Wait at least 100 msec for power to become stable */
@@ -142,12 +170,24 @@ static struct usb_hub_device *usb_hub_allocate(void)
 
 static inline char *portspeed(int portstatus)
 {
-	if (portstatus & (1 << USB_PORT_FEAT_HIGHSPEED))
-		return "480 Mb/s";
-	else if (portstatus & (1 << USB_PORT_FEAT_LOWSPEED))
-		return "1.5 Mb/s";
-	else
-		return "12 Mb/s";
+	char *speed_str;
+
+	switch (portstatus & USB_PORT_STAT_SPEED_MASK) {
+	case USB_PORT_STAT_SUPER_SPEED:
+		speed_str = "5 Gb/s";
+		break;
+	case USB_PORT_STAT_HIGH_SPEED:
+		speed_str = "480 Mb/s";
+		break;
+	case USB_PORT_STAT_LOW_SPEED:
+		speed_str = "1.5 Mb/s";
+		break;
+	default:
+		speed_str = "12 Mb/s";
+		break;
+	}
+
+	return speed_str;
 }
 
 int hub_port_reset(struct usb_device *dev, int port,
@@ -157,29 +197,28 @@ int hub_port_reset(struct usb_device *dev, int port,
 	ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
 	unsigned short portstatus, portchange;
 
-	USB_HUB_PRINTF("hub_port_reset: resetting port %d...\n", port);
+	debug("hub_port_reset: resetting port %d...\n", port);
 	for (tries = 0; tries < MAX_TRIES; tries++) {
 
 		usb_set_port_feature(dev, port + 1, USB_PORT_FEAT_RESET);
 		mdelay(200);
 
 		if (usb_get_port_status(dev, port + 1, portsts) < 0) {
-			USB_HUB_PRINTF("get_port_status failed status %lX\n",
-					dev->status);
+			debug("get_port_status failed status %lX\n",
+			      dev->status);
 			return -1;
 		}
 		portstatus = le16_to_cpu(portsts->wPortStatus);
 		portchange = le16_to_cpu(portsts->wPortChange);
 
-		USB_HUB_PRINTF("portstatus %x, change %x, %s\n",
-				portstatus, portchange,
-				portspeed(portstatus));
+		debug("portstatus %x, change %x, %s\n", portstatus, portchange,
+							portspeed(portstatus));
 
-		USB_HUB_PRINTF("STAT_C_CONNECTION = %d STAT_CONNECTION = %d" \
-			       "  USB_PORT_STAT_ENABLE %d\n",
-			(portchange & USB_PORT_STAT_C_CONNECTION) ? 1 : 0,
-			(portstatus & USB_PORT_STAT_CONNECTION) ? 1 : 0,
-			(portstatus & USB_PORT_STAT_ENABLE) ? 1 : 0);
+		debug("STAT_C_CONNECTION = %d STAT_CONNECTION = %d" \
+		      "  USB_PORT_STAT_ENABLE %d\n",
+		      (portchange & USB_PORT_STAT_C_CONNECTION) ? 1 : 0,
+		      (portstatus & USB_PORT_STAT_CONNECTION) ? 1 : 0,
+		      (portstatus & USB_PORT_STAT_ENABLE) ? 1 : 0);
 
 		if ((portchange & USB_PORT_STAT_C_CONNECTION) ||
 		    !(portstatus & USB_PORT_STAT_CONNECTION))
@@ -192,9 +231,9 @@ int hub_port_reset(struct usb_device *dev, int port,
 	}
 
 	if (tries == MAX_TRIES) {
-		USB_HUB_PRINTF("Cannot enable port %i after %i retries, " \
-				"disabling port.\n", port + 1, MAX_TRIES);
-		USB_HUB_PRINTF("Maybe the USB cable is bad?\n");
+		debug("Cannot enable port %i after %i retries, " \
+		      "disabling port.\n", port + 1, MAX_TRIES);
+		debug("Maybe the USB cable is bad?\n");
 		return -1;
 	}
 
@@ -212,15 +251,15 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port)
 
 	/* Check status */
 	if (usb_get_port_status(dev, port + 1, portsts) < 0) {
-		USB_HUB_PRINTF("get_port_status failed\n");
+		debug("get_port_status failed\n");
 		return;
 	}
 
 	portstatus = le16_to_cpu(portsts->wPortStatus);
-	USB_HUB_PRINTF("portstatus %x, change %x, %s\n",
-			portstatus,
-			le16_to_cpu(portsts->wPortChange),
-			portspeed(portstatus));
+	debug("portstatus %x, change %x, %s\n",
+	      portstatus,
+	      le16_to_cpu(portsts->wPortChange),
+	      portspeed(portstatus));
 
 	/* Clear the connection change status */
 	usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_C_CONNECTION);
@@ -228,7 +267,7 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port)
 	/* Disconnect any existing devices under this port */
 	if (((!(portstatus & USB_PORT_STAT_CONNECTION)) &&
 	     (!(portstatus & USB_PORT_STAT_ENABLE))) || (dev->children[port])) {
-		USB_HUB_PRINTF("usb_disconnect(&hub->children[port]);\n");
+		debug("usb_disconnect(&hub->children[port]);\n");
 		/* Return now if nothing is connected */
 		if (!(portstatus & USB_PORT_STAT_CONNECTION))
 			return;
@@ -246,12 +285,20 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port)
 	/* Allocate a new device struct for it */
 	usb = usb_alloc_new_device(dev->controller);
 
-	if (portstatus & USB_PORT_STAT_HIGH_SPEED)
+	switch (portstatus & USB_PORT_STAT_SPEED_MASK) {
+	case USB_PORT_STAT_SUPER_SPEED:
+		usb->speed = USB_SPEED_SUPER;
+		break;
+	case USB_PORT_STAT_HIGH_SPEED:
 		usb->speed = USB_SPEED_HIGH;
-	else if (portstatus & USB_PORT_STAT_LOW_SPEED)
+		break;
+	case USB_PORT_STAT_LOW_SPEED:
 		usb->speed = USB_SPEED_LOW;
-	else
+		break;
+	default:
 		usb->speed = USB_SPEED_FULL;
+		break;
+	}
 
 	dev->children[port] = usb;
 	usb->parent = dev;
@@ -261,7 +308,7 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port)
 		/* Woops, disable the port */
 		usb_free_device();
 		dev->children[port] = NULL;
-		USB_HUB_PRINTF("hub: disabling port %d\n", port + 1);
+		debug("hub: disabling port %d\n", port + 1);
 		usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_ENABLE);
 	}
 }
@@ -275,9 +322,7 @@ static int usb_hub_configure(struct usb_device *dev)
 	short hubCharacteristics;
 	struct usb_hub_descriptor *descriptor;
 	struct usb_hub_device *hub;
-#ifdef USB_HUB_DEBUG
-	struct usb_hub_status *hubsts;
-#endif
+	__maybe_unused struct usb_hub_status *hubsts;
 
 	/* "allocate" Hub device */
 	hub = usb_hub_allocate();
@@ -286,8 +331,8 @@ static int usb_hub_configure(struct usb_device *dev)
 	hub->pusb_dev = dev;
 	/* Get the the hub descriptor */
 	if (usb_get_hub_descriptor(dev, buffer, 4) < 0) {
-		USB_HUB_PRINTF("usb_hub_configure: failed to get hub " \
-				   "descriptor, giving up %lX\n", dev->status);
+		debug("usb_hub_configure: failed to get hub " \
+		      "descriptor, giving up %lX\n", dev->status);
 		return -1;
 	}
 	descriptor = (struct usb_hub_descriptor *)buffer;
@@ -295,15 +340,14 @@ static int usb_hub_configure(struct usb_device *dev)
 	/* silence compiler warning if USB_BUFSIZ is > 256 [= sizeof(char)] */
 	i = descriptor->bLength;
 	if (i > USB_BUFSIZ) {
-		USB_HUB_PRINTF("usb_hub_configure: failed to get hub " \
-				"descriptor - too long: %d\n",
-				descriptor->bLength);
+		debug("usb_hub_configure: failed to get hub " \
+		      "descriptor - too long: %d\n", descriptor->bLength);
 		return -1;
 	}
 
 	if (usb_get_hub_descriptor(dev, buffer, descriptor->bLength) < 0) {
-		USB_HUB_PRINTF("usb_hub_configure: failed to get hub " \
-				"descriptor 2nd giving up %lX\n", dev->status);
+		debug("usb_hub_configure: failed to get hub " \
+		      "descriptor 2nd giving up %lX\n", dev->status);
 		return -1;
 	}
 	memcpy((unsigned char *)&hub->desc, buffer, descriptor->bLength);
@@ -325,74 +369,75 @@ static int usb_hub_configure(struct usb_device *dev)
 		hub->desc.PortPowerCtrlMask[i] = descriptor->PortPowerCtrlMask[i];
 
 	dev->maxchild = descriptor->bNbrPorts;
-	USB_HUB_PRINTF("%d ports detected\n", dev->maxchild);
+	debug("%d ports detected\n", dev->maxchild);
 
 	hubCharacteristics = get_unaligned(&hub->desc.wHubCharacteristics);
 	switch (hubCharacteristics & HUB_CHAR_LPSM) {
 	case 0x00:
-		USB_HUB_PRINTF("ganged power switching\n");
+		debug("ganged power switching\n");
 		break;
 	case 0x01:
-		USB_HUB_PRINTF("individual port power switching\n");
+		debug("individual port power switching\n");
 		break;
 	case 0x02:
 	case 0x03:
-		USB_HUB_PRINTF("unknown reserved power switching mode\n");
+		debug("unknown reserved power switching mode\n");
 		break;
 	}
 
 	if (hubCharacteristics & HUB_CHAR_COMPOUND)
-		USB_HUB_PRINTF("part of a compound device\n");
+		debug("part of a compound device\n");
 	else
-		USB_HUB_PRINTF("standalone hub\n");
+		debug("standalone hub\n");
 
 	switch (hubCharacteristics & HUB_CHAR_OCPM) {
 	case 0x00:
-		USB_HUB_PRINTF("global over-current protection\n");
+		debug("global over-current protection\n");
 		break;
 	case 0x08:
-		USB_HUB_PRINTF("individual port over-current protection\n");
+		debug("individual port over-current protection\n");
 		break;
 	case 0x10:
 	case 0x18:
-		USB_HUB_PRINTF("no over-current protection\n");
+		debug("no over-current protection\n");
 		break;
 	}
 
-	USB_HUB_PRINTF("power on to power good time: %dms\n",
-			descriptor->bPwrOn2PwrGood * 2);
-	USB_HUB_PRINTF("hub controller current requirement: %dmA\n",
-			descriptor->bHubContrCurrent);
+	debug("power on to power good time: %dms\n",
+	      descriptor->bPwrOn2PwrGood * 2);
+	debug("hub controller current requirement: %dmA\n",
+	      descriptor->bHubContrCurrent);
 
 	for (i = 0; i < dev->maxchild; i++)
-		USB_HUB_PRINTF("port %d is%s removable\n", i + 1,
-			hub->desc.DeviceRemovable[(i + 1) / 8] & \
-					   (1 << ((i + 1) % 8)) ? " not" : "");
+		debug("port %d is%s removable\n", i + 1,
+		      hub->desc.DeviceRemovable[(i + 1) / 8] & \
+		      (1 << ((i + 1) % 8)) ? " not" : "");
 
 	if (sizeof(struct usb_hub_status) > USB_BUFSIZ) {
-		USB_HUB_PRINTF("usb_hub_configure: failed to get Status - " \
-				"too long: %d\n", descriptor->bLength);
+		debug("usb_hub_configure: failed to get Status - " \
+		      "too long: %d\n", descriptor->bLength);
 		return -1;
 	}
 
 	if (usb_get_hub_status(dev, buffer) < 0) {
-		USB_HUB_PRINTF("usb_hub_configure: failed to get Status %lX\n",
-				dev->status);
+		debug("usb_hub_configure: failed to get Status %lX\n",
+		      dev->status);
 		return -1;
 	}
 
-#ifdef USB_HUB_DEBUG
+#ifdef DEBUG
 	hubsts = (struct usb_hub_status *)buffer;
 #endif
-	USB_HUB_PRINTF("get_hub_status returned status %X, change %X\n",
-			le16_to_cpu(hubsts->wHubStatus),
-			le16_to_cpu(hubsts->wHubChange));
-	USB_HUB_PRINTF("local power source is %s\n",
-		(le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_LOCAL_POWER) ? \
-		"lost (inactive)" : "good");
-	USB_HUB_PRINTF("%sover-current condition exists\n",
-		(le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? \
-		"" : "no ");
+
+	debug("get_hub_status returned status %X, change %X\n",
+	      le16_to_cpu(hubsts->wHubStatus),
+	      le16_to_cpu(hubsts->wHubChange));
+	debug("local power source is %s\n",
+	      (le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_LOCAL_POWER) ? \
+	      "lost (inactive)" : "good");
+	debug("%sover-current condition exists\n",
+	      (le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? \
+	      "" : "no ");
 	usb_hub_power_on(hub);
 
 	for (i = 0; i < dev->maxchild; i++) {
@@ -412,7 +457,7 @@ static int usb_hub_configure(struct usb_device *dev)
 		do {
 			ret = usb_get_port_status(dev, i + 1, portsts);
 			if (ret < 0) {
-				USB_HUB_PRINTF("get_port_status failed\n");
+				debug("get_port_status failed\n");
 				break;
 			}
 
@@ -423,22 +468,21 @@ static int usb_hub_configure(struct usb_device *dev)
 				(portstatus & USB_PORT_STAT_CONNECTION))
 				break;
 
-			mdelay(100);
 		} while (get_timer(start) < CONFIG_SYS_HZ * 10);
 
 		if (ret < 0)
 			continue;
 
-		USB_HUB_PRINTF("Port %d Status %X Change %X\n",
-				i + 1, portstatus, portchange);
+		debug("Port %d Status %X Change %X\n",
+		      i + 1, portstatus, portchange);
 
 		if (portchange & USB_PORT_STAT_C_CONNECTION) {
-			USB_HUB_PRINTF("port %d connection change\n", i + 1);
+			debug("port %d connection change\n", i + 1);
 			usb_hub_port_connect_change(dev, i);
 		}
 		if (portchange & USB_PORT_STAT_C_ENABLE) {
-			USB_HUB_PRINTF("port %d enable change, status %x\n",
-					i + 1, portstatus);
+			debug("port %d enable change, status %x\n",
+			      i + 1, portstatus);
 			usb_clear_port_feature(dev, i + 1,
 						USB_PORT_FEAT_C_ENABLE);
 
@@ -448,27 +492,27 @@ static int usb_hub_configure(struct usb_device *dev)
 			if (!(portstatus & USB_PORT_STAT_ENABLE) &&
 			     (portstatus & USB_PORT_STAT_CONNECTION) &&
 			     ((dev->children[i]))) {
-				USB_HUB_PRINTF("already running port %i "  \
-						"disabled by hub (EMI?), " \
-						"re-enabling...\n", i + 1);
-					usb_hub_port_connect_change(dev, i);
+				debug("already running port %i "  \
+				      "disabled by hub (EMI?), " \
+				      "re-enabling...\n", i + 1);
+				      usb_hub_port_connect_change(dev, i);
 			}
 		}
 		if (portstatus & USB_PORT_STAT_SUSPEND) {
-			USB_HUB_PRINTF("port %d suspend change\n", i + 1);
+			debug("port %d suspend change\n", i + 1);
 			usb_clear_port_feature(dev, i + 1,
 						USB_PORT_FEAT_SUSPEND);
 		}
 
 		if (portchange & USB_PORT_STAT_C_OVERCURRENT) {
-			USB_HUB_PRINTF("port %d over-current change\n", i + 1);
+			debug("port %d over-current change\n", i + 1);
 			usb_clear_port_feature(dev, i + 1,
 						USB_PORT_FEAT_C_OVER_CURRENT);
 			usb_hub_power_on(hub);
 		}
 
 		if (portchange & USB_PORT_STAT_C_RESET) {
-			USB_HUB_PRINTF("port %d reset change\n", i + 1);
+			debug("port %d reset change\n", i + 1);
 			usb_clear_port_feature(dev, i + 1,
 						USB_PORT_FEAT_C_RESET);
 		}
@@ -503,7 +547,7 @@ int usb_hub_probe(struct usb_device *dev, int ifnum)
 	if ((ep->bmAttributes & 3) != 3)
 		return 0;
 	/* We found a hub */
-	USB_HUB_PRINTF("USB hub found\n");
+	debug("USB hub found\n");
 	ret = usb_hub_configure(dev);
 	return ret;
 }
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 4efbcfe90d3..b962849920a 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -31,12 +31,6 @@
 
 #include <usb.h>
 
-#ifdef	USB_KBD_DEBUG
-#define USB_KBD_PRINTF(fmt, args...)	printf(fmt, ##args)
-#else
-#define USB_KBD_PRINTF(fmt, args...)
-#endif
-
 /*
  * If overwrite_console returns 1, the stdin, stderr and stdout
  * are switched to the serial port, else the settings in the
@@ -262,7 +256,7 @@ static int usb_kbd_translate(struct usb_kbd_pdata *data, unsigned char scancode,
 
 	/* Report keycode if any */
 	if (keycode) {
-		USB_KBD_PRINTF("%c", keycode);
+		debug("%c", keycode);
 		usb_kbd_put_queue(data, keycode);
 	}
 
@@ -324,8 +318,8 @@ static int usb_kbd_irq_worker(struct usb_device *dev)
 static int usb_kbd_irq(struct usb_device *dev)
 {
 	if ((dev->irq_status != 0) || (dev->irq_act_len != 8)) {
-		USB_KBD_PRINTF("USB KBD: Error %lX, len %d\n",
-				dev->irq_status, dev->irq_act_len);
+		debug("USB KBD: Error %lX, len %d\n",
+		      dev->irq_status, dev->irq_act_len);
 		return 1;
 	}
 
@@ -437,7 +431,7 @@ static int usb_kbd_probe(struct usb_device *dev, unsigned int ifnum)
 	if ((ep->bmAttributes & 3) != 3)
 		return 0;
 
-	USB_KBD_PRINTF("USB KBD: found set protocol...\n");
+	debug("USB KBD: found set protocol...\n");
 
 	data = malloc(sizeof(struct usb_kbd_pdata));
 	if (!data) {
@@ -463,10 +457,10 @@ static int usb_kbd_probe(struct usb_device *dev, unsigned int ifnum)
 	/* We found a USB Keyboard, install it. */
 	usb_set_protocol(dev, iface->desc.bInterfaceNumber, 0);
 
-	USB_KBD_PRINTF("USB KBD: found set idle...\n");
+	debug("USB KBD: found set idle...\n");
 	usb_set_idle(dev, iface->desc.bInterfaceNumber, REPEAT_RATE, 0);
 
-	USB_KBD_PRINTF("USB KBD: enable interrupt pipe...\n");
+	debug("USB KBD: enable interrupt pipe...\n");
 	usb_submit_int_msg(dev, pipe, data->new, maxp > 8 ? 8 : maxp,
 				ep->bInterval);
 
@@ -497,16 +491,16 @@ int drv_usb_kbd_init(void)
 			continue;
 
 		/* We found a keyboard, check if it is already registered. */
-		USB_KBD_PRINTF("USB KBD: found set up device.\n");
+		debug("USB KBD: found set up device.\n");
 		old_dev = stdio_get_by_name(DEVNAME);
 		if (old_dev) {
 			/* Already registered, just return ok. */
-			USB_KBD_PRINTF("USB KBD: is already registered.\n");
+			debug("USB KBD: is already registered.\n");
 			return 1;
 		}
 
 		/* Register the keyboard */
-		USB_KBD_PRINTF("USB KBD: register.\n");
+		debug("USB KBD: register.\n");
 		memset(&usb_kbd_dev, 0, sizeof(struct stdio_dev));
 		strcpy(usb_kbd_dev.name, DEVNAME);
 		usb_kbd_dev.flags =  DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
diff --git a/common/usb_storage.c b/common/usb_storage.c
index c5db044165c..457970f770c 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -59,14 +59,6 @@
 #undef BBB_COMDAT_TRACE
 #undef BBB_XPORT_TRACE
 
-#ifdef	USB_STOR_DEBUG
-#define USB_BLK_DEBUG	1
-#else
-#define USB_BLK_DEBUG	0
-#endif
-
-#define USB_STOR_PRINTF(fmt, args...)	debug_cond(USB_BLK_DEBUG, fmt, ##args)
-
 #include <scsi.h>
 /* direction table -- this indicates the direction of the data
  * transfer for each command code -- a 1 indicates input
@@ -228,8 +220,7 @@ static unsigned int usb_get_max_lun(struct us_data *us)
 			      0, us->ifnum,
 			      result, sizeof(char),
 			      USB_CNTL_TIMEOUT * 5);
-	USB_STOR_PRINTF("Get Max LUN -> len = %i, result = %i\n",
-			len, (int) *result);
+	debug("Get Max LUN -> len = %i, result = %i\n", len, (int) *result);
 	return (len > 0) ? *result : 0;
 }
 
@@ -262,7 +253,7 @@ int usb_stor_scan(int mode)
 	usb_max_devs = 0;
 	for (i = 0; i < USB_MAX_DEVICE; i++) {
 		dev = usb_get_dev_index(i); /* get device */
-		USB_STOR_PRINTF("i=%d\n", i);
+		debug("i=%d\n", i);
 		if (dev == NULL)
 			break; /* no more devices available */
 
@@ -278,9 +269,9 @@ int usb_stor_scan(int mode)
 			     lun++) {
 				usb_dev_desc[usb_max_devs].lun = lun;
 				if (usb_stor_get_info(dev, &usb_stor[start],
-						      &usb_dev_desc[usb_max_devs]) == 1) {
-				usb_max_devs++;
-		}
+				    &usb_dev_desc[usb_max_devs]) == 1) {
+					usb_max_devs++;
+				}
 			}
 		}
 		/* if storage device */
@@ -309,7 +300,7 @@ static int usb_stor_irq(struct usb_device *dev)
 }
 
 
-#ifdef	USB_STOR_DEBUG
+#ifdef	DEBUG
 
 static void usb_show_srb(ccb *pccb)
 {
@@ -361,45 +352,49 @@ static int us_one_transfer(struct us_data *us, int pipe, char *buf, int length)
 		/* set up the transfer loop */
 		do {
 			/* transfer the data */
-			USB_STOR_PRINTF("Bulk xfer 0x%x(%d) try #%d\n",
-				  (unsigned int)buf, this_xfer, 11 - maxtry);
+			debug("Bulk xfer 0x%x(%d) try #%d\n",
+			      (unsigned int)buf, this_xfer, 11 - maxtry);
 			result = usb_bulk_msg(us->pusb_dev, pipe, buf,
 					      this_xfer, &partial,
 					      USB_CNTL_TIMEOUT * 5);
-			USB_STOR_PRINTF("bulk_msg returned %d xferred %d/%d\n",
-				  result, partial, this_xfer);
+			debug("bulk_msg returned %d xferred %d/%d\n",
+			      result, partial, this_xfer);
 			if (us->pusb_dev->status != 0) {
 				/* if we stall, we need to clear it before
 				 * we go on
 				 */
-#ifdef USB_STOR_DEBUG
+#ifdef DEBUG
 				display_int_status(us->pusb_dev->status);
 #endif
 				if (us->pusb_dev->status & USB_ST_STALLED) {
-					USB_STOR_PRINTF("stalled ->clearing endpoint halt for pipe 0x%x\n", pipe);
+					debug("stalled ->clearing endpoint" \
+					      "halt for pipe 0x%x\n", pipe);
 					stat = us->pusb_dev->status;
 					usb_clear_halt(us->pusb_dev, pipe);
 					us->pusb_dev->status = stat;
 					if (this_xfer == partial) {
-						USB_STOR_PRINTF("bulk transferred with error %lX, but data ok\n", us->pusb_dev->status);
+						debug("bulk transferred" \
+						      "with error %lX," \
+						      " but data ok\n",
+						      us->pusb_dev->status);
 						return 0;
 					}
 					else
 						return result;
 				}
 				if (us->pusb_dev->status & USB_ST_NAK_REC) {
-					USB_STOR_PRINTF("Device NAKed bulk_msg\n");
+					debug("Device NAKed bulk_msg\n");
 					return result;
 				}
-				USB_STOR_PRINTF("bulk transferred with error");
+				debug("bulk transferred with error");
 				if (this_xfer == partial) {
-					USB_STOR_PRINTF(" %ld, but data ok\n",
-							us->pusb_dev->status);
+					debug(" %ld, but data ok\n",
+					      us->pusb_dev->status);
 					return 0;
 				}
 				/* if our try counter reaches 0, bail out */
-					USB_STOR_PRINTF(" %ld, data %d\n",
-						us->pusb_dev->status, partial);
+					debug(" %ld, data %d\n",
+					      us->pusb_dev->status, partial);
 				if (!maxtry--)
 						return result;
 			}
@@ -433,35 +428,34 @@ static int usb_stor_BBB_reset(struct us_data *us)
 	 *
 	 * This comment stolen from FreeBSD's /sys/dev/usb/umass.c.
 	 */
-	USB_STOR_PRINTF("BBB_reset\n");
+	debug("BBB_reset\n");
 	result = usb_control_msg(us->pusb_dev, usb_sndctrlpipe(us->pusb_dev, 0),
 				 US_BBB_RESET,
 				 USB_TYPE_CLASS | USB_RECIP_INTERFACE,
 				 0, us->ifnum, NULL, 0, USB_CNTL_TIMEOUT * 5);
 
 	if ((result < 0) && (us->pusb_dev->status & USB_ST_STALLED)) {
-		USB_STOR_PRINTF("RESET:stall\n");
+		debug("RESET:stall\n");
 		return -1;
 	}
 
 	/* long wait for reset */
 	mdelay(150);
-	USB_STOR_PRINTF("BBB_reset result %d: status %lX reset\n", result,
-			us->pusb_dev->status);
+	debug("BBB_reset result %d: status %lX reset\n",
+	      result, us->pusb_dev->status);
 	pipe = usb_rcvbulkpipe(us->pusb_dev, us->ep_in);
 	result = usb_clear_halt(us->pusb_dev, pipe);
 	/* long wait for reset */
 	mdelay(150);
-	USB_STOR_PRINTF("BBB_reset result %d: status %lX clearing IN endpoint\n",
-			result, us->pusb_dev->status);
+	debug("BBB_reset result %d: status %lX clearing IN endpoint\n",
+	      result, us->pusb_dev->status);
 	/* long wait for reset */
 	pipe = usb_sndbulkpipe(us->pusb_dev, us->ep_out);
 	result = usb_clear_halt(us->pusb_dev, pipe);
 	mdelay(150);
-	USB_STOR_PRINTF("BBB_reset result %d: status %lX"
-			" clearing OUT endpoint\n", result,
-			us->pusb_dev->status);
-	USB_STOR_PRINTF("BBB_reset done\n");
+	debug("BBB_reset result %d: status %lX clearing OUT endpoint\n",
+	      result, us->pusb_dev->status);
+	debug("BBB_reset done\n");
 	return 0;
 }
 
@@ -474,7 +468,7 @@ static int usb_stor_CB_reset(struct us_data *us)
 	unsigned char cmd[12];
 	int result;
 
-	USB_STOR_PRINTF("CB_reset\n");
+	debug("CB_reset\n");
 	memset(cmd, 0xff, sizeof(cmd));
 	cmd[0] = SCSI_SEND_DIAG;
 	cmd[1] = 4;
@@ -486,13 +480,12 @@ static int usb_stor_CB_reset(struct us_data *us)
 
 	/* long wait for reset */
 	mdelay(1500);
-	USB_STOR_PRINTF("CB_reset result %d: status %lX"
-			" clearing endpoint halt\n", result,
-			us->pusb_dev->status);
+	debug("CB_reset result %d: status %lX clearing endpoint halt\n",
+	      result, us->pusb_dev->status);
 	usb_clear_halt(us->pusb_dev, usb_rcvbulkpipe(us->pusb_dev, us->ep_in));
 	usb_clear_halt(us->pusb_dev, usb_rcvbulkpipe(us->pusb_dev, us->ep_out));
 
-	USB_STOR_PRINTF("CB_reset done\n");
+	debug("CB_reset done\n");
 	return 0;
 }
 
@@ -511,7 +504,7 @@ static int usb_stor_BBB_comdat(ccb *srb, struct us_data *us)
 	dir_in = US_DIRECTION(srb->cmd[0]);
 
 #ifdef BBB_COMDAT_TRACE
-	printf("dir %d lun %d cmdlen %d cmd %p datalen %d pdata %p\n",
+	printf("dir %d lun %d cmdlen %d cmd %p datalen %lu pdata %p\n",
 		dir_in, srb->lun, srb->cmdlen, srb->cmd, srb->datalen,
 		srb->pdata);
 	if (srb->cmdlen) {
@@ -522,7 +515,7 @@ static int usb_stor_BBB_comdat(ccb *srb, struct us_data *us)
 #endif
 	/* sanity checks */
 	if (!(srb->cmdlen <= CBWCDBLENGTH)) {
-		USB_STOR_PRINTF("usb_stor_BBB_comdat:cmdlen too large\n");
+		debug("usb_stor_BBB_comdat:cmdlen too large\n");
 		return -1;
 	}
 
@@ -541,7 +534,7 @@ static int usb_stor_BBB_comdat(ccb *srb, struct us_data *us)
 	result = usb_bulk_msg(us->pusb_dev, pipe, cbw, UMASS_BBB_CBW_SIZE,
 			      &actlen, USB_CNTL_TIMEOUT * 5);
 	if (result < 0)
-		USB_STOR_PRINTF("usb_stor_BBB_comdat:usb_bulk_msg error\n");
+		debug("usb_stor_BBB_comdat:usb_bulk_msg error\n");
 	return result;
 }
 
@@ -564,8 +557,8 @@ static int usb_stor_CB_comdat(ccb *srb, struct us_data *us)
 		pipe = usb_sndbulkpipe(us->pusb_dev, us->ep_out);
 
 	while (retry--) {
-		USB_STOR_PRINTF("CBI gets a command: Try %d\n", 5 - retry);
-#ifdef USB_STOR_DEBUG
+		debug("CBI gets a command: Try %d\n", 5 - retry);
+#ifdef DEBUG
 		usb_show_srb(srb);
 #endif
 		/* let's send the command via the control pipe */
@@ -576,35 +569,35 @@ static int usb_stor_CB_comdat(ccb *srb, struct us_data *us)
 					 0, us->ifnum,
 					 srb->cmd, srb->cmdlen,
 					 USB_CNTL_TIMEOUT * 5);
-		USB_STOR_PRINTF("CB_transport: control msg returned %d,"
-				" status %lX\n", result, us->pusb_dev->status);
+		debug("CB_transport: control msg returned %d, status %lX\n",
+		      result, us->pusb_dev->status);
 		/* check the return code for the command */
 		if (result < 0) {
 			if (us->pusb_dev->status & USB_ST_STALLED) {
 				status = us->pusb_dev->status;
-				USB_STOR_PRINTF(" stall during command found,"
-						" clear pipe\n");
+				debug(" stall during command found," \
+				      " clear pipe\n");
 				usb_clear_halt(us->pusb_dev,
 					      usb_sndctrlpipe(us->pusb_dev, 0));
 				us->pusb_dev->status = status;
 			}
-			USB_STOR_PRINTF(" error during command %02X"
-					" Stat = %lX\n", srb->cmd[0],
-					us->pusb_dev->status);
+			debug(" error during command %02X" \
+			      " Stat = %lX\n", srb->cmd[0],
+			      us->pusb_dev->status);
 			return result;
 		}
 		/* transfer the data payload for this command, if one exists*/
 
-		USB_STOR_PRINTF("CB_transport: control msg returned %d,"
-				" direction is %s to go 0x%lx\n", result,
-				dir_in ? "IN" : "OUT", srb->datalen);
+		debug("CB_transport: control msg returned %d," \
+		      " direction is %s to go 0x%lx\n", result,
+		      dir_in ? "IN" : "OUT", srb->datalen);
 		if (srb->datalen) {
 			result = us_one_transfer(us, pipe, (char *)srb->pdata,
 						 srb->datalen);
-			USB_STOR_PRINTF("CBI attempted to transfer data,"
-					" result is %d status %lX, len %d\n",
-					result, us->pusb_dev->status,
-					us->pusb_dev->act_len);
+			debug("CBI attempted to transfer data," \
+			      " result is %d status %lX, len %d\n",
+			      result, us->pusb_dev->status,
+				us->pusb_dev->act_len);
 			if (!(us->pusb_dev->status & USB_ST_NAK_REC))
 				break;
 		} /* if (srb->datalen) */
@@ -635,10 +628,9 @@ static int usb_stor_CBI_get_status(ccb *srb, struct us_data *us)
 		us->ip_wanted = 0;
 		return USB_STOR_TRANSPORT_ERROR;
 	}
-	USB_STOR_PRINTF
-		("Got interrupt data 0x%x, transfered %d status 0x%lX\n",
-		 us->ip_data, us->pusb_dev->irq_act_len,
-		 us->pusb_dev->irq_status);
+	debug("Got interrupt data 0x%x, transfered %d status 0x%lX\n",
+	      us->ip_data, us->pusb_dev->irq_act_len,
+	      us->pusb_dev->irq_status);
 	/* UFI gives us ASC and ASCQ, like a request sense */
 	if (us->subclass == US_SC_UFI) {
 		if (srb->cmd[0] == SCSI_REQ_SENSE ||
@@ -691,11 +683,11 @@ static int usb_stor_BBB_transport(ccb *srb, struct us_data *us)
 	dir_in = US_DIRECTION(srb->cmd[0]);
 
 	/* COMMAND phase */
-	USB_STOR_PRINTF("COMMAND phase\n");
+	debug("COMMAND phase\n");
 	result = usb_stor_BBB_comdat(srb, us);
 	if (result < 0) {
-		USB_STOR_PRINTF("failed to send CBW status %ld\n",
-			us->pusb_dev->status);
+		debug("failed to send CBW status %ld\n",
+		      us->pusb_dev->status);
 		usb_stor_BBB_reset(us);
 		return USB_STOR_TRANSPORT_FAILED;
 	}
@@ -708,7 +700,7 @@ static int usb_stor_BBB_transport(ccb *srb, struct us_data *us)
 	/* no data, go immediately to the STATUS phase */
 	if (srb->datalen == 0)
 		goto st;
-	USB_STOR_PRINTF("DATA phase\n");
+	debug("DATA phase\n");
 	if (dir_in)
 		pipe = pipein;
 	else
@@ -717,7 +709,7 @@ static int usb_stor_BBB_transport(ccb *srb, struct us_data *us)
 			      &data_actlen, USB_CNTL_TIMEOUT * 5);
 	/* special handling of STALL in DATA phase */
 	if ((result < 0) && (us->pusb_dev->status & USB_ST_STALLED)) {
-		USB_STOR_PRINTF("DATA:stall\n");
+		debug("DATA:stall\n");
 		/* clear the STALL on the endpoint */
 		result = usb_stor_BBB_clear_endpt_stall(us,
 					dir_in ? us->ep_in : us->ep_out);
@@ -726,8 +718,8 @@ static int usb_stor_BBB_transport(ccb *srb, struct us_data *us)
 			goto st;
 	}
 	if (result < 0) {
-		USB_STOR_PRINTF("usb_bulk_msg error status %ld\n",
-			us->pusb_dev->status);
+		debug("usb_bulk_msg error status %ld\n",
+		      us->pusb_dev->status);
 		usb_stor_BBB_reset(us);
 		return USB_STOR_TRANSPORT_FAILED;
 	}
@@ -740,14 +732,14 @@ static int usb_stor_BBB_transport(ccb *srb, struct us_data *us)
 st:
 	retry = 0;
 again:
-	USB_STOR_PRINTF("STATUS phase\n");
+	debug("STATUS phase\n");
 	result = usb_bulk_msg(us->pusb_dev, pipein, csw, UMASS_BBB_CSW_SIZE,
 				&actlen, USB_CNTL_TIMEOUT*5);
 
 	/* special handling of STALL in STATUS phase */
 	if ((result < 0) && (retry < 1) &&
 	    (us->pusb_dev->status & USB_ST_STALLED)) {
-		USB_STOR_PRINTF("STATUS:stall\n");
+		debug("STATUS:stall\n");
 		/* clear the STALL on the endpoint */
 		result = usb_stor_BBB_clear_endpt_stall(us, us->ep_in);
 		if (result >= 0 && (retry++ < 1))
@@ -755,8 +747,8 @@ again:
 			goto again;
 	}
 	if (result < 0) {
-		USB_STOR_PRINTF("usb_bulk_msg error status %ld\n",
-			us->pusb_dev->status);
+		debug("usb_bulk_msg error status %ld\n",
+		      us->pusb_dev->status);
 		usb_stor_BBB_reset(us);
 		return USB_STOR_TRANSPORT_FAILED;
 	}
@@ -771,27 +763,27 @@ again:
 	if (pipe == 0 && srb->datalen != 0 && srb->datalen - data_actlen != 0)
 		pipe = srb->datalen - data_actlen;
 	if (CSWSIGNATURE != le32_to_cpu(csw->dCSWSignature)) {
-		USB_STOR_PRINTF("!CSWSIGNATURE\n");
+		debug("!CSWSIGNATURE\n");
 		usb_stor_BBB_reset(us);
 		return USB_STOR_TRANSPORT_FAILED;
 	} else if ((CBWTag - 1) != le32_to_cpu(csw->dCSWTag)) {
-		USB_STOR_PRINTF("!Tag\n");
+		debug("!Tag\n");
 		usb_stor_BBB_reset(us);
 		return USB_STOR_TRANSPORT_FAILED;
 	} else if (csw->bCSWStatus > CSWSTATUS_PHASE) {
-		USB_STOR_PRINTF(">PHASE\n");
+		debug(">PHASE\n");
 		usb_stor_BBB_reset(us);
 		return USB_STOR_TRANSPORT_FAILED;
 	} else if (csw->bCSWStatus == CSWSTATUS_PHASE) {
-		USB_STOR_PRINTF("=PHASE\n");
+		debug("=PHASE\n");
 		usb_stor_BBB_reset(us);
 		return USB_STOR_TRANSPORT_FAILED;
 	} else if (data_actlen > srb->datalen) {
-		USB_STOR_PRINTF("transferred %dB instead of %ldB\n",
-			data_actlen, srb->datalen);
+		debug("transferred %dB instead of %ldB\n",
+		      data_actlen, srb->datalen);
 		return USB_STOR_TRANSPORT_FAILED;
 	} else if (csw->bCSWStatus == CSWSTATUS_FAILED) {
-		USB_STOR_PRINTF("FAILED\n");
+		debug("FAILED\n");
 		return USB_STOR_TRANSPORT_FAILED;
 	}
 
@@ -812,14 +804,14 @@ static int usb_stor_CB_transport(ccb *srb, struct us_data *us)
 	/* issue the command */
 do_retry:
 	result = usb_stor_CB_comdat(srb, us);
-	USB_STOR_PRINTF("command / Data returned %d, status %lX\n",
-			result, us->pusb_dev->status);
+	debug("command / Data returned %d, status %lX\n",
+	      result, us->pusb_dev->status);
 	/* if this is an CBI Protocol, get IRQ */
 	if (us->protocol == US_PR_CBI) {
 		status = usb_stor_CBI_get_status(srb, us);
 		/* if the status is error, report it */
 		if (status == USB_STOR_TRANSPORT_ERROR) {
-			USB_STOR_PRINTF(" USB CBI Command Error\n");
+			debug(" USB CBI Command Error\n");
 			return status;
 		}
 		srb->sense_buf[12] = (unsigned char)(us->ip_data >> 8);
@@ -827,7 +819,7 @@ do_retry:
 		if (!us->ip_data) {
 			/* if the status is good, report it */
 			if (status == USB_STOR_TRANSPORT_GOOD) {
-				USB_STOR_PRINTF(" USB CBI Command Good\n");
+				debug(" USB CBI Command Good\n");
 				return status;
 			}
 		}
@@ -835,7 +827,7 @@ do_retry:
 	/* do we have to issue an auto request? */
 	/* HERE we have to check the result */
 	if ((result < 0) && !(us->pusb_dev->status & USB_ST_STALLED)) {
-		USB_STOR_PRINTF("ERROR %lX\n", us->pusb_dev->status);
+		debug("ERROR %lX\n", us->pusb_dev->status);
 		us->transport_reset(us);
 		return USB_STOR_TRANSPORT_ERROR;
 	}
@@ -843,7 +835,7 @@ do_retry:
 	    ((srb->cmd[0] == SCSI_REQ_SENSE) ||
 	    (srb->cmd[0] == SCSI_INQUIRY))) {
 		/* do not issue an autorequest after request sense */
-		USB_STOR_PRINTF("No auto request and good\n");
+		debug("No auto request and good\n");
 		return USB_STOR_TRANSPORT_GOOD;
 	}
 	/* issue an request_sense */
@@ -856,19 +848,19 @@ do_retry:
 	psrb->cmdlen = 12;
 	/* issue the command */
 	result = usb_stor_CB_comdat(psrb, us);
-	USB_STOR_PRINTF("auto request returned %d\n", result);
+	debug("auto request returned %d\n", result);
 	/* if this is an CBI Protocol, get IRQ */
 	if (us->protocol == US_PR_CBI)
 		status = usb_stor_CBI_get_status(psrb, us);
 
 	if ((result < 0) && !(us->pusb_dev->status & USB_ST_STALLED)) {
-		USB_STOR_PRINTF(" AUTO REQUEST ERROR %ld\n",
-				us->pusb_dev->status);
+		debug(" AUTO REQUEST ERROR %ld\n",
+		      us->pusb_dev->status);
 		return USB_STOR_TRANSPORT_ERROR;
 	}
-	USB_STOR_PRINTF("autorequest returned 0x%02X 0x%02X 0x%02X 0x%02X\n",
-			srb->sense_buf[0], srb->sense_buf[2],
-			srb->sense_buf[12], srb->sense_buf[13]);
+	debug("autorequest returned 0x%02X 0x%02X 0x%02X 0x%02X\n",
+	      srb->sense_buf[0], srb->sense_buf[2],
+	      srb->sense_buf[12], srb->sense_buf[13]);
 	/* Check the auto request result */
 	if ((srb->sense_buf[2] == 0) &&
 	    (srb->sense_buf[12] == 0) &&
@@ -923,7 +915,7 @@ static int usb_inquiry(ccb *srb, struct us_data *ss)
 		srb->datalen = 36;
 		srb->cmdlen = 12;
 		i = ss->transport(srb, ss);
-		USB_STOR_PRINTF("inquiry returns %d\n", i);
+		debug("inquiry returns %d\n", i);
 		if (i == 0)
 			break;
 	} while (--retry);
@@ -948,9 +940,9 @@ static int usb_request_sense(ccb *srb, struct us_data *ss)
 	srb->pdata = &srb->sense_buf[0];
 	srb->cmdlen = 12;
 	ss->transport(srb, ss);
-	USB_STOR_PRINTF("Request Sense returned %02X %02X %02X\n",
-			srb->sense_buf[2], srb->sense_buf[12],
-			srb->sense_buf[13]);
+	debug("Request Sense returned %02X %02X %02X\n",
+	      srb->sense_buf[2], srb->sense_buf[12],
+	      srb->sense_buf[13]);
 	srb->pdata = (uchar *)ptr;
 	return 0;
 }
@@ -1017,7 +1009,7 @@ static int usb_read_10(ccb *srb, struct us_data *ss, unsigned long start,
 	srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff;
 	srb->cmd[8] = (unsigned char) blocks & 0xff;
 	srb->cmdlen = 12;
-	USB_STOR_PRINTF("read10: start %lx blocks %x\n", start, blocks);
+	debug("read10: start %lx blocks %x\n", start, blocks);
 	return ss->transport(srb, ss);
 }
 
@@ -1034,7 +1026,7 @@ static int usb_write_10(ccb *srb, struct us_data *ss, unsigned long start,
 	srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff;
 	srb->cmd[8] = (unsigned char) blocks & 0xff;
 	srb->cmdlen = 12;
-	USB_STOR_PRINTF("write10: start %lx blocks %x\n", start, blocks);
+	debug("write10: start %lx blocks %x\n", start, blocks);
 	return ss->transport(srb, ss);
 }
 
@@ -1078,7 +1070,7 @@ unsigned long usb_stor_read(int device, unsigned long blknr,
 
 	device &= 0xff;
 	/* Setup  device */
-	USB_STOR_PRINTF("\nusb_read: dev %d \n", device);
+	debug("\nusb_read: dev %d \n", device);
 	dev = NULL;
 	for (i = 0; i < USB_MAX_DEVICE; i++) {
 		dev = usb_get_dev_index(i);
@@ -1095,8 +1087,8 @@ unsigned long usb_stor_read(int device, unsigned long blknr,
 	start = blknr;
 	blks = blkcnt;
 
-	USB_STOR_PRINTF("\nusb_read: dev %d startblk " LBAF ", blccnt " LBAF
-			" buffer %lx\n", device, start, blks, buf_addr);
+	debug("\nusb_read: dev %d startblk " LBAF ", blccnt " LBAF
+	      " buffer %lx\n", device, start, blks, buf_addr);
 
 	do {
 		/* XXX need some comment here */
@@ -1112,7 +1104,7 @@ retry_it:
 		srb->datalen = usb_dev_desc[device].blksz * smallblks;
 		srb->pdata = (unsigned char *)buf_addr;
 		if (usb_read_10(srb, ss, start, smallblks)) {
-			USB_STOR_PRINTF("Read ERROR\n");
+			debug("Read ERROR\n");
 			usb_request_sense(srb, ss);
 			if (retry--)
 				goto retry_it;
@@ -1125,9 +1117,9 @@ retry_it:
 	} while (blks != 0);
 	ss->flags &= ~USB_READY;
 
-	USB_STOR_PRINTF("usb_read: end startblk " LBAF
-			", blccnt %x buffer %lx\n",
-			start, smallblks, buf_addr);
+	debug("usb_read: end startblk " LBAF
+	      ", blccnt %x buffer %lx\n",
+	      start, smallblks, buf_addr);
 
 	usb_disable_asynch(0); /* asynch transfer allowed */
 	if (blkcnt >= USB_MAX_XFER_BLK)
@@ -1151,7 +1143,7 @@ unsigned long usb_stor_write(int device, unsigned long blknr,
 
 	device &= 0xff;
 	/* Setup  device */
-	USB_STOR_PRINTF("\nusb_write: dev %d \n", device);
+	debug("\nusb_write: dev %d \n", device);
 	dev = NULL;
 	for (i = 0; i < USB_MAX_DEVICE; i++) {
 		dev = usb_get_dev_index(i);
@@ -1169,8 +1161,8 @@ unsigned long usb_stor_write(int device, unsigned long blknr,
 	start = blknr;
 	blks = blkcnt;
 
-	USB_STOR_PRINTF("\nusb_write: dev %d startblk " LBAF ", blccnt " LBAF
-			" buffer %lx\n", device, start, blks, buf_addr);
+	debug("\nusb_write: dev %d startblk " LBAF ", blccnt " LBAF
+	      " buffer %lx\n", device, start, blks, buf_addr);
 
 	do {
 		/* If write fails retry for max retry count else
@@ -1188,7 +1180,7 @@ retry_it:
 		srb->datalen = usb_dev_desc[device].blksz * smallblks;
 		srb->pdata = (unsigned char *)buf_addr;
 		if (usb_write_10(srb, ss, start, smallblks)) {
-			USB_STOR_PRINTF("Write ERROR\n");
+			debug("Write ERROR\n");
 			usb_request_sense(srb, ss);
 			if (retry--)
 				goto retry_it;
@@ -1201,9 +1193,8 @@ retry_it:
 	} while (blks != 0);
 	ss->flags &= ~USB_READY;
 
-	USB_STOR_PRINTF("usb_write: end startblk " LBAF
-			", blccnt %x buffer %lx\n",
-			start, smallblks, buf_addr);
+	debug("usb_write: end startblk " LBAF ", blccnt %x buffer %lx\n",
+	      start, smallblks, buf_addr);
 
 	usb_disable_asynch(0); /* asynch transfer allowed */
 	if (blkcnt >= USB_MAX_XFER_BLK)
@@ -1218,6 +1209,7 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 {
 	struct usb_interface *iface;
 	int i;
+	struct usb_endpoint_descriptor *ep_desc;
 	unsigned int flags = 0;
 
 	int protocol = 0;
@@ -1228,12 +1220,12 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 
 #if 0
 	/* this is the place to patch some storage devices */
-	USB_STOR_PRINTF("iVendor %X iProduct %X\n", dev->descriptor.idVendor,
+	debug("iVendor %X iProduct %X\n", dev->descriptor.idVendor,
 			dev->descriptor.idProduct);
 
 	if ((dev->descriptor.idVendor) == 0x066b &&
 	    (dev->descriptor.idProduct) == 0x0103) {
-		USB_STOR_PRINTF("patched for E-USB\n");
+		debug("patched for E-USB\n");
 		protocol = US_PR_CB;
 		subclass = US_SC_UFI;	    /* an assumption */
 	}
@@ -1250,7 +1242,7 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 	memset(ss, 0, sizeof(struct us_data));
 
 	/* At this point, we know we've got a live one */
-	USB_STOR_PRINTF("\n\nUSB Mass Storage device detected\n");
+	debug("\n\nUSB Mass Storage device detected\n");
 
 	/* Initialize the us_data structure with some useful info */
 	ss->flags = flags;
@@ -1270,21 +1262,21 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 	}
 
 	/* set the handler pointers based on the protocol */
-	USB_STOR_PRINTF("Transport: ");
+	debug("Transport: ");
 	switch (ss->protocol) {
 	case US_PR_CB:
-		USB_STOR_PRINTF("Control/Bulk\n");
+		debug("Control/Bulk\n");
 		ss->transport = usb_stor_CB_transport;
 		ss->transport_reset = usb_stor_CB_reset;
 		break;
 
 	case US_PR_CBI:
-		USB_STOR_PRINTF("Control/Bulk/Interrupt\n");
+		debug("Control/Bulk/Interrupt\n");
 		ss->transport = usb_stor_CB_transport;
 		ss->transport_reset = usb_stor_CB_reset;
 		break;
 	case US_PR_BULK:
-		USB_STOR_PRINTF("Bulk/Bulk/Bulk\n");
+		debug("Bulk/Bulk/Bulk\n");
 		ss->transport = usb_stor_BBB_transport;
 		ss->transport_reset = usb_stor_BBB_reset;
 		break;
@@ -1300,34 +1292,35 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 	 * We will ignore any others.
 	 */
 	for (i = 0; i < iface->desc.bNumEndpoints; i++) {
+		ep_desc = &iface->ep_desc[i];
 		/* is it an BULK endpoint? */
-		if ((iface->ep_desc[i].bmAttributes &
+		if ((ep_desc->bmAttributes &
 		     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
-			if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN)
-				ss->ep_in = iface->ep_desc[i].bEndpointAddress &
-					USB_ENDPOINT_NUMBER_MASK;
+			if (ep_desc->bEndpointAddress & USB_DIR_IN)
+				ss->ep_in = ep_desc->bEndpointAddress &
+						USB_ENDPOINT_NUMBER_MASK;
 			else
 				ss->ep_out =
-					iface->ep_desc[i].bEndpointAddress &
+					ep_desc->bEndpointAddress &
 					USB_ENDPOINT_NUMBER_MASK;
 		}
 
 		/* is it an interrupt endpoint? */
-		if ((iface->ep_desc[i].bmAttributes &
-		    USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
-			ss->ep_int = iface->ep_desc[i].bEndpointAddress &
-				USB_ENDPOINT_NUMBER_MASK;
-			ss->irqinterval = iface->ep_desc[i].bInterval;
+		if ((ep_desc->bmAttributes &
+		     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
+			ss->ep_int = ep_desc->bEndpointAddress &
+						USB_ENDPOINT_NUMBER_MASK;
+			ss->irqinterval = ep_desc->bInterval;
 		}
 	}
-	USB_STOR_PRINTF("Endpoints In %d Out %d Int %d\n",
-		  ss->ep_in, ss->ep_out, ss->ep_int);
+	debug("Endpoints In %d Out %d Int %d\n",
+	      ss->ep_in, ss->ep_out, ss->ep_int);
 
 	/* Do some basic sanity checks, and bail if we find a problem */
 	if (usb_set_interface(dev, iface->desc.bInterfaceNumber, 0) ||
 	    !ss->ep_in || !ss->ep_out ||
 	    (ss->protocol == US_PR_CBI && ss->ep_int == 0)) {
-		USB_STOR_PRINTF("Problems with device\n");
+		debug("Problems with device\n");
 		return 0;
 	}
 	/* set class specific stuff */
@@ -1366,7 +1359,7 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss,
 
 	dev_desc->target = dev->devnum;
 	pccb->lun = dev_desc->lun;
-	USB_STOR_PRINTF(" address %d\n", dev_desc->target);
+	debug(" address %d\n", dev_desc->target);
 
 	if (usb_inquiry(pccb, ss))
 		return -1;
@@ -1392,8 +1385,8 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss,
 	usb_bin_fixup(dev->descriptor, (uchar *)dev_desc->vendor,
 		      (uchar *)dev_desc->product);
 #endif /* CONFIG_USB_BIN_FIXUP */
-	USB_STOR_PRINTF("ISO Vers %X, Response Data %X\n", usb_stor_buf[2],
-			usb_stor_buf[3]);
+	debug("ISO Vers %X, Response Data %X\n", usb_stor_buf[2],
+	      usb_stor_buf[3]);
 	if (usb_test_unit_ready(pccb, ss)) {
 		printf("Device NOT ready\n"
 		       "   Request Sense returned %02X %02X %02X\n",
@@ -1413,8 +1406,7 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss,
 		cap[1] = 0x200;
 	}
 	ss->flags &= ~USB_READY;
-	USB_STOR_PRINTF("Read Capacity returns: 0x%lx, 0x%lx\n", cap[0],
-			cap[1]);
+	debug("Read Capacity returns: 0x%lx, 0x%lx\n", cap[0], cap[1]);
 #if 0
 	if (cap[0] > (0x200000 * 10)) /* greater than 10 GByte */
 		cap[0] >>= 16;
@@ -1426,17 +1418,16 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss,
 	cap[0] += 1;
 	capacity = &cap[0];
 	blksz = &cap[1];
-	USB_STOR_PRINTF("Capacity = 0x%lx, blocksz = 0x%lx\n",
-			*capacity, *blksz);
+	debug("Capacity = 0x%lx, blocksz = 0x%lx\n", *capacity, *blksz);
 	dev_desc->lba = *capacity;
 	dev_desc->blksz = *blksz;
 	dev_desc->log2blksz = LOG2(dev_desc->blksz);
 	dev_desc->type = perq;
-	USB_STOR_PRINTF(" address %d\n", dev_desc->target);
-	USB_STOR_PRINTF("partype: %d\n", dev_desc->part_type);
+	debug(" address %d\n", dev_desc->target);
+	debug("partype: %d\n", dev_desc->part_type);
 
 	init_part(dev_desc);
 
-	USB_STOR_PRINTF("partype: %d\n", dev_desc->part_type);
+	debug("partype: %d\n", dev_desc->part_type);
 	return 1;
 }
diff --git a/config.mk b/config.mk
index b427a4eed0c..ddf350e8e9c 100644
--- a/config.mk
+++ b/config.mk
@@ -250,11 +250,10 @@ CPPFLAGS += -I$(TOPDIR)/include
 CPPFLAGS += -fno-builtin -ffreestanding -nostdinc	\
 	-isystem $(gccincdir) -pipe $(PLATFORM_CPPFLAGS)
 
-ifdef BUILD_TAG
-CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes \
-	-DBUILD_TAG='"$(BUILD_TAG)"'
-else
 CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes
+
+ifdef BUILD_TAG
+CFLAGS += -DBUILD_TAG='"$(BUILD_TAG)"'
 endif
 
 CFLAGS_SSP := $(call cc-option,-fno-stack-protector)
diff --git a/doc/README.b4860qds b/doc/README.b4860qds
index f6c5ff8e9c8..bd10a6df041 100644
--- a/doc/README.b4860qds
+++ b/doc/README.b4860qds
@@ -185,7 +185,7 @@ Start Address	End Address	Description	Size
 0xF_A0C0_0000 	0xF_DFFF_FFFF	Free		1012 MB
 0xF_A000_0000 	0xF_A0BF_FFFF	MAPLE0/1/2	12 MB
 0xF_0040_0000 	0xF_9FFF_FFFF	Free		12 GB
-0xF_0000_0000 	0xF_003F_FFFF	DCSR		4 MB
+0xF_0000_0000 	0xF_01FF_FFFF	DCSR		32 MB
 0xC_4000_0000 	0xE_FFFF_FFFF	Free		11 GB
 0xC_3000_0000 	0xC_3FFF_FFFF	sRIO-2 I/O 	256 MB
 0xC_2000_0000 	0xC_2FFF_FFFF	sRIO-1 I/O  	256 MB
@@ -215,7 +215,7 @@ Start Address	End Address	Description	Size
 0xF_A0C0_0000 	0xF_DFFF_FFFF	Free		1012 MB
 0xF_A000_0000 	0xF_A0BF_FFFF	MAPLE0/1/2	12 MB
 0xF_0040_0000 	0xF_9FFF_FFFF	Free		12 GB
-0xF_0000_0000 	0xF_003F_FFFF	DCSR		4 MB
+0xF_0000_0000 	0xF_01FF_FFFF	DCSR		32 MB
 0xC_4000_0000 	0xE_FFFF_FFFF	Free		11 GB
 0xC_3000_0000 	0xC_3FFF_FFFF	sRIO-2 I/O 	256 MB
 0xC_2000_0000 	0xC_2FFF_FFFF	sRIO-1 I/O  	256 MB
diff --git a/doc/README.fdt-control b/doc/README.fdt-control
index 5963f78e961..95a88a7c7bf 100644
--- a/doc/README.fdt-control
+++ b/doc/README.fdt-control
@@ -49,6 +49,12 @@ the features of each board in the device tree file, and have a single
 generic source base.
 
 To enable this feature, add CONFIG_OF_CONTROL to your board config file.
+It is currently supported on ARM, x86 and Microblaze - other architectures
+will need to add code to their arch/xxx/lib/board.c file to locate the
+FDT. Alternatively you can enable generic board support on your board
+(with CONFIG_SYS_GENERIC_BOARD) if this is available (as it is for
+PowerPC). For ARM, Tegra and Exynos5 have device trees available for
+common devices.
 
 
 What is a Flat Device Tree?
@@ -99,7 +105,8 @@ Then run the compiler (your version will vary):
 	*   Bad configuration:	0
 	* Strange test result:	0
 
-You will also find a useful ftdump utility for decoding a binary file.
+You will also find a useful fdtdump utility for decoding a binary file, as
+well as fdtget/fdtput for reading and writing properties in a binary file.
 
 
 Where do I get an fdt file for my board?
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 2cdb8a9dc0b..9223f6e4362 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -11,8 +11,11 @@ easily if here is something they might want to dig for...
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
-smdk6400         arm         arm1176        -           -           Zhong Hongbo <bocui107@gmail.com>
-ns9750dev        arm         arm926ejs      -           -           Markus Pietrek <mpietrek@fsforth.de>
+Alaska8220       powerpc     mpc8220        -           -
+Yukon8220        powerpc     mpc8220        -           -
+sorcery          powerpc     mpc8220        -           -
+smdk6400         arm         arm1176        52587f1	2013-04-12  Zhong Hongbo <bocui107@gmail.com>
+ns9750dev        arm         arm926ejs      4cfc611	2013-02-28  Markus Pietrek <mpietrek@fsforth.de>
 AMX860           powerpc     mpc860         1b0757e     2012-10-28  Wolfgang Denk <wd@denx.de>
 c2mon            powerpc     mpc855         1b0757e     2012-10-28  Wolfgang Denk <wd@denx.de>
 ETX094           powerpc     mpc850         1b0757e     2012-10-28  Wolfgang Denk <wd@denx.de>
diff --git a/doc/README.t4240qds b/doc/README.t4240qds
index 677d120a80f..a9841fb5f74 100644
--- a/doc/README.t4240qds
+++ b/doc/README.t4240qds
@@ -86,7 +86,7 @@ The addresses in brackets are physical addresses.
 
 0x0_0000_0000 (0x0_0000_0000) - 0x0_7fff_ffff   2GB DDR (more than 2GB is initialized but not mapped under with TLB)
 0x0_8000_0000 (0xc_0000_0000) - 0x0_dfff_ffff 1.5GB PCIE memory
-0x0_f000_0000 (0xf_0000_0000) - 0x0_f03f_ffff  4MB  DCSR
+0x0_f000_0000 (0xf_0000_0000) - 0x0_f1ff_ffff  32MB DCSR (includes trace buffers)
 0x0_f400_0000 (0xf_f400_0000) - 0x0_f5ff_ffff  32MB BMan
 0x0_f600_0000 (0xf_f600_0000) - 0x0_f7ff_ffff  32MB QMan
 0x0_f800_0000 (0xf_f800_0000) - 0x0_f803_ffff 256KB PCIE IO
@@ -96,3 +96,27 @@ The addresses in brackets are physical addresses.
 0x0_ffff_f000 (0x0_7fff_fff0) - 0x0_ffff_ffff   4KB Boot page translation for secondary cores
 
 The physical address of the last (boot page translation) varies with the actual DDR size.
+
+Voltage ID and VDD override
+--------------------
+T4240 has a VID feature. U-boot reads the VID efuses and adjust the voltage
+accordingly. The voltage can also be override by command vdd_override. The
+syntax is
+
+vdd_override <voltage in mV>, eg. 1050 is for 1.050v.
+
+Upon success, the actual voltage will be read back. The value is checked
+for safety and any invalid value will not adjust the voltage.
+
+Another way to override VDD is to use environmental variable, in case of using
+command is too late for some debugging. The syntax is
+
+setenv t4240qds_vdd_mv <voltage in mV>
+saveenv
+reset
+
+The override voltage takes effect when booting.
+
+Note: voltage adjustment needs to be done step by step. Changing voltage too
+rapidly may cause current surge. The voltage stepping is done by software.
+Users can set the final voltage directly.
diff --git a/doc/README.ubi b/doc/README.ubi
index da2dfac50ce..3cf4ef232d3 100644
--- a/doc/README.ubi
+++ b/doc/README.ubi
@@ -2,7 +2,8 @@
 UBI usage in U-Boot
 -------------------
 
-Here the list of the currently implemented UBI commands:
+UBI support in U-Boot is broken down into five separate commands.
+The first is the ubi command, which has six subcommands:
 
 => help ubi
 ubi - ubi commands
@@ -142,3 +143,80 @@ read 524288 bytes from volume 0 to 900000(buf address)
 
 => cmp.b 800000 900000 80000
 Total of 524288 bytes were the same
+
+
+Next, the ubifsmount command allows you to access filesystems on the
+UBI partition which has been attached with the ubi part command:
+
+=> help ubifsmount
+ubifsmount - mount UBIFS volume
+
+Usage:
+ubifsmount <volume-name>
+    - mount 'volume-name' volume
+
+For example:
+
+=> ubifsmount ubi0:recovery
+UBIFS: mounted UBI device 0, volume 0, name "recovery"
+UBIFS: mounted read-only
+UBIFS: file system size:   46473216 bytes (45384 KiB, 44 MiB, 366 LEBs)
+UBIFS: journal size:       6348800 bytes (6200 KiB, 6 MiB, 50 LEBs)
+UBIFS: media format:       w4/r0 (latest is w4/r0)
+UBIFS: default compressor: LZO
+UBIFS: reserved for root:  0 bytes (0 KiB)
+
+Note that unlike Linux, U-Boot can only have one active UBI partition
+at a time, which can be referred to as ubi0, and must be supplied along
+with the name of the filesystem you are mounting.
+
+
+Once a UBI filesystem has been mounted, the ubifsls command allows you
+to list the contents of a directory in the filesystem:
+
+
+=> help ubifsls
+ubifsls - list files in a directory
+
+Usage:
+ubifsls [directory]
+    - list files in a 'directory' (default '/')
+
+For example:
+
+=> ubifsls
+            17442  Thu Jan 01 02:57:38 1970  imx28-evk.dtb
+          2998146  Thu Jan 01 02:57:43 1970  zImage
+
+
+And the ubifsload command allows you to load a file from a UBI
+filesystem:
+
+
+=> help ubifsload
+ubifsload - load file from an UBIFS filesystem
+
+Usage:
+ubifsload <addr> <filename> [bytes]
+    - load file 'filename' to address 'addr'
+
+For example:
+
+=> ubifsload ${loadaddr} zImage
+Loading file 'zImage' to addr 0x42000000 with size 2998146 (0x002dbf82)...
+Done
+
+
+Finally, you can unmount the UBI filesystem with the ubifsumount
+command:
+
+=> help ubifsumount
+ubifsumount - unmount UBIFS volume
+
+Usage:
+ubifsumount     - unmount current volume
+
+For example:
+
+=> ubifsumount
+Unmounting UBIFS volume recovery!
diff --git a/doc/README.watchdog b/doc/README.watchdog
index 33f31c21405..59f306b8511 100644
--- a/doc/README.watchdog
+++ b/doc/README.watchdog
@@ -30,3 +30,6 @@ CONFIG_IMX_WATCHDOG
 
 CONFIG_XILINX_TB_WATCHDOG
 	Available for Xilinx Axi platforms to service timebase watchdog timer.
+
+CONFIG_BFIN_WATCHDOG
+	Available for bf5xx and bf6xx to service the watchdog.
diff --git a/doc/SPL/README.am335x-network b/doc/SPL/README.am335x-network
index e5a198f49cc..9b63791ad1e 100644
--- a/doc/SPL/README.am335x-network
+++ b/doc/SPL/README.am335x-network
@@ -7,7 +7,7 @@ NAND and bricked (empty) board with only a network cable.
 
  I. Building the required images
   1. You have to enable generic SPL configuration options (see
-docs/README.SPL) as well as CONFIG_SPL_NET_SUPPORT,
+doc/README.SPL) as well as CONFIG_SPL_NET_SUPPORT,
 CONFIG_ETH_SUPPORT, CONFIG_SPL_LIBGENERIC_SUPPORT and
 CONFIG_SPL_LIBCOMMON_SUPPORT in your board configuration file to build
 SPL with support for booting over the network. Also you have to enable
diff --git a/doc/driver-model/UDM-pci.txt b/doc/driver-model/UDM-pci.txt
index c2cf2d5a626..6a592b33688 100644
--- a/doc/driver-model/UDM-pci.txt
+++ b/doc/driver-model/UDM-pci.txt
@@ -201,11 +201,7 @@ III) Analysis of in-tree drivers
     -----------------------------
       Standard driver, uses indirect functions.
 
-    12) powerpc/cpu/mpc8220/pci.c
-    -----------------------------
-      Standard driver, specifies all read/write functions separately.
-
-    13) powerpc/cpu/mpc85xx/pci.c
+    12) powerpc/cpu/mpc85xx/pci.c
     -----------------------------
       Standard driver, uses indirect functions, has two busses.
 
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9df1e2632f7..f77c1ec1ef5 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -47,6 +47,8 @@ COBJS-$(CONFIG_OMAP_GPIO)	+= omap_gpio.o
 COBJS-$(CONFIG_DB8500_GPIO)	+= db8500_gpio.o
 COBJS-$(CONFIG_BCM2835_GPIO)	+= bcm2835_gpio.o
 COBJS-$(CONFIG_S3C2440_GPIO)	+= s3c2440_gpio.o
+COBJS-$(CONFIG_XILINX_GPIO)	+= xilinx_gpio.o
+COBJS-$(CONFIG_ADI_GPIO2)	+= adi_gpio2.o
 
 COBJS	:= $(COBJS-y)
 SRCS 	:= $(COBJS:.o=.c)
diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c
new file mode 100644
index 00000000000..7a034eba122
--- /dev/null
+++ b/drivers/gpio/adi_gpio2.c
@@ -0,0 +1,440 @@
+/*
+ * ADI GPIO2 Abstraction Layer
+ * Support BF54x, BF60x and future processors.
+ *
+ * Copyright 2008-2013 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later
+ */
+
+#include <common.h>
+#include <asm/errno.h>
+#include <asm/gpio.h>
+#include <asm/portmux.h>
+
+static struct gpio_port_t * const gpio_array[] = {
+	(struct gpio_port_t *)PORTA_FER,
+	(struct gpio_port_t *)PORTB_FER,
+	(struct gpio_port_t *)PORTC_FER,
+	(struct gpio_port_t *)PORTD_FER,
+	(struct gpio_port_t *)PORTE_FER,
+	(struct gpio_port_t *)PORTF_FER,
+	(struct gpio_port_t *)PORTG_FER,
+#if defined(CONFIG_BF54x)
+	(struct gpio_port_t *)PORTH_FER,
+	(struct gpio_port_t *)PORTI_FER,
+	(struct gpio_port_t *)PORTJ_FER,
+#endif
+};
+
+#define RESOURCE_LABEL_SIZE	16
+
+static struct str_ident {
+	char name[RESOURCE_LABEL_SIZE];
+} str_ident[MAX_RESOURCES];
+
+static void gpio_error(unsigned gpio)
+{
+	printf("adi_gpio2: GPIO %d wasn't requested!\n", gpio);
+}
+
+static void set_label(unsigned short ident, const char *label)
+{
+	if (label) {
+		strncpy(str_ident[ident].name, label,
+			RESOURCE_LABEL_SIZE);
+		str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
+	}
+}
+
+static char *get_label(unsigned short ident)
+{
+	return *str_ident[ident].name ? str_ident[ident].name : "UNKNOWN";
+}
+
+static int cmp_label(unsigned short ident, const char *label)
+{
+	if (label == NULL)
+		printf("adi_gpio2: please provide none-null label\n");
+
+	if (label)
+		return strcmp(str_ident[ident].name, label);
+	else
+		return -EINVAL;
+}
+
+#define map_entry(m, i)      reserved_##m##_map[gpio_bank(i)]
+#define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
+#define reserve(m, i)        (map_entry(m, i) |= gpio_bit(i))
+#define unreserve(m, i)      (map_entry(m, i) &= ~gpio_bit(i))
+#define DECLARE_RESERVED_MAP(m, c) unsigned short reserved_##m##_map[c]
+
+static DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
+static DECLARE_RESERVED_MAP(peri, gpio_bank(MAX_RESOURCES));
+
+inline int check_gpio(unsigned gpio)
+{
+#if defined(CONFIG_BF54x)
+	if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 ||
+		gpio == GPIO_PH14 || gpio == GPIO_PH15 ||
+		gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
+		return -EINVAL;
+#endif
+	if (gpio >= MAX_GPIOS)
+		return -EINVAL;
+	return 0;
+}
+
+static void port_setup(unsigned gpio, unsigned short usage)
+{
+#if defined(CONFIG_BF54x)
+	if (usage == GPIO_USAGE)
+		gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
+	else
+		gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
+#else
+	if (usage == GPIO_USAGE)
+		gpio_array[gpio_bank(gpio)]->port_fer_clear = gpio_bit(gpio);
+	else
+		gpio_array[gpio_bank(gpio)]->port_fer_set = gpio_bit(gpio);
+#endif
+	SSYNC();
+}
+
+inline void portmux_setup(unsigned short per)
+{
+	u32 pmux;
+	u16 ident = P_IDENT(per);
+	u16 function = P_FUNCT2MUX(per);
+
+	pmux = gpio_array[gpio_bank(ident)]->port_mux;
+
+	pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
+	pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
+
+	gpio_array[gpio_bank(ident)]->port_mux = pmux;
+}
+
+inline u16 get_portmux(unsigned short per)
+{
+	u32 pmux;
+	u16 ident = P_IDENT(per);
+
+	pmux = gpio_array[gpio_bank(ident)]->port_mux;
+
+	return pmux >> (2 * gpio_sub_n(ident)) & 0x3;
+}
+
+unsigned short get_gpio_dir(unsigned gpio)
+{
+	return 0x01 &
+		(gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio));
+}
+
+/***********************************************************
+*
+* FUNCTIONS:	Peripheral Resource Allocation
+*		and PortMux Setup
+*
+* INPUTS/OUTPUTS:
+* per	Peripheral Identifier
+* label	String
+*
+* DESCRIPTION: Peripheral Resource Allocation and Setup API
+**************************************************************/
+
+int peripheral_request(unsigned short per, const char *label)
+{
+	unsigned short ident = P_IDENT(per);
+
+	/*
+	 * Don't cares are pins with only one dedicated function
+	 */
+
+	if (per & P_DONTCARE)
+		return 0;
+
+	if (!(per & P_DEFINED))
+		return -ENODEV;
+
+	BUG_ON(ident >= MAX_RESOURCES);
+
+	/* If a pin can be muxed as either GPIO or peripheral, make
+	 * sure it is not already a GPIO pin when we request it.
+	 */
+	if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
+		printf("%s: Peripheral %d is already reserved as GPIO by %s!\n",
+		       __func__, ident, get_label(ident));
+		return -EBUSY;
+	}
+
+	if (unlikely(is_reserved(peri, ident, 1))) {
+		/*
+		 * Pin functions like AMC address strobes my
+		 * be requested and used by several drivers
+		 */
+
+		if (!((per & P_MAYSHARE) &&
+			get_portmux(per) == P_FUNCT2MUX(per))) {
+			/*
+			 * Allow that the identical pin function can
+			 * be requested from the same driver twice
+			 */
+
+			if (cmp_label(ident, label) == 0)
+				goto anyway;
+
+			printf("%s: Peripheral %d function %d is already "
+				"reserved by %s!\n", __func__, ident,
+				P_FUNCT2MUX(per), get_label(ident));
+			return -EBUSY;
+		}
+	}
+
+ anyway:
+	reserve(peri, ident);
+
+	portmux_setup(per);
+	port_setup(ident, PERIPHERAL_USAGE);
+
+	set_label(ident, label);
+
+	return 0;
+}
+
+int peripheral_request_list(const unsigned short per[], const char *label)
+{
+	u16 cnt;
+	int ret;
+
+	for (cnt = 0; per[cnt] != 0; cnt++) {
+		ret = peripheral_request(per[cnt], label);
+
+		if (ret < 0) {
+			for (; cnt > 0; cnt--)
+				peripheral_free(per[cnt - 1]);
+
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+void peripheral_free(unsigned short per)
+{
+	unsigned short ident = P_IDENT(per);
+
+	if (per & P_DONTCARE)
+		return;
+
+	if (!(per & P_DEFINED))
+		return;
+
+	if (unlikely(!is_reserved(peri, ident, 0)))
+		return;
+
+	if (!(per & P_MAYSHARE))
+		port_setup(ident, GPIO_USAGE);
+
+	unreserve(peri, ident);
+
+	set_label(ident, "free");
+}
+
+void peripheral_free_list(const unsigned short per[])
+{
+	u16 cnt;
+	for (cnt = 0; per[cnt] != 0; cnt++)
+		peripheral_free(per[cnt]);
+}
+
+/***********************************************************
+*
+* FUNCTIONS: GPIO Driver
+*
+* INPUTS/OUTPUTS:
+* gpio	PIO Number between 0 and MAX_GPIOS
+* label	String
+*
+* DESCRIPTION: GPIO Driver API
+**************************************************************/
+
+int gpio_request(unsigned gpio, const char *label)
+{
+	if (check_gpio(gpio) < 0)
+		return -EINVAL;
+
+	/*
+	 * Allow that the identical GPIO can
+	 * be requested from the same driver twice
+	 * Do nothing and return -
+	 */
+
+	if (cmp_label(gpio, label) == 0)
+		return 0;
+
+	if (unlikely(is_reserved(gpio, gpio, 1))) {
+		printf("adi_gpio2: GPIO %d is already reserved by %s!\n",
+			gpio, get_label(gpio));
+		return -EBUSY;
+	}
+	if (unlikely(is_reserved(peri, gpio, 1))) {
+		printf("adi_gpio2: GPIO %d is already reserved as Peripheral "
+			"by %s!\n", gpio, get_label(gpio));
+		return -EBUSY;
+	}
+
+	reserve(gpio, gpio);
+	set_label(gpio, label);
+
+	port_setup(gpio, GPIO_USAGE);
+
+	return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+	if (check_gpio(gpio) < 0)
+		return -1;
+
+	if (unlikely(!is_reserved(gpio, gpio, 0))) {
+		gpio_error(gpio);
+		return -1;
+	}
+
+	unreserve(gpio, gpio);
+
+	set_label(gpio, "free");
+
+	return 0;
+}
+
+#ifdef ADI_SPECIAL_GPIO_BANKS
+static DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
+
+int special_gpio_request(unsigned gpio, const char *label)
+{
+	/*
+	 * Allow that the identical GPIO can
+	 * be requested from the same driver twice
+	 * Do nothing and return -
+	 */
+
+	if (cmp_label(gpio, label) == 0)
+		return 0;
+
+	if (unlikely(is_reserved(special_gpio, gpio, 1))) {
+		printf("adi_gpio2: GPIO %d is already reserved by %s!\n",
+			gpio, get_label(gpio));
+		return -EBUSY;
+	}
+	if (unlikely(is_reserved(peri, gpio, 1))) {
+		printf("adi_gpio2: GPIO %d is already reserved as Peripheral "
+			"by %s!\n", gpio, get_label(gpio));
+
+		return -EBUSY;
+	}
+
+	reserve(special_gpio, gpio);
+	reserve(peri, gpio);
+
+	set_label(gpio, label);
+	port_setup(gpio, GPIO_USAGE);
+
+	return 0;
+}
+
+void special_gpio_free(unsigned gpio)
+{
+	if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
+		gpio_error(gpio);
+		return;
+	}
+
+	reserve(special_gpio, gpio);
+	reserve(peri, gpio);
+	set_label(gpio, "free");
+}
+#endif
+
+static inline void __gpio_direction_input(unsigned gpio)
+{
+	gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
+#if defined(CONFIG_BF54x)
+	gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
+#else
+	gpio_array[gpio_bank(gpio)]->inen_set = gpio_bit(gpio);
+#endif
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+	unsigned long flags;
+
+	if (!is_reserved(gpio, gpio, 0)) {
+		gpio_error(gpio);
+		return -EINVAL;
+	}
+
+	local_irq_save(flags);
+	__gpio_direction_input(gpio);
+	local_irq_restore(flags);
+
+	return 0;
+}
+
+int gpio_set_value(unsigned gpio, int arg)
+{
+	if (arg)
+		gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
+	else
+		gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
+
+	return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+	unsigned long flags;
+
+	if (!is_reserved(gpio, gpio, 0)) {
+		gpio_error(gpio);
+		return -EINVAL;
+	}
+
+	local_irq_save(flags);
+
+#if defined(CONFIG_BF54x)
+	gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
+#else
+	gpio_array[gpio_bank(gpio)]->inen_clear = gpio_bit(gpio);
+#endif
+	gpio_set_value(gpio, value);
+	gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
+
+	local_irq_restore(flags);
+
+	return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+	return 1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio));
+}
+
+void gpio_labels(void)
+{
+	int c, gpio;
+
+	for (c = 0; c < MAX_RESOURCES; c++) {
+		gpio = is_reserved(gpio, c, 1);
+		if (!check_gpio(c) && gpio)
+			printf("GPIO_%d:\t%s\tGPIO %s\n", c, get_label(c),
+				get_gpio_dir(c) ? "OUTPUT" : "INPUT");
+		else if (is_reserved(peri, c, 1))
+			printf("GPIO_%d:\t%s\tPeripheral\n", c, get_label(c));
+		else
+			continue;
+	}
+}
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
new file mode 100644
index 00000000000..37fb0c50b0b
--- /dev/null
+++ b/drivers/gpio/xilinx_gpio.c
@@ -0,0 +1,364 @@
+/*
+ * Copyright (c) 2013 Xilinx, Michal Simek
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <linux/list.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+static LIST_HEAD(gpio_list);
+
+enum gpio_direction {
+	GPIO_DIRECTION_OUT = 0,
+	GPIO_DIRECTION_IN = 1,
+};
+
+/* Gpio simple map */
+struct gpio_regs {
+	u32 gpiodata;
+	u32 gpiodir;
+};
+
+#define GPIO_NAME_SIZE	10
+
+struct gpio_names {
+	char name[GPIO_NAME_SIZE];
+};
+
+/* Initialized, rxbd_current, rx_first_buf must be 0 after init */
+struct xilinx_gpio_priv {
+	struct gpio_regs *regs;
+	u32 gpio_min;
+	u32 gpio_max;
+	u32 gpiodata_store;
+	char name[GPIO_NAME_SIZE];
+	struct list_head list;
+	struct gpio_names *gpio_name;
+};
+
+/* Store number of allocated gpio pins */
+static u32 xilinx_gpio_max;
+
+/* Get associated gpio controller */
+static struct xilinx_gpio_priv *gpio_get_controller(unsigned gpio)
+{
+	struct list_head *entry;
+	struct xilinx_gpio_priv *priv = NULL;
+
+	list_for_each(entry, &gpio_list) {
+		priv = list_entry(entry, struct xilinx_gpio_priv, list);
+		if (gpio >= priv->gpio_min && gpio <= priv->gpio_max) {
+			debug("%s: reg: %x, min-max: %d-%d\n", __func__,
+			      (u32)priv->regs, priv->gpio_min, priv->gpio_max);
+			return priv;
+		}
+	}
+	puts("!!!Can't get gpio controller!!!\n");
+	return NULL;
+}
+
+/* Get gpio pin name if used/setup */
+static char *get_name(unsigned gpio)
+{
+	u32 gpio_priv;
+	struct xilinx_gpio_priv *priv;
+
+	debug("%s\n", __func__);
+
+	priv = gpio_get_controller(gpio);
+	if (priv) {
+		gpio_priv = gpio - priv->gpio_min;
+
+		return *priv->gpio_name[gpio_priv].name ?
+			priv->gpio_name[gpio_priv].name : "UNKNOWN";
+	}
+	return "UNKNOWN";
+}
+
+/* Get output value */
+static int gpio_get_output_value(unsigned gpio)
+{
+	u32 val, gpio_priv;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+
+	if (priv) {
+		gpio_priv = gpio - priv->gpio_min;
+		val = !!(priv->gpiodata_store & (1 << gpio_priv));
+		debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+		      (u32)priv->regs, gpio_priv, val);
+
+		return val;
+	}
+	return -1;
+}
+
+/* Get input value */
+static int gpio_get_input_value(unsigned gpio)
+{
+	u32 val, gpio_priv;
+	struct gpio_regs *regs;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+
+	if (priv) {
+		regs = priv->regs;
+		gpio_priv = gpio - priv->gpio_min;
+		val = readl(&regs->gpiodata);
+		val = !!(val & (1 << gpio_priv));
+		debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+		      (u32)priv->regs, gpio_priv, val);
+
+		return val;
+	}
+	return -1;
+}
+
+/* Set gpio direction */
+static int gpio_set_direction(unsigned gpio, enum gpio_direction direction)
+{
+	u32 val, gpio_priv;
+	struct gpio_regs *regs;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+
+	if (priv) {
+		regs = priv->regs;
+		val = readl(&regs->gpiodir);
+
+		gpio_priv = gpio - priv->gpio_min;
+		if (direction == GPIO_DIRECTION_OUT)
+			val &= ~(1 << gpio_priv);
+		else
+			val |= 1 << gpio_priv;
+
+		writel(val, &regs->gpiodir);
+		debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+		      (u32)priv->regs, gpio_priv, val);
+
+		return 0;
+	}
+
+	return -1;
+}
+
+/* Get gpio direction */
+static int gpio_get_direction(unsigned gpio)
+{
+	u32 val, gpio_priv;
+	struct gpio_regs *regs;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+
+	if (priv) {
+		regs = priv->regs;
+		gpio_priv = gpio - priv->gpio_min;
+		val = readl(&regs->gpiodir);
+		val = !!(val & (1 << gpio_priv));
+		debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+		      (u32)priv->regs, gpio_priv, val);
+
+		return val;
+	}
+
+	return -1;
+}
+
+/*
+ * Get input value
+ * for example gpio setup to output only can't get input value
+ * which is breaking gpio toggle command
+ */
+int gpio_get_value(unsigned gpio)
+{
+	u32 val;
+
+	if (gpio_get_direction(gpio) == GPIO_DIRECTION_OUT)
+		val = gpio_get_output_value(gpio);
+	else
+		val = gpio_get_input_value(gpio);
+
+	return val;
+}
+
+/* Set output value */
+static int gpio_set_output_value(unsigned gpio, int value)
+{
+	u32 val, gpio_priv;
+	struct gpio_regs *regs;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+
+	if (priv) {
+		regs = priv->regs;
+		gpio_priv = gpio - priv->gpio_min;
+		val = priv->gpiodata_store;
+		if (value)
+			val |= 1 << gpio_priv;
+		else
+			val &= ~(1 << gpio_priv);
+
+		writel(val, &regs->gpiodata);
+		debug("%s: reg: %x, gpio_no: %d, output_val: %d\n", __func__,
+		      (u32)priv->regs, gpio_priv, val);
+		priv->gpiodata_store = val;
+
+		return 0;
+	}
+
+	return -1;
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+	if (gpio_get_direction(gpio) == GPIO_DIRECTION_OUT)
+		return gpio_set_output_value(gpio, value);
+
+	return -1;
+}
+
+/* Set GPIO as input */
+int gpio_direction_input(unsigned gpio)
+{
+	debug("%s\n", __func__);
+	return gpio_set_direction(gpio, GPIO_DIRECTION_IN);
+}
+
+/* Setup GPIO as output and set output value */
+int gpio_direction_output(unsigned gpio, int value)
+{
+	int ret = gpio_set_direction(gpio, GPIO_DIRECTION_OUT);
+
+	debug("%s\n", __func__);
+
+	if (ret < 0)
+		return ret;
+
+	return gpio_set_output_value(gpio, value);
+}
+
+/* Show gpio status */
+void gpio_info(void)
+{
+	unsigned gpio;
+
+	struct list_head *entry;
+	struct xilinx_gpio_priv *priv = NULL;
+
+	list_for_each(entry, &gpio_list) {
+		priv = list_entry(entry, struct xilinx_gpio_priv, list);
+		printf("\n%s: %s/%x (%d-%d)\n", __func__, priv->name,
+		       (u32)priv->regs, priv->gpio_min, priv->gpio_max);
+
+		for (gpio = priv->gpio_min; gpio <= priv->gpio_max; gpio++) {
+			printf("GPIO_%d:\t%s is an ", gpio, get_name(gpio));
+			if (gpio_get_direction(gpio) == GPIO_DIRECTION_OUT)
+				printf("OUTPUT value = %d\n",
+				       gpio_get_output_value(gpio));
+			else
+				printf("INPUT value = %d\n",
+				       gpio_get_input_value(gpio));
+		}
+	}
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+	u32 gpio_priv;
+	struct xilinx_gpio_priv *priv;
+
+	if (gpio >= xilinx_gpio_max)
+		return -EINVAL;
+
+	priv = gpio_get_controller(gpio);
+	if (priv) {
+		gpio_priv = gpio - priv->gpio_min;
+
+		if (label != NULL) {
+			strncpy(priv->gpio_name[gpio_priv].name, label,
+				GPIO_NAME_SIZE);
+			priv->gpio_name[gpio_priv].name[GPIO_NAME_SIZE - 1] =
+					'\0';
+		}
+		return 0;
+	}
+
+	return -1;
+}
+
+int gpio_free(unsigned gpio)
+{
+	u32 gpio_priv;
+	struct xilinx_gpio_priv *priv;
+
+	if (gpio >= xilinx_gpio_max)
+		return -EINVAL;
+
+	priv = gpio_get_controller(gpio);
+	if (priv) {
+		gpio_priv = gpio - priv->gpio_min;
+		priv->gpio_name[gpio_priv].name[0] = '\0';
+
+		/* Do nothing here */
+		return 0;
+	}
+
+	return -1;
+}
+
+int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no)
+{
+	struct xilinx_gpio_priv *priv;
+
+	priv = calloc(1, sizeof(struct xilinx_gpio_priv));
+
+	/* Setup gpio name */
+	if (name != NULL) {
+		strncpy(priv->name, name, GPIO_NAME_SIZE);
+		priv->name[GPIO_NAME_SIZE - 1] = '\0';
+	}
+	priv->regs = (struct gpio_regs *)baseaddr;
+
+	priv->gpio_min = xilinx_gpio_max;
+	xilinx_gpio_max = priv->gpio_min + gpio_no;
+	priv->gpio_max = xilinx_gpio_max - 1;
+
+	priv->gpio_name = calloc(gpio_no, sizeof(struct gpio_names));
+
+	INIT_LIST_HEAD(&priv->list);
+	list_add_tail(&priv->list, &gpio_list);
+
+	printf("%s: Add %s (%d-%d)\n", __func__, name,
+	       priv->gpio_min, priv->gpio_max);
+
+	/* Return the first gpio allocated for this device */
+	return priv->gpio_min;
+}
+
+/* Dual channel gpio is one IP with two independent channels */
+int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0, u32 gpio_no1)
+{
+	int ret;
+
+	ret = gpio_alloc(baseaddr, name, gpio_no0);
+	gpio_alloc(baseaddr + 8, strcat((char *)name, "_1"), gpio_no1);
+
+	/* Return the first gpio allocated for this device */
+	return ret;
+}
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 7cd4281733b..24648a29378 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -25,14 +25,11 @@ include $(TOPDIR)/config.mk
 
 LIB	:= $(obj)libmmc.o
 
-ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
-endif
 
 COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o
 COBJS-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
 COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
-COBJS-$(CONFIG_FTSDC010) += ftsdc010_esdhc.o
+COBJS-$(CONFIG_FTSDC010) += ftsdc010_mci.o
 COBJS-$(CONFIG_GENERIC_MMC) += mmc.o
 COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
 COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o
@@ -46,6 +43,7 @@ COBJS-$(CONFIG_SDHCI) += sdhci.o
 COBJS-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
 COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
 COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o
+COBJS-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
 COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
 COBJS-$(CONFIG_DWMMC) += dw_mmc.o
 COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index e2379e326ee..5aa218426f4 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -285,8 +285,11 @@ dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 			 */
 			if (bytes_left > fifo_bytes)
 				dmmc_wait_fifo_status(regs, 0x4a);
-			else if (bytes_left == fifo_bytes)
+			else if (bytes_left == fifo_bytes) {
 				dmmc_wait_fifo_status(regs, 0x40);
+				if (cmd->cmdidx == MMC_CMD_SEND_EXT_CSD)
+					udelay(600);
+			}
 
 			for (i = 0; bytes_left && (i < fifo_words); i++) {
 				cmddata = get_val(&regs->mmcdrr);
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index e945c0a470c..861f4b9d6ca 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -178,7 +178,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 	int timeout;
 	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
 	struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
-#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
+#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
 	uint wml_value;
 
 	wml_value = data->blocksize/4;
@@ -601,8 +601,7 @@ int fsl_esdhc_mmc_init(bd_t *bis)
 {
 	struct fsl_esdhc_cfg *cfg;
 
-	cfg = malloc(sizeof(struct fsl_esdhc_cfg));
-	memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
+	cfg = calloc(sizeof(struct fsl_esdhc_cfg), 1);
 	cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
 	cfg->sdhc_clk = gd->arch.sdhc_clk;
 	return fsl_esdhc_initialize(bis, cfg);
diff --git a/drivers/mmc/ftsdc010_esdhc.c b/drivers/mmc/ftsdc010_esdhc.c
deleted file mode 100644
index 42f0e0ce55b..00000000000
--- a/drivers/mmc/ftsdc010_esdhc.c
+++ /dev/null
@@ -1,687 +0,0 @@
-/*
- * Copyright (C) 2011 Andes Technology Corporation
- * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <mmc.h>
-
-#include <asm/io.h>
-#include <faraday/ftsdc010.h>
-
-/*
- * supported mmc hosts
- * setting the number CONFIG_FTSDC010_NUMBER in your configuration file.
- */
-static struct mmc ftsdc010_dev[CONFIG_FTSDC010_NUMBER];
-static struct mmc_host ftsdc010_host[CONFIG_FTSDC010_NUMBER];
-
-static struct ftsdc010_mmc *ftsdc010_get_base_mmc(int dev_index)
-{
-	return (struct ftsdc010_mmc *)CONFIG_FTSDC010_BASE + dev_index;
-}
-
-#ifdef DEBUG
-static void ftsdc010_dump_reg(struct mmc_host *host)
-{
-	debug("cmd: %08x\n",		readl(&host->reg->cmd));
-	debug("argu: %08x\n",		readl(&host->reg->argu));
-	debug("rsp0: %08x\n",		readl(&host->reg->rsp0));
-	debug("rsp1: %08x\n",		readl(&host->reg->rsp1));
-	debug("rsp2: %08x\n",		readl(&host->reg->rsp2));
-	debug("rsp3: %08x\n",		readl(&host->reg->rsp3));
-	debug("rsp_cmd: %08x\n",	readl(&host->reg->rsp_cmd));
-	debug("dcr: %08x\n",		readl(&host->reg->dcr));
-	debug("dtr: %08x\n",		readl(&host->reg->dtr));
-	debug("dlr: %08x\n",		readl(&host->reg->dlr));
-	debug("status: %08x\n",		readl(&host->reg->status));
-	debug("clr: %08x\n",		readl(&host->reg->clr));
-	debug("int_mask: %08x\n",	readl(&host->reg->int_mask));
-	debug("pcr: %08x\n",		readl(&host->reg->pcr));
-	debug("ccr: %08x\n",		readl(&host->reg->ccr));
-	debug("bwr: %08x\n",		readl(&host->reg->bwr));
-	debug("dwr: %08x\n",		readl(&host->reg->dwr));
-	debug("feature: %08x\n",	readl(&host->reg->feature));
-	debug("rev: %08x\n",		readl(&host->reg->rev));
-}
-#endif
-
-static unsigned int enable_imask(struct ftsdc010_mmc *reg, unsigned int imask)
-{
-	unsigned int newmask;
-
-	newmask = readl(&reg->int_mask);
-	newmask |= imask;
-
-	writel(newmask, &reg->int_mask);
-
-	return newmask;
-}
-
-static void ftsdc010_pio_read(struct mmc_host *host, char *buf, unsigned int size)
-{
-	unsigned int fifo;
-	unsigned int fifo_words;
-	unsigned int *ptr;
-	unsigned int status;
-	unsigned int retry = 0;
-
-	/* get_data_buffer */
-	ptr = (unsigned int *)buf;
-
-	while (size) {
-		status = readl(&host->reg->status);
-		debug("%s: size: %08x\n", __func__, size);
-
-		if (status & FTSDC010_STATUS_FIFO_ORUN) {
-
-			debug("%s: FIFO OVERRUN: sta: %08x\n",
-					__func__, status);
-
-			fifo = host->fifo_len > size ?
-				size : host->fifo_len;
-
-			size -= fifo;
-
-			fifo_words = fifo >> 2;
-
-			while (fifo_words--)
-				*ptr++ = readl(&host->reg->dwr);
-
-			/*
-			 * for adding some delays for SD card to put
-			 * data into FIFO again
-			 */
-			udelay(4*FTSDC010_DELAY_UNIT);
-
-#ifdef CONFIG_FTSDC010_SDIO
-			/* sdio allow non-power-of-2 blksz */
-			if (fifo & 3) {
-				unsigned int n = fifo & 3;
-				unsigned int data = readl(&host->reg->dwr);
-
-				unsigned char *p = (unsigned char *)ptr;
-
-				while (n--) {
-					*p++ = data;
-					data >>= 8;
-				}
-			}
-#endif
-		} else {
-			udelay(1);
-			if (++retry >= FTSDC010_PIO_RETRY) {
-				debug("%s: PIO_RETRY timeout\n", __func__);
-				return;
-			}
-		}
-	}
-}
-
-static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
-			unsigned int size)
-{
-	unsigned int fifo;
-	unsigned int *ptr;
-	unsigned int status;
-	unsigned int retry = 0;
-
-	/* get data buffer */
-	ptr = (unsigned int *)buf;
-
-	while (size) {
-		status = readl(&host->reg->status);
-
-		if (status & FTSDC010_STATUS_FIFO_URUN) {
-			fifo = host->fifo_len > size ?
-				size : host->fifo_len;
-
-			size -= fifo;
-
-			fifo = (fifo + 3) >> 2;
-
-			while (fifo--) {
-				writel(*ptr, &host->reg->dwr);
-				ptr++;
-			}
-		} else {
-			udelay(1);
-			if (++retry >= FTSDC010_PIO_RETRY) {
-				debug("%s: PIO_RETRY timeout\n", __func__);
-				return;
-			}
-		}
-	}
-}
-
-static int ftsdc010_check_rsp(struct mmc *mmc, struct mmc_cmd *cmd,
-			struct mmc_data *data)
-{
-	struct mmc_host *host = mmc->priv;
-	unsigned int sta, clear;
-
-	sta = readl(&host->reg->status);
-	debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
-
-	/* check RSP TIMEOUT or FAIL */
-	if (sta & FTSDC010_STATUS_RSP_TIMEOUT) {
-		/* RSP TIMEOUT */
-		debug("%s: RSP timeout: sta: %08x\n", __func__, sta);
-
-		clear |= FTSDC010_CLR_RSP_TIMEOUT;
-		writel(clear, &host->reg->clr);
-
-		return TIMEOUT;
-	} else if (sta & FTSDC010_STATUS_RSP_CRC_FAIL) {
-		/* clear response fail bit */
-		debug("%s: RSP CRC FAIL: sta: %08x\n", __func__, sta);
-
-		clear |= FTSDC010_CLR_RSP_CRC_FAIL;
-		writel(clear, &host->reg->clr);
-
-		return COMM_ERR;
-	} else if (sta & FTSDC010_STATUS_RSP_CRC_OK) {
-
-		/* clear response CRC OK bit */
-		clear |= FTSDC010_CLR_RSP_CRC_OK;
-	}
-
-	writel(clear, &host->reg->clr);
-	return 0;
-}
-
-static int ftsdc010_check_data(struct mmc *mmc, struct mmc_cmd *cmd,
-			struct mmc_data *data)
-{
-	struct mmc_host *host = mmc->priv;
-	unsigned int sta, clear;
-
-	sta = readl(&host->reg->status);
-	debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
-
-	/* check DATA TIMEOUT or FAIL */
-	if (data) {
-
-		/* Transfer Complete */
-		if (sta & FTSDC010_STATUS_DATA_END)
-			clear |= FTSDC010_STATUS_DATA_END;
-
-		/* Data CRC_OK */
-		if (sta & FTSDC010_STATUS_DATA_CRC_OK)
-			clear |= FTSDC010_STATUS_DATA_CRC_OK;
-
-		/* DATA TIMEOUT or DATA CRC FAIL */
-		if (sta & FTSDC010_STATUS_DATA_TIMEOUT) {
-			/* DATA TIMEOUT */
-			debug("%s: DATA TIMEOUT: sta: %08x\n", __func__, sta);
-
-			clear |= FTSDC010_STATUS_DATA_TIMEOUT;
-			writel(clear, &host->reg->clr);
-
-			return TIMEOUT;
-		} else if (sta & FTSDC010_STATUS_DATA_CRC_FAIL) {
-			/* DATA CRC FAIL */
-			debug("%s: DATA CRC FAIL: sta: %08x\n", __func__, sta);
-
-			clear |= FTSDC010_STATUS_DATA_CRC_FAIL;
-			writel(clear, &host->reg->clr);
-
-			return COMM_ERR;
-		}
-		writel(clear, &host->reg->clr);
-	}
-	return 0;
-}
-
-static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
-			struct mmc_data *data)
-{
-	struct mmc_host *host = mmc->priv;
-
-#ifdef CONFIG_FTSDC010_SDIO
-	unsigned int scon;
-#endif
-	unsigned int ccon;
-	unsigned int mask, tmpmask;
-	unsigned int ret;
-	unsigned int sta, i;
-
-	ret = 0;
-
-	if (data)
-		mask = FTSDC010_INT_MASK_RSP_TIMEOUT;
-	else if (cmd->resp_type & MMC_RSP_PRESENT)
-		mask = FTSDC010_INT_MASK_RSP_TIMEOUT;
-	else
-		mask = FTSDC010_INT_MASK_CMD_SEND;
-
-	/* write argu reg */
-	debug("%s: argu: %08x\n", __func__, host->reg->argu);
-	writel(cmd->cmdarg, &host->reg->argu);
-
-	/* setup commnad */
-	ccon = FTSDC010_CMD_IDX(cmd->cmdidx);
-
-	/* setup command flags */
-	ccon |= FTSDC010_CMD_CMD_EN;
-
-	/*
-	 * This hardware didn't support specific commands for mapping
-	 * MMC_RSP_BUSY and MMC_RSP_OPCODE. Hence we don't deal with it.
-	 */
-	if (cmd->resp_type & MMC_RSP_PRESENT) {
-		ccon |= FTSDC010_CMD_NEED_RSP;
-		mask |= FTSDC010_INT_MASK_RSP_CRC_OK |
-			FTSDC010_INT_MASK_RSP_CRC_FAIL;
-	}
-
-	if (cmd->resp_type & MMC_RSP_136)
-		ccon |= FTSDC010_CMD_LONG_RSP;
-
-	/* In Linux driver, MMC_CMD_APP_CMD is checked in last_opcode */
-	if (host->last_opcode == MMC_CMD_APP_CMD)
-		ccon |= FTSDC010_CMD_APP_CMD;
-
-#ifdef CONFIG_FTSDC010_SDIO
-	scon = readl(&host->reg->sdio_ctrl1);
-	if (host->card_type == MMC_TYPE_SDIO)
-		scon |= FTSDC010_SDIO_CTRL1_SDIO_ENABLE;
-	else
-		scon &= ~FTSDC010_SDIO_CTRL1_SDIO_ENABLE;
-	writel(scon, &host->reg->sdio_ctrl1);
-#endif
-
-	/* record last opcode for specifing the command type to hardware */
-	host->last_opcode = cmd->cmdidx;
-
-	/* write int_mask reg */
-	tmpmask = readl(&host->reg->int_mask);
-	tmpmask |= mask;
-	writel(tmpmask, &host->reg->int_mask);
-
-	/* write cmd reg */
-	debug("%s: ccon: %08x\n", __func__, ccon);
-	writel(ccon, &host->reg->cmd);
-
-	/* check CMD_SEND */
-	for (i = 0; i < FTSDC010_CMD_RETRY; i++) {
-		/*
-		 * If we read status register too fast
-		 * will lead hardware error and the RSP_TIMEOUT
-		 * flag will be raised incorrectly.
-		 */
-		udelay(16*FTSDC010_DELAY_UNIT);
-		sta = readl(&host->reg->status);
-
-		/* Command Complete */
-		/*
-		 * Note:
-		 *	Do not clear FTSDC010_CLR_CMD_SEND flag.
-		 *	(by writing FTSDC010_CLR_CMD_SEND bit to clear register)
-		 *	It will make the driver becomes very slow.
-		 *	If the operation hasn't been finished, hardware will
-		 *	clear this bit automatically.
-		 *	In origin, the driver will clear this flag if there is
-		 *	no data need to be read.
-		 */
-		if (sta & FTSDC010_STATUS_CMD_SEND)
-			break;
-	}
-
-	if (i > FTSDC010_CMD_RETRY) {
-		printf("%s: send command timeout\n", __func__);
-		return TIMEOUT;
-	}
-
-	/* check rsp status */
-	ret = ftsdc010_check_rsp(mmc, cmd, data);
-	if (ret)
-		return ret;
-
-	/* read response if we have RSP_OK */
-	if (ccon & FTSDC010_CMD_LONG_RSP) {
-		cmd->response[0] = readl(&host->reg->rsp3);
-		cmd->response[1] = readl(&host->reg->rsp2);
-		cmd->response[2] = readl(&host->reg->rsp1);
-		cmd->response[3] = readl(&host->reg->rsp0);
-	} else {
-		cmd->response[0] = readl(&host->reg->rsp0);
-	}
-
-	/* read/write data */
-	if (data && (data->flags & MMC_DATA_READ)) {
-		ftsdc010_pio_read(host, data->dest,
-				data->blocksize * data->blocks);
-	} else if (data && (data->flags & MMC_DATA_WRITE)) {
-		ftsdc010_pio_write(host, data->src,
-				data->blocksize * data->blocks);
-	}
-
-	/* check data status */
-	if (data) {
-		ret = ftsdc010_check_data(mmc, cmd, data);
-		if (ret)
-			return ret;
-	}
-
-	udelay(FTSDC010_DELAY_UNIT);
-	return ret;
-}
-
-static unsigned int cal_blksz(unsigned int blksz)
-{
-	unsigned int blksztwo = 0;
-
-	while (blksz >>= 1)
-		blksztwo++;
-
-	return blksztwo;
-}
-
-static int ftsdc010_setup_data(struct mmc *mmc, struct mmc_data *data)
-{
-	struct mmc_host *host = mmc->priv;
-	unsigned int dcon, newmask;
-
-	/* configure data transfer paramter */
-	if (!data)
-		return 0;
-
-	if (((data->blocksize - 1) & data->blocksize) != 0) {
-		printf("%s: can't do non-power-of 2 sized block transfers"
-			" (blksz %d)\n", __func__, data->blocksize);
-		return -1;
-	}
-
-	/*
-	 * We cannot deal with unaligned blocks with more than
-	 * one block being transfered.
-	 */
-	if ((data->blocksize <= 2) && (data->blocks > 1)) {
-			printf("%s: can't do non-word sized block transfers"
-				" (blksz %d)\n", __func__, data->blocksize);
-			return -1;
-	}
-
-	/* data length */
-	dcon = data->blocksize * data->blocks;
-	writel(dcon, &host->reg->dlr);
-
-	/* write data control */
-	dcon = cal_blksz(data->blocksize);
-
-	/* add to IMASK register */
-	newmask = (FTSDC010_STATUS_RSP_CRC_FAIL | FTSDC010_STATUS_DATA_TIMEOUT);
-
-	/*
-	 * enable UNDERRUN will trigger interrupt immediatedly
-	 * So setup it when rsp is received successfully
-	 */
-	if (data->flags & MMC_DATA_WRITE) {
-		dcon |= FTSDC010_DCR_DATA_WRITE;
-	} else {
-		dcon &= ~FTSDC010_DCR_DATA_WRITE;
-		newmask |= FTSDC010_STATUS_FIFO_ORUN;
-	}
-	enable_imask(host->reg, newmask);
-
-#ifdef CONFIG_FTSDC010_SDIO
-	/* always reset fifo since last transfer may fail */
-	dcon |= FTSDC010_DCR_FIFO_RST;
-
-	if (data->blocks > 1)
-		dcon |= FTSDC010_SDIO_CTRL1_SDIO_BLK_MODE;
-#endif
-
-	/* enable data transfer which will be pended until cmd is send */
-	dcon |= FTSDC010_DCR_DATA_EN;
-	writel(dcon, &host->reg->dcr);
-
-	return 0;
-}
-
-static int ftsdc010_send_request(struct mmc *mmc, struct mmc_cmd *cmd,
-			struct mmc_data *data)
-{
-	int ret;
-
-	if (data) {
-		ret = ftsdc010_setup_data(mmc, data);
-
-		if (ret) {
-			printf("%s: setup data error\n", __func__);
-			return -1;
-		}
-
-		if ((data->flags & MMC_DATA_BOTH_DIR) == MMC_DATA_BOTH_DIR) {
-			printf("%s: data is both direction\n", __func__);
-			return -1;
-		}
-	}
-
-	/* Send command */
-	ret = ftsdc010_send_cmd(mmc, cmd, data);
-	return ret;
-}
-
-static int ftsdc010_card_detect(struct mmc *mmc)
-{
-	struct mmc_host *host = mmc->priv;
-	unsigned int sta;
-
-	sta = readl(&host->reg->status);
-	debug("%s: card status: %08x\n", __func__, sta);
-
-	return (sta & FTSDC010_STATUS_CARD_DETECT) ? 0 : 1;
-}
-
-static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd,
-			struct mmc_data *data)
-{
-	int ret;
-
-	if (ftsdc010_card_detect(mmc) == 0) {
-		printf("%s: no medium present\n", __func__);
-		return -1;
-	} else {
-		ret = ftsdc010_send_request(mmc, cmd, data);
-		return ret;
-	}
-}
-
-static void ftsdc010_set_clk(struct mmc *mmc)
-{
-	struct mmc_host *host = mmc->priv;
-	unsigned char clk_div;
-	unsigned int real_rate;
-	unsigned int clock;
-
-	debug("%s: mmc_set_clock: %x\n", __func__, mmc->clock);
-	clock = readl(&host->reg->ccr);
-
-	if (mmc->clock == 0) {
-		real_rate = 0;
-		clock |= FTSDC010_CCR_CLK_DIS;
-	} else {
-		debug("%s, mmc->clock: %08x, origin clock: %08x\n",
-			 __func__, mmc->clock, clock);
-
-		for (clk_div = 0; clk_div <= 127; clk_div++) {
-			real_rate = (CONFIG_SYS_CLK_FREQ / 2) /
-					(2 * (clk_div + 1));
-
-			if (real_rate <= mmc->clock)
-				break;
-		}
-
-		debug("%s: computed real_rate: %x, clk_div: %x\n",
-			 __func__, real_rate, clk_div);
-
-		if (clk_div > 127)
-			debug("%s: no match clock rate, %x\n",
-				__func__, mmc->clock);
-
-		clock = (clock & ~FTSDC010_CCR_CLK_DIV(0x7f)) |
-				FTSDC010_CCR_CLK_DIV(clk_div);
-
-		clock &= ~FTSDC010_CCR_CLK_DIS;
-	}
-
-	debug("%s, set clock: %08x\n", __func__, clock);
-	writel(clock, &host->reg->ccr);
-}
-
-static void ftsdc010_set_ios(struct mmc *mmc)
-{
-	struct mmc_host *host = mmc->priv;
-	unsigned int power;
-	unsigned long val;
-	unsigned int bus_width;
-
-	debug("%s: bus_width: %x, clock: %d\n",
-		__func__, mmc->bus_width, mmc->clock);
-
-	/* set pcr: power on */
-	power = readl(&host->reg->pcr);
-	power |= FTSDC010_PCR_POWER_ON;
-	writel(power, &host->reg->pcr);
-
-	if (mmc->clock)
-		ftsdc010_set_clk(mmc);
-
-	/* set bwr: bus width reg */
-	bus_width = readl(&host->reg->bwr);
-	bus_width &= ~(FTSDC010_BWR_WIDE_8_BUS | FTSDC010_BWR_WIDE_4_BUS |
-			FTSDC010_BWR_SINGLE_BUS);
-
-	if (mmc->bus_width == 8)
-		bus_width |= FTSDC010_BWR_WIDE_8_BUS;
-	else if (mmc->bus_width == 4)
-		bus_width |= FTSDC010_BWR_WIDE_4_BUS;
-	else
-		bus_width |= FTSDC010_BWR_SINGLE_BUS;
-
-	writel(bus_width, &host->reg->bwr);
-
-	/* set fifo depth */
-	val = readl(&host->reg->feature);
-	host->fifo_len = FTSDC010_FEATURE_FIFO_DEPTH(val) * 4; /* 4 bytes */
-
-	/* set data timeout register */
-	val = -1;
-	writel(val, &host->reg->dtr);
-}
-
-static void ftsdc010_reset(struct mmc_host *host)
-{
-	unsigned int timeout;
-	unsigned int sta;
-
-	/* Do SDC_RST: Software reset for all register */
-	writel(FTSDC010_CMD_SDC_RST, &host->reg->cmd);
-
-	host->clock = 0;
-
-	/* this hardware has no reset finish flag to read */
-	/* wait 100ms maximum */
-	timeout = 100;
-
-	/* hw clears the bit when it's done */
-	while (readl(&host->reg->dtr) != 0) {
-		if (timeout == 0) {
-			printf("%s: reset timeout error\n", __func__);
-			return;
-		}
-		timeout--;
-		udelay(10*FTSDC010_DELAY_UNIT);
-	}
-
-	sta = readl(&host->reg->status);
-	if (sta & FTSDC010_STATUS_CARD_CHANGE)
-		writel(FTSDC010_CLR_CARD_CHANGE, &host->reg->clr);
-}
-
-static int ftsdc010_core_init(struct mmc *mmc)
-{
-	struct mmc_host *host = mmc->priv;
-	unsigned int mask;
-	unsigned int major, minor, revision;
-
-	/* get hardware version */
-	host->version = readl(&host->reg->rev);
-
-	major = FTSDC010_REV_MAJOR(host->version);
-	minor = FTSDC010_REV_MINOR(host->version);
-	revision = FTSDC010_REV_REVISION(host->version);
-
-	printf("ftsdc010 hardware ver: %d_%d_r%d\n", major, minor, revision);
-
-	/* Interrupt MASK register init - mask all */
-	writel(0x0, &host->reg->int_mask);
-
-	mask = FTSDC010_INT_MASK_CMD_SEND |
-		FTSDC010_INT_MASK_DATA_END |
-		FTSDC010_INT_MASK_CARD_CHANGE;
-#ifdef CONFIG_FTSDC010_SDIO
-	mask |= FTSDC010_INT_MASK_CP_READY |
-		FTSDC010_INT_MASK_CP_BUF_READY |
-		FTSDC010_INT_MASK_PLAIN_TEXT_READY |
-		FTSDC010_INT_MASK_SDIO_IRPT;
-#endif
-
-	writel(mask, &host->reg->int_mask);
-
-	return 0;
-}
-
-int ftsdc010_mmc_init(int dev_index)
-{
-	struct mmc *mmc;
-	struct mmc_host *host;
-
-	mmc = &ftsdc010_dev[dev_index];
-
-	sprintf(mmc->name, "FTSDC010 SD/MMC");
-	mmc->priv = &ftsdc010_host[dev_index];
-	mmc->send_cmd = ftsdc010_request;
-	mmc->set_ios = ftsdc010_set_ios;
-	mmc->init = ftsdc010_core_init;
-	mmc->getcd = NULL;
-	mmc->getwp = NULL;
-
-	mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
-
-	mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
-
-	mmc->f_min = CONFIG_SYS_CLK_FREQ / 2 / (2*128);
-	mmc->f_max = CONFIG_SYS_CLK_FREQ / 2 / 2;
-
-	ftsdc010_host[dev_index].clock = 0;
-	ftsdc010_host[dev_index].reg = ftsdc010_get_base_mmc(dev_index);
-	mmc_register(mmc);
-
-	/* reset mmc */
-	host = (struct mmc_host *)mmc->priv;
-	ftsdc010_reset(host);
-
-	return 0;
-}
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
new file mode 100644
index 00000000000..562b14aff84
--- /dev/null
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -0,0 +1,377 @@
+/*
+ * Faraday MMC/SD Host Controller
+ *
+ * (C) Copyright 2010 Faraday Technology
+ * Dante Su <dantesu@faraday-tech.com>
+ *
+ * This file is released under the terms of GPL v2 and any later version.
+ * See the file COPYING in the root directory of the source tree for details.
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <part.h>
+#include <mmc.h>
+
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <asm/byteorder.h>
+#include <faraday/ftsdc010.h>
+
+#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 4) /* 250 ms */
+#define CFG_RST_TIMEOUT CONFIG_SYS_HZ /* 1 sec reset timeout */
+
+struct ftsdc010_chip {
+	void __iomem *regs;
+	uint32_t wprot;   /* write protected (locked) */
+	uint32_t rate;    /* actual SD clock in Hz */
+	uint32_t sclk;    /* FTSDC010 source clock in Hz */
+	uint32_t fifo;    /* fifo depth in bytes */
+	uint32_t acmd;
+};
+
+static inline int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd)
+{
+	struct ftsdc010_chip *chip = mmc->priv;
+	struct ftsdc010_mmc __iomem *regs = chip->regs;
+	int ret = TIMEOUT;
+	uint32_t ts, st;
+	uint32_t cmd   = FTSDC010_CMD_IDX(mmc_cmd->cmdidx);
+	uint32_t arg   = mmc_cmd->cmdarg;
+	uint32_t flags = mmc_cmd->resp_type;
+
+	cmd |= FTSDC010_CMD_CMD_EN;
+
+	if (chip->acmd) {
+		cmd |= FTSDC010_CMD_APP_CMD;
+		chip->acmd = 0;
+	}
+
+	if (flags & MMC_RSP_PRESENT)
+		cmd |= FTSDC010_CMD_NEED_RSP;
+
+	if (flags & MMC_RSP_136)
+		cmd |= FTSDC010_CMD_LONG_RSP;
+
+	writel(FTSDC010_STATUS_RSP_MASK | FTSDC010_STATUS_CMD_SEND,
+		&regs->clr);
+	writel(arg, &regs->argu);
+	writel(cmd, &regs->cmd);
+
+	if (!(flags & (MMC_RSP_PRESENT | MMC_RSP_136))) {
+		for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
+			if (readl(&regs->status) & FTSDC010_STATUS_CMD_SEND) {
+				writel(FTSDC010_STATUS_CMD_SEND, &regs->clr);
+				ret = 0;
+				break;
+			}
+		}
+	} else {
+		st = 0;
+		for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
+			st = readl(&regs->status);
+			writel(st & FTSDC010_STATUS_RSP_MASK, &regs->clr);
+			if (st & FTSDC010_STATUS_RSP_MASK)
+				break;
+		}
+		if (st & FTSDC010_STATUS_RSP_CRC_OK) {
+			if (flags & MMC_RSP_136) {
+				mmc_cmd->response[0] = readl(&regs->rsp3);
+				mmc_cmd->response[1] = readl(&regs->rsp2);
+				mmc_cmd->response[2] = readl(&regs->rsp1);
+				mmc_cmd->response[3] = readl(&regs->rsp0);
+			} else {
+				mmc_cmd->response[0] = readl(&regs->rsp0);
+			}
+			ret = 0;
+		} else {
+			debug("ftsdc010: rsp err (cmd=%d, st=0x%x)\n",
+				mmc_cmd->cmdidx, st);
+		}
+	}
+
+	if (ret) {
+		debug("ftsdc010: cmd timeout (op code=%d)\n",
+			mmc_cmd->cmdidx);
+	} else if (mmc_cmd->cmdidx == MMC_CMD_APP_CMD) {
+		chip->acmd = 1;
+	}
+
+	return ret;
+}
+
+static void ftsdc010_clkset(struct mmc *mmc, uint32_t rate)
+{
+	struct ftsdc010_chip *chip = mmc->priv;
+	struct ftsdc010_mmc __iomem *regs = chip->regs;
+	uint32_t div;
+
+	for (div = 0; div < 0x7f; ++div) {
+		if (rate >= chip->sclk / (2 * (div + 1)))
+			break;
+	}
+	chip->rate = chip->sclk / (2 * (div + 1));
+
+	writel(FTSDC010_CCR_CLK_DIV(div), &regs->ccr);
+
+	if (IS_SD(mmc)) {
+		setbits_le32(&regs->ccr, FTSDC010_CCR_CLK_SD);
+
+		if (chip->rate > 25000000)
+			setbits_le32(&regs->ccr, FTSDC010_CCR_CLK_HISPD);
+		else
+			clrbits_le32(&regs->ccr, FTSDC010_CCR_CLK_HISPD);
+	}
+}
+
+static inline int ftsdc010_is_ro(struct mmc *mmc)
+{
+	struct ftsdc010_chip *chip = mmc->priv;
+	const uint8_t *csd = (const uint8_t *)mmc->csd;
+
+	return chip->wprot || (csd[1] & 0x30);
+}
+
+static int ftsdc010_wait(struct ftsdc010_mmc __iomem *regs, uint32_t mask)
+{
+	int ret = TIMEOUT;
+	uint32_t st, ts;
+
+	for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
+		st = readl(&regs->status);
+		if (!(st & mask))
+			continue;
+		writel(st & mask, &regs->clr);
+		ret = 0;
+		break;
+	}
+
+	if (ret)
+		debug("ftsdc010: wait st(0x%x) timeout\n", mask);
+
+	return ret;
+}
+
+/*
+ * u-boot mmc api
+ */
+
+static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd,
+	struct mmc_data *data)
+{
+	int ret = UNUSABLE_ERR;
+	uint32_t len = 0;
+	struct ftsdc010_chip *chip = mmc->priv;
+	struct ftsdc010_mmc __iomem *regs = chip->regs;
+
+	if (data && (data->flags & MMC_DATA_WRITE) && chip->wprot) {
+		printf("ftsdc010: the card is write protected!\n");
+		return ret;
+	}
+
+	if (data) {
+		uint32_t dcr;
+
+		len = data->blocksize * data->blocks;
+
+		/* 1. data disable + fifo reset */
+		writel(FTSDC010_DCR_FIFO_RST, &regs->dcr);
+
+		/* 2. clear status register */
+		writel(FTSDC010_STATUS_DATA_MASK | FTSDC010_STATUS_FIFO_URUN
+			| FTSDC010_STATUS_FIFO_ORUN, &regs->clr);
+
+		/* 3. data timeout (1 sec) */
+		writel(chip->rate, &regs->dtr);
+
+		/* 4. data length (bytes) */
+		writel(len, &regs->dlr);
+
+		/* 5. data enable */
+		dcr = (ffs(data->blocksize) - 1) | FTSDC010_DCR_DATA_EN;
+		if (data->flags & MMC_DATA_WRITE)
+			dcr |= FTSDC010_DCR_DATA_WRITE;
+		writel(dcr, &regs->dcr);
+	}
+
+	ret = ftsdc010_send_cmd(mmc, cmd);
+	if (ret) {
+		printf("ftsdc010: CMD%d failed\n", cmd->cmdidx);
+		return ret;
+	}
+
+	if (!data)
+		return ret;
+
+	if (data->flags & MMC_DATA_WRITE) {
+		const uint8_t *buf = (const uint8_t *)data->src;
+
+		while (len > 0) {
+			int wlen;
+
+			/* wait for tx ready */
+			ret = ftsdc010_wait(regs, FTSDC010_STATUS_FIFO_URUN);
+			if (ret)
+				break;
+
+			/* write bytes to ftsdc010 */
+			for (wlen = 0; wlen < len && wlen < chip->fifo; ) {
+				writel(*(uint32_t *)buf, &regs->dwr);
+				buf  += 4;
+				wlen += 4;
+			}
+
+			len -= wlen;
+		}
+
+	} else {
+		uint8_t *buf = (uint8_t *)data->dest;
+
+		while (len > 0) {
+			int rlen;
+
+			/* wait for rx ready */
+			ret = ftsdc010_wait(regs, FTSDC010_STATUS_FIFO_ORUN);
+			if (ret)
+				break;
+
+			/* fetch bytes from ftsdc010 */
+			for (rlen = 0; rlen < len && rlen < chip->fifo; ) {
+				*(uint32_t *)buf = readl(&regs->dwr);
+				buf  += 4;
+				rlen += 4;
+			}
+
+			len -= rlen;
+		}
+
+	}
+
+	if (!ret) {
+		ret = ftsdc010_wait(regs,
+			FTSDC010_STATUS_DATA_END | FTSDC010_STATUS_DATA_ERROR);
+	}
+
+	return ret;
+}
+
+static void ftsdc010_set_ios(struct mmc *mmc)
+{
+	struct ftsdc010_chip *chip = mmc->priv;
+	struct ftsdc010_mmc __iomem *regs = chip->regs;
+
+	ftsdc010_clkset(mmc, mmc->clock);
+
+	clrbits_le32(&regs->bwr, FTSDC010_BWR_MODE_MASK);
+	switch (mmc->bus_width) {
+	case 4:
+		setbits_le32(&regs->bwr, FTSDC010_BWR_MODE_4BIT);
+		break;
+	case 8:
+		setbits_le32(&regs->bwr, FTSDC010_BWR_MODE_8BIT);
+		break;
+	default:
+		setbits_le32(&regs->bwr, FTSDC010_BWR_MODE_1BIT);
+		break;
+	}
+}
+
+static int ftsdc010_init(struct mmc *mmc)
+{
+	struct ftsdc010_chip *chip = mmc->priv;
+	struct ftsdc010_mmc __iomem *regs = chip->regs;
+	uint32_t ts;
+
+	if (readl(&regs->status) & FTSDC010_STATUS_CARD_DETECT)
+		return NO_CARD_ERR;
+
+	if (readl(&regs->status) & FTSDC010_STATUS_WRITE_PROT) {
+		printf("ftsdc010: write protected\n");
+		chip->wprot = 1;
+	}
+
+	chip->fifo = (readl(&regs->feature) & 0xff) << 2;
+
+	/* 1. chip reset */
+	writel(FTSDC010_CMD_SDC_RST, &regs->cmd);
+	for (ts = get_timer(0); get_timer(ts) < CFG_RST_TIMEOUT; ) {
+		if (readl(&regs->cmd) & FTSDC010_CMD_SDC_RST)
+			continue;
+		break;
+	}
+	if (readl(&regs->cmd) & FTSDC010_CMD_SDC_RST) {
+		printf("ftsdc010: reset failed\n");
+		return UNUSABLE_ERR;
+	}
+
+	/* 2. enter low speed mode (400k card detection) */
+	ftsdc010_clkset(mmc, 400000);
+
+	/* 3. interrupt disabled */
+	writel(0, &regs->int_mask);
+
+	return 0;
+}
+
+int ftsdc010_mmc_init(int devid)
+{
+	struct mmc *mmc;
+	struct ftsdc010_chip *chip;
+	struct ftsdc010_mmc __iomem *regs;
+#ifdef CONFIG_FTSDC010_BASE_LIST
+	uint32_t base_list[] = CONFIG_FTSDC010_BASE_LIST;
+
+	if (devid < 0 || devid >= ARRAY_SIZE(base_list))
+		return -1;
+	regs = (void __iomem *)base_list[devid];
+#else
+	regs = (void __iomem *)(CONFIG_FTSDC010_BASE + (devid << 20));
+#endif
+
+	mmc = malloc(sizeof(struct mmc));
+	if (!mmc)
+		return -ENOMEM;
+	memset(mmc, 0, sizeof(struct mmc));
+
+	chip = malloc(sizeof(struct ftsdc010_chip));
+	if (!chip) {
+		free(mmc);
+		return -ENOMEM;
+	}
+	memset(chip, 0, sizeof(struct ftsdc010_chip));
+
+	chip->regs = regs;
+	mmc->priv  = chip;
+
+	sprintf(mmc->name, "ftsdc010");
+	mmc->send_cmd  = ftsdc010_request;
+	mmc->set_ios   = ftsdc010_set_ios;
+	mmc->init      = ftsdc010_init;
+
+	mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz;
+	switch (readl(&regs->bwr) & FTSDC010_BWR_CAPS_MASK) {
+	case FTSDC010_BWR_CAPS_4BIT:
+		mmc->host_caps |= MMC_MODE_4BIT;
+		break;
+	case FTSDC010_BWR_CAPS_8BIT:
+		mmc->host_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
+		break;
+	default:
+		break;
+	}
+
+#ifdef CONFIG_SYS_CLK_FREQ
+	chip->sclk = CONFIG_SYS_CLK_FREQ;
+#else
+	chip->sclk = clk_get_rate("SDC");
+#endif
+
+	mmc->voltages  = MMC_VDD_32_33 | MMC_VDD_33_34;
+	mmc->f_max     = chip->sclk / 2;
+	mmc->f_min     = chip->sclk / 0x100;
+	mmc->block_dev.part_type = PART_TYPE_DOS;
+
+	mmc_register(mmc);
+
+	return 0;
+}
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 2590f1bcce5..0a2f5358e2f 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -524,48 +524,70 @@ static int sd_send_op_cond(struct mmc *mmc)
 	return 0;
 }
 
-static int mmc_send_op_cond(struct mmc *mmc)
+/* We pass in the cmd since otherwise the init seems to fail */
+static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
+		int use_arg)
 {
-	int timeout = 10000;
-	struct mmc_cmd cmd;
 	int err;
 
+	cmd->cmdidx = MMC_CMD_SEND_OP_COND;
+	cmd->resp_type = MMC_RSP_R3;
+	cmd->cmdarg = 0;
+	if (use_arg && !mmc_host_is_spi(mmc)) {
+		cmd->cmdarg =
+			(mmc->voltages &
+			(mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
+			(mmc->op_cond_response & OCR_ACCESS_MODE);
+
+		if (mmc->host_caps & MMC_MODE_HC)
+			cmd->cmdarg |= OCR_HCS;
+	}
+	err = mmc_send_cmd(mmc, cmd, NULL);
+	if (err)
+		return err;
+	mmc->op_cond_response = cmd->response[0];
+	return 0;
+}
+
+int mmc_send_op_cond(struct mmc *mmc)
+{
+	struct mmc_cmd cmd;
+	int err, i;
+
 	/* Some cards seem to need this */
 	mmc_go_idle(mmc);
 
  	/* Asking to the card its capabilities */
- 	cmd.cmdidx = MMC_CMD_SEND_OP_COND;
- 	cmd.resp_type = MMC_RSP_R3;
- 	cmd.cmdarg = 0;
-
- 	err = mmc_send_cmd(mmc, &cmd, NULL);
+	mmc->op_cond_pending = 1;
+	for (i = 0; i < 2; i++) {
+		err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
+		if (err)
+			return err;
 
- 	if (err)
- 		return err;
+		/* exit if not busy (flag seems to be inverted) */
+		if (mmc->op_cond_response & OCR_BUSY)
+			return 0;
+	}
+	return IN_PROGRESS;
+}
 
- 	udelay(1000);
+int mmc_complete_op_cond(struct mmc *mmc)
+{
+	struct mmc_cmd cmd;
+	int timeout = 1000;
+	uint start;
+	int err;
 
+	mmc->op_cond_pending = 0;
+	start = get_timer(0);
 	do {
-		cmd.cmdidx = MMC_CMD_SEND_OP_COND;
-		cmd.resp_type = MMC_RSP_R3;
-		cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 :
-				(mmc->voltages &
-				(cmd.response[0] & OCR_VOLTAGE_MASK)) |
-				(cmd.response[0] & OCR_ACCESS_MODE));
-
-		if (mmc->host_caps & MMC_MODE_HC)
-			cmd.cmdarg |= OCR_HCS;
-
-		err = mmc_send_cmd(mmc, &cmd, NULL);
-
+		err = mmc_send_op_cond_iter(mmc, &cmd, 1);
 		if (err)
 			return err;
-
-		udelay(1000);
-	} while (!(cmd.response[0] & OCR_BUSY) && timeout--);
-
-	if (timeout <= 0)
-		return UNUSABLE_ERR;
+		if (get_timer(start) > timeout)
+			return UNUSABLE_ERR;
+		udelay(100);
+	} while (!(mmc->op_cond_response & OCR_BUSY));
 
 	if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 		cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
@@ -1274,7 +1296,7 @@ block_dev_desc_t *mmc_get_dev(int dev)
 }
 #endif
 
-int mmc_init(struct mmc *mmc)
+int mmc_start_init(struct mmc *mmc)
 {
 	int err;
 
@@ -1314,17 +1336,48 @@ int mmc_init(struct mmc *mmc)
 	if (err == TIMEOUT) {
 		err = mmc_send_op_cond(mmc);
 
-		if (err) {
+		if (err && err != IN_PROGRESS) {
 			printf("Card did not respond to voltage select!\n");
 			return UNUSABLE_ERR;
 		}
 	}
 
-	err = mmc_startup(mmc);
+	if (err == IN_PROGRESS)
+		mmc->init_in_progress = 1;
+
+	return err;
+}
+
+static int mmc_complete_init(struct mmc *mmc)
+{
+	int err = 0;
+
+	if (mmc->op_cond_pending)
+		err = mmc_complete_op_cond(mmc);
+
+	if (!err)
+		err = mmc_startup(mmc);
 	if (err)
 		mmc->has_init = 0;
 	else
 		mmc->has_init = 1;
+	mmc->init_in_progress = 0;
+	return err;
+}
+
+int mmc_init(struct mmc *mmc)
+{
+	int err = IN_PROGRESS;
+	unsigned start = get_timer(0);
+
+	if (mmc->has_init)
+		return 0;
+	if (!mmc->init_in_progress)
+		err = mmc_start_init(mmc);
+
+	if (!err || err == IN_PROGRESS)
+		err = mmc_complete_init(mmc);
+	debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
 	return err;
 }
 
@@ -1362,6 +1415,25 @@ int get_mmc_num(void)
 	return cur_dev_num;
 }
 
+void mmc_set_preinit(struct mmc *mmc, int preinit)
+{
+	mmc->preinit = preinit;
+}
+
+static void do_preinit(void)
+{
+	struct mmc *m;
+	struct list_head *entry;
+
+	list_for_each(entry, &mmc_devices) {
+		m = list_entry(entry, struct mmc, link);
+
+		if (m->preinit)
+			mmc_start_init(m);
+	}
+}
+
+
 int mmc_initialize(bd_t *bis)
 {
 	INIT_LIST_HEAD (&mmc_devices);
@@ -1372,5 +1444,6 @@ int mmc_initialize(bd_t *bis)
 
 	print_mmc_devices(',');
 
+	do_preinit();
 	return 0;
 }
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
index 2fe34b6993b..63e1f9062b8 100644
--- a/drivers/mmc/mv_sdhci.c
+++ b/drivers/mmc/mv_sdhci.c
@@ -51,6 +51,5 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
 		host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
 	else
 		host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
-	add_sdhci(host, max_clk, min_clk);
-	return 0;
+	return add_sdhci(host, max_clk, min_clk);
 }
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index dc49d37f5ca..e50ff925a56 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -94,6 +94,5 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
 
 	host->host_caps = MMC_MODE_HC;
 
-	add_sdhci(host, 52000000, 400000);
-	return 0;
+	return add_sdhci(host, 52000000, 400000);
 }
diff --git a/drivers/mmc/spear_sdhci.c b/drivers/mmc/spear_sdhci.c
new file mode 100644
index 00000000000..23f1f4b7016
--- /dev/null
+++ b/drivers/mmc/spear_sdhci.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2012
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <sdhci.h>
+
+int spear_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
+{
+	struct sdhci_host *host = NULL;
+	host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+	if (!host) {
+		printf("sdhci host malloc fail!\n");
+		return 1;
+	}
+
+	host->name = "sdhci";
+	host->ioaddr = (void *)regbase;
+	host->quirks = quirks;
+
+	if (quirks & SDHCI_QUIRK_REG32_RW)
+		host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
+	else
+		host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
+
+	add_sdhci(host, max_clk, min_clk);
+	return 0;
+}
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 22d84407dd4..25f875202c3 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -38,6 +38,7 @@
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/byteorder.h>
+#include <asm/unaligned.h>
 #include <environment.h>
 #include <mtd/cfi_flash.h>
 #include <watchdog.h>
@@ -183,16 +184,16 @@ u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
 flash_info_t *flash_get_info(ulong base)
 {
 	int i;
-	flash_info_t *info = NULL;
+	flash_info_t *info;
 
 	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
-		info = & flash_info[i];
+		info = &flash_info[i];
 		if (info->size && info->start[0] <= base &&
 		    base <= info->start[0] + info->size - 1)
-			break;
+			return info;
 	}
 
-	return info;
+	return NULL;
 }
 #endif
 
@@ -1640,9 +1641,10 @@ static void cfi_reverse_geometry(struct cfi_qry *qry)
 	u32 tmp;
 
 	for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
-		tmp = qry->erase_region_info[i];
-		qry->erase_region_info[i] = qry->erase_region_info[j];
-		qry->erase_region_info[j] = tmp;
+		tmp = get_unaligned(&(qry->erase_region_info[i]));
+		put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
+			      &(qry->erase_region_info[i]));
+		put_unaligned(tmp, &(qry->erase_region_info[j]));
 	}
 }
 
@@ -2073,8 +2075,8 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 	info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
 
 	if (flash_detect_cfi (info, &qry)) {
-		info->vendor = le16_to_cpu(qry.p_id);
-		info->ext_addr = le16_to_cpu(qry.p_adr);
+		info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
+		info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
 		num_erase_regions = qry.num_erase_regions;
 
 		if (info->ext_addr) {
@@ -2163,7 +2165,8 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 				break;
 			}
 
-			tmp = le32_to_cpu(qry.erase_region_info[i]);
+			tmp = le32_to_cpu(get_unaligned(
+						&(qry.erase_region_info[i])));
 			debug("erase region %u: 0x%08lx\n", i, tmp);
 
 			erase_region_count = (tmp & 0xffff) + 1;
diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c
index bc558c4c96b..dad30b54c54 100644
--- a/drivers/mtd/spi/spansion.c
+++ b/drivers/mtd/spi/spansion.c
@@ -94,7 +94,7 @@ static const struct spansion_spi_flash_params spansion_spi_flash_table[] = {
 		.idcode2 = 0x4d01,
 		.pages_per_sector = 256,
 		.nr_sectors = 256,
-		.name = "S25FL129P_64K",
+		.name = "S25FL129P_64K/S25FL128S",
 	},
 	{
 		.idcode1 = 0x0219,
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index c63398ebf8d..0ffd59d4978 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -122,8 +122,6 @@ static int bfin_EMAC_send(struct eth_device *dev, void *packet, int length)
 {
 	int i;
 	int result = 0;
-	unsigned int *buf;
-	buf = (unsigned int *)packet;
 
 	if (length <= 0) {
 		printf("Ethernet: bad packet size: %d\n", length);
diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index f191c79a25c..9aaa8285357 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -46,6 +46,7 @@ COBJS-$(CONFIG_PPC_P4080) += p4080.o
 COBJS-$(CONFIG_PPC_P5020) += p5020.o
 COBJS-$(CONFIG_PPC_P5040) += p5040.o
 COBJS-$(CONFIG_PPC_T4240) += t4240.o
+COBJS-$(CONFIG_PPC_T4160) += t4240.o
 COBJS-$(CONFIG_PPC_B4420) += b4860.o
 COBJS-$(CONFIG_PPC_B4860) += b4860.o
 endif
diff --git a/drivers/net/fm/b4860.c b/drivers/net/fm/b4860.c
index 8cde7afc1df..3b5defefa62 100644
--- a/drivers/net/fm/b4860.c
+++ b/drivers/net/fm/b4860.c
@@ -55,8 +55,10 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 	if (is_device_disabled(port))
 		return PHY_INTERFACE_MODE_NONE;
 
-	if ((port == FM1_10GEC1 || port == FM1_10GEC2)
-			&& (is_serdes_configured(XAUI_FM1)))
+	/*B4860 has two 10Gig Mac*/
+	if ((port == FM1_10GEC1 || port == FM1_10GEC2)	&&
+	    ((is_serdes_configured(XAUI_FM1_MAC9))	||
+	    (is_serdes_configured(XAUI_FM1_MAC10))))
 		return PHY_INTERFACE_MODE_XGMII;
 
 	/* Fix me need to handle RGMII here first */
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 54b142f47d3..9b139eeb051 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -568,6 +568,8 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg)
 	num = fm_eth->num;
 
 #ifdef CONFIG_SYS_FMAN_V3
+	if (fm_eth->type == FM_ETH_10G_E)
+		num += 8;
 	base = &reg->memac[num].fm_memac;
 	phyregs = &reg->memac[num].fm_memac_mdio;
 #else
diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h
index 228df330f18..ba581e9ef61 100644
--- a/drivers/net/fm/fm.h
+++ b/drivers/net/fm/fm.h
@@ -152,4 +152,6 @@ struct fm_eth {
 #define MAX_RXBUF_LOG2		11
 #define MAX_RXBUF_LEN		(1 << MAX_RXBUF_LOG2)
 
+#define PORT_IS_ENABLED(port)	fm_info[fm_port_to_index(port)].enabled
+
 #endif /* __FM_H__ */
diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
index ae389b88422..5908c32546e 100644
--- a/drivers/net/fm/init.c
+++ b/drivers/net/fm/init.c
@@ -74,9 +74,15 @@ struct fm_eth_info fm_info[] = {
 #if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
 	FM_TGEC_INFO_INITIALIZER(1, 1),
 #endif
+#if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
+	FM_TGEC_INFO_INITIALIZER(1, 2),
+#endif
 #if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
 	FM_TGEC_INFO_INITIALIZER(2, 1),
 #endif
+#if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
+	FM_TGEC_INFO_INITIALIZER(2, 2),
+#endif
 };
 
 int fm_standard_init(bd_t *bis)
@@ -232,6 +238,26 @@ static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
 		return ;
 	}
 
+#ifdef CONFIG_SYS_FMAN_V3
+	/*
+	 * Physically FM1_DTSEC9 and FM1_10GEC1 use the same dual-role MAC, when
+	 * FM1_10GEC1 is enabled and  FM1_DTSEC9 is disabled, ensure that the
+	 * dual-role MAC is not disabled, ditto for other dual-role MACs.
+	 */
+	if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1)))	||
+	    ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2)))	||
+	    ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9)))	||
+	    ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10)))
+#if (CONFIG_SYS_NUM_FMAN == 2)
+										||
+	    ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1)))	||
+	    ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2)))	||
+	    ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9)))	||
+	    ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10)))
+#endif
+	)
+		return;
+#endif
 	/* board code might have caused offset to change */
 	off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
 
@@ -249,10 +275,15 @@ void fdt_fixup_fman_ethernet(void *blob)
 {
 	int i;
 
+#ifdef CONFIG_SYS_FMAN_V3
+	for (i = 0; i < ARRAY_SIZE(fm_info); i++)
+		ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac");
+#else
 	for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
 		if (fm_info[i].type == FM_ETH_1G_E)
 			ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac");
 		else
 			ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac");
 	}
+#endif
 }
diff --git a/drivers/net/fm/t4240.c b/drivers/net/fm/t4240.c
index 48c530c9158..275395f18ca 100644
--- a/drivers/net/fm/t4240.c
+++ b/drivers/net/fm/t4240.c
@@ -70,12 +70,18 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 	if (is_device_disabled(port))
 		return PHY_INTERFACE_MODE_NONE;
 
-	if ((port == FM1_10GEC1 || port == FM1_10GEC2)
-			&& (is_serdes_configured(XAUI_FM1)))
+	if ((port == FM1_10GEC1 || port == FM1_10GEC2) &&
+	    ((is_serdes_configured(XAUI_FM1_MAC9))	||
+	     (is_serdes_configured(XAUI_FM1_MAC10))	||
+	     (is_serdes_configured(XFI_FM1_MAC9))	||
+	     (is_serdes_configured(XFI_FM1_MAC10))))
 		return PHY_INTERFACE_MODE_XGMII;
 
-	if ((port == FM2_10GEC1 || port == FM2_10GEC2)
-			&& (is_serdes_configured(XAUI_FM2)))
+	if ((port == FM2_10GEC1 || port == FM2_10GEC2) &&
+	    ((is_serdes_configured(XAUI_FM2_MAC9))	||
+	     (is_serdes_configured(XAUI_FM2_MAC10))	||
+	     (is_serdes_configured(XFI_FM2_MAC9))	||
+	     (is_serdes_configured(XFI_FM2_MAC10))))
 		return PHY_INTERFACE_MODE_XGMII;
 
 #define FSL_CORENET_RCWSR13_EC1			0x60000000 /* bits 417..418 */
diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c
index 78447b711f5..84ce7362f06 100644
--- a/drivers/net/phy/teranetics.c
+++ b/drivers/net/phy/teranetics.c
@@ -34,9 +34,21 @@ int tn2020_config(struct phy_device *phydev)
 		unsigned short restart_an = (MDIO_AN_CTRL1_RESTART |
 						MDIO_AN_CTRL1_ENABLE |
 						MDIO_AN_CTRL1_XNP);
+		u8 phy_hwversion;
 
-		phy_write(phydev, 30, 93, 2);
-		phy_write(phydev, MDIO_MMD_AN, MDIO_CTRL1, restart_an);
+		/*
+		 * bit 15:12 of register 30.32 indicates PHY hardware
+		 * version. It can be used to distinguish TN80xx from
+		 * TN2020. TN2020 needs write 0x2 to 30.93, but TN80xx
+		 * needs 0x1.
+		 */
+		phy_hwversion = (phy_read(phydev, 30, 32) >> 12) & 0xf;
+		if (phy_hwversion <= 3) {
+			phy_write(phydev, 30, 93, 2);
+			phy_write(phydev, MDIO_MMD_AN, MDIO_CTRL1, restart_an);
+		} else {
+			phy_write(phydev, 30, 93, 1);
+		}
 	}
 
 	return 0;
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index 6c5cb99774d..c283d823b2c 100644
--- a/drivers/net/phy/vitesse.c
+++ b/drivers/net/phy/vitesse.c
@@ -48,6 +48,19 @@
 #define MIIM_VSC8601_SKEW_CTRL		0x1c
 
 #define PHY_EXT_PAGE_ACCESS    0x1f
+#define PHY_EXT_PAGE_ACCESS_GENERAL	0x10
+#define PHY_EXT_PAGE_ACCESS_EXTENDED3	0x3
+
+/* Vitesse VSC8574 control register */
+#define MIIM_VSC8574_MAC_SERDES_CON	0x10
+#define MIIM_VSC8574_MAC_SERDES_ANEG	0x80
+#define MIIM_VSC8574_GENERAL18		0x12
+#define MIIM_VSC8574_GENERAL19		0x13
+
+/* Vitesse VSC8574 gerenal purpose register 18 */
+#define MIIM_VSC8574_18G_SGMII		0x80f0
+#define MIIM_VSC8574_18G_QSGMII		0x80e0
+#define MIIM_VSC8574_18G_CMDSTAT	0x8000
 
 /* CIS8201 */
 static int vitesse_config(struct phy_device *phydev)
@@ -145,6 +158,49 @@ static int vsc8601_config(struct phy_device *phydev)
 	return 0;
 }
 
+static int vsc8574_config(struct phy_device *phydev)
+{
+	u32 val;
+	/* configure regiser 19G for MAC */
+	phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
+		  PHY_EXT_PAGE_ACCESS_GENERAL);
+
+	val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19);
+	if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) {
+		/* set bit 15:14 to '01' for QSGMII mode */
+		val = (val & 0x3fff) | (1 << 14);
+		phy_write(phydev, MDIO_DEVAD_NONE,
+			  MIIM_VSC8574_GENERAL19, val);
+		/* Enable 4 ports MAC QSGMII */
+		phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18,
+			  MIIM_VSC8574_18G_QSGMII);
+	} else {
+		/* set bit 15:14 to '00' for SGMII mode */
+		val = val & 0x3fff;
+		phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19, val);
+		/* Enable 4 ports MAC SGMII */
+		phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18,
+			  MIIM_VSC8574_18G_SGMII);
+	}
+	val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18);
+	/* When bit 15 is cleared the command has completed */
+	while (val & MIIM_VSC8574_18G_CMDSTAT)
+		val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18);
+
+	/* Enable Serdes Auto-negotiation */
+	phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
+		  PHY_EXT_PAGE_ACCESS_EXTENDED3);
+	val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_MAC_SERDES_CON);
+	val = val | MIIM_VSC8574_MAC_SERDES_ANEG;
+	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_MAC_SERDES_CON, val);
+
+	phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0);
+
+	genphy_config_aneg(phydev);
+
+	return 0;
+}
+
 static struct phy_driver VSC8211_driver = {
 	.name	= "Vitesse VSC8211",
 	.uid	= 0xfc4b0,
@@ -185,6 +241,16 @@ static struct phy_driver VSC8234_driver = {
 	.shutdown = &genphy_shutdown,
 };
 
+static struct phy_driver VSC8574_driver = {
+	.name = "Vitesse VSC8574",
+	.uid = 0x704a0,
+	.mask = 0xffff0,
+	.features = PHY_GBIT_FEATURES,
+	.config = &vsc8574_config,
+	.startup = &vitesse_startup,
+	.shutdown = &genphy_shutdown,
+};
+
 static struct phy_driver VSC8601_driver = {
 	.name = "Vitesse VSC8601",
 	.uid = 0x70420,
@@ -244,6 +310,7 @@ int phy_vitesse_init(void)
 	phy_register(&VSC8244_driver);
 	phy_register(&VSC8211_driver);
 	phy_register(&VSC8221_driver);
+	phy_register(&VSC8574_driver);
 	phy_register(&VSC8662_driver);
 	phy_register(&cis8201_driver);
 	phy_register(&cis8204_driver);
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index a290073bb8b..f63a0695e37 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -484,7 +484,7 @@ static void smc911x_reset(struct eth_device *dev)
 		while (timeout-- &&
 			!(smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY))
 			udelay(10);
-		if (!timeout) {
+		if (timeout < 0) {
 			printf(DRIVERNAME
 				": timeout waiting for PM restore\n");
 			return;
@@ -500,7 +500,7 @@ static void smc911x_reset(struct eth_device *dev)
 	while (timeout-- && smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY)
 		udelay(10);
 
-	if (!timeout) {
+	if (timeout < 0) {
 		printf(DRIVERNAME ": reset timeout\n");
 		return;
 	}
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index fbc4e97e983..442b7ea0df4 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -52,6 +52,7 @@ COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
 COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
 COBJS-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o
+COBJS-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
 
 ifndef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 9f046435518..daa80038a71 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -143,7 +143,6 @@ serial_initfunc(au1x00_serial_initialize);
 serial_initfunc(asc_serial_initialize);
 serial_initfunc(jz_serial_initialize);
 serial_initfunc(mpc5xx_serial_initialize);
-serial_initfunc(mpc8220_serial_initialize);
 serial_initfunc(mpc8260_scc_serial_initialize);
 serial_initfunc(mpc8260_smc_serial_initialize);
 serial_initfunc(mpc85xx_serial_initialize);
@@ -236,7 +235,6 @@ void serial_initialize(void)
 	asc_serial_initialize();
 	jz_serial_initialize();
 	mpc5xx_serial_initialize();
-	mpc8220_serial_initialize();
 	mpc8260_scc_serial_initialize();
 	mpc8260_smc_serial_initialize();
 	mpc85xx_serial_initialize();
diff --git a/arch/blackfin/cpu/serial.c b/drivers/serial/serial_bfin.c
index 9847e9f2c5c..0443b8427a9 100644
--- a/arch/blackfin/cpu/serial.c
+++ b/drivers/serial/serial_bfin.c
@@ -43,13 +43,12 @@
 #include <serial.h>
 #include <linux/compiler.h>
 #include <asm/blackfin.h>
+#include <asm/serial.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_UART_CONSOLE
 
-#include "serial.h"
-
 #ifdef CONFIG_DEBUG_SERIAL
 static uart_lsr_t cached_lsr[256];
 static uart_lsr_t cached_rbr[256];
@@ -195,7 +194,18 @@ static void uart_loop(uint32_t uart_base, int state)
 
 #endif
 
-#ifdef CONFIG_SYS_BFIN_UART
+static inline void __serial_set_baud(uint32_t uart_base, uint32_t baud)
+{
+#ifdef CONFIG_DEBUG_EARLY_SERIAL
+	serial_early_set_baud(uart_base, baud);
+#else
+	uint16_t divisor = (get_uart_clk() + (baud * 8)) / (baud * 16)
+			- ANOMALY_05000230;
+
+	/* Program the divisor to get the baud rate we want */
+	serial_set_divisor(uart_base, divisor);
+#endif
+}
 
 static void uart_puts(uint32_t uart_base, const char *s)
 {
@@ -209,7 +219,7 @@ static int uart##n##_init(void) \
 	const unsigned short pins[] = { _P_UART(n, RX), _P_UART(n, TX), 0, }; \
 	peripheral_request_list(pins, "bfin-uart"); \
 	uart_init(MMR_UART(n)); \
-	serial_early_set_baud(MMR_UART(n), gd->baudrate); \
+	__serial_set_baud(MMR_UART(n), gd->baudrate); \
 	uart_lsr_clear(MMR_UART(n)); \
 	return 0; \
 } \
@@ -221,7 +231,7 @@ static int uart##n##_uninit(void) \
 \
 static void uart##n##_setbrg(void) \
 { \
-	serial_early_set_baud(MMR_UART(n), gd->baudrate); \
+	__serial_set_baud(MMR_UART(n), gd->baudrate); \
 } \
 \
 static int uart##n##_getc(void) \
@@ -305,65 +315,97 @@ void bfin_serial_initialize(void)
 #endif
 }
 
-#else
+#ifdef CONFIG_DEBUG_EARLY_SERIAL
+inline void uart_early_putc(uint32_t uart_base, const char c)
+{
+	/* send a \r for compatibility */
+	if (c == '\n')
+		uart_early_putc(uart_base, '\r');
 
-/* Symbol for our assembly to call. */
-void serial_set_baud(uint32_t baud)
+	/* wait for the hardware fifo to clear up */
+	while (!(_lsr_read(pUART) & THRE))
+		continue;
+
+	/* queue the character for transmission */
+	bfin_write(&pUART->thr, c);
+	SSYNC();
+}
+
+void uart_early_puts(const char *s)
 {
-	serial_early_set_baud(UART_BASE, baud);
+	while (*s)
+		uart_early_putc(UART_BASE, *s++);
 }
 
-/* Symbol for common u-boot code to call.
- * Setup the baudrate (brg: baudrate generator).
- */
-void serial_setbrg(void)
+/* Symbol for our assembly to call. */
+void _serial_early_set_baud(uint32_t baud)
 {
-	serial_set_baud(gd->baudrate);
+	serial_early_set_baud(UART_BASE, baud);
 }
 
 /* Symbol for our assembly to call. */
-void serial_initialize(void)
+void _serial_early_init(void)
 {
 	serial_early_init(UART_BASE);
 }
+#endif
 
-/* Symbol for common u-boot code to call. */
-int serial_init(void)
+#elif defined(CONFIG_UART_MEM)
+
+char serial_logbuf[CONFIG_UART_MEM];
+char *serial_logbuf_head = serial_logbuf;
+
+int serial_mem_init(void)
 {
-	serial_initialize();
-	serial_setbrg();
-	uart_lsr_clear(UART_BASE);
+	serial_logbuf_head = serial_logbuf;
 	return 0;
 }
 
-int serial_tstc(void)
+void serial_mem_setbrg(void)
 {
-	return uart_tstc(UART_BASE);
 }
 
-int serial_getc(void)
+int serial_mem_tstc(void)
 {
-	return uart_getc(UART_BASE);
+	return 0;
 }
 
-void serial_putc(const char c)
+int serial_mem_getc(void)
 {
-	uart_putc(UART_BASE, c);
+	return 0;
 }
 
-void serial_puts(const char *s)
+void serial_mem_putc(const char c)
+{
+	*serial_logbuf_head = c;
+	if (++serial_logbuf_head == serial_logbuf + CONFIG_UART_MEM)
+		serial_logbuf_head = serial_logbuf;
+}
+
+void serial_mem_puts(const char *s)
 {
 	while (*s)
 		serial_putc(*s++);
 }
 
-LOOP(
-void serial_loop(int state)
+struct serial_device bfin_serial_mem_device = {
+	.name   = "bfin_uart_mem",
+	.start  = serial_mem_init,
+	.setbrg = serial_mem_setbrg,
+	.getc   = serial_mem_getc,
+	.tstc   = serial_mem_tstc,
+	.putc   = serial_mem_putc,
+	.puts   = serial_mem_puts,
+};
+
+
+__weak struct serial_device *default_serial_console(void)
 {
-	uart_loop(UART_BASE, state);
+	return &bfin_serial_mem_device;
 }
-)
 
-#endif
-
-#endif
+void bfin_serial_initialize(void)
+{
+	serial_register(&bfin_serial_mem_device);
+}
+#endif /* CONFIG_UART_MEM */
diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c
index ab2e8b998bb..a9a4d92c3e7 100644
--- a/drivers/spi/bfin_spi.c
+++ b/drivers/spi/bfin_spi.c
@@ -13,7 +13,6 @@
 #include <spi.h>
 
 #include <asm/blackfin.h>
-#include <asm/dma.h>
 #include <asm/gpio.h>
 #include <asm/portmux.h>
 #include <asm/mach-common/bits/spi.h>
@@ -242,109 +241,15 @@ void spi_release_bus(struct spi_slave *slave)
 	SSYNC();
 }
 
-#ifdef __ADSPBF54x__
-# define SPI_DMA_BASE DMA4_NEXT_DESC_PTR
-#elif defined(__ADSPBF533__) || defined(__ADSPBF532__) || defined(__ADSPBF531__) || \
-      defined(__ADSPBF538__) || defined(__ADSPBF539__)
-# define SPI_DMA_BASE DMA5_NEXT_DESC_PTR
-#elif defined(__ADSPBF561__)
-# define SPI_DMA_BASE DMA2_4_NEXT_DESC_PTR
-#elif defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__) || \
-      defined(__ADSPBF52x__) || defined(__ADSPBF51x__)
-# define SPI_DMA_BASE DMA7_NEXT_DESC_PTR
-# elif defined(__ADSPBF50x__)
-# define SPI_DMA_BASE DMA6_NEXT_DESC_PTR
-#else
-# error "Please provide SPI DMA channel defines"
-#endif
-static volatile struct dma_register *dma = (void *)SPI_DMA_BASE;
-
 #ifndef CONFIG_BFIN_SPI_IDLE_VAL
 # define CONFIG_BFIN_SPI_IDLE_VAL 0xff
 #endif
 
-#ifdef CONFIG_BFIN_SPI_NO_DMA
-# define SPI_DMA 0
-#else
-# define SPI_DMA 1
-#endif
-
-static int spi_dma_xfer(struct bfin_spi_slave *bss, const u8 *tx, u8 *rx,
-			uint bytes)
-{
-	int ret = -1;
-	u16 ndsize, spi_config, dma_config;
-	struct dmasg dmasg[2];
-	const u8 *buf;
-
-	if (tx) {
-		debug("%s: doing half duplex TX\n", __func__);
-		buf = tx;
-		spi_config = TDBR_DMA;
-		dma_config = 0;
-	} else {
-		debug("%s: doing half duplex RX\n", __func__);
-		buf = rx;
-		spi_config = RDBR_DMA;
-		dma_config = WNR;
-	}
-
-	dmasg[0].start_addr = (unsigned long)buf;
-	dmasg[0].x_modify = 1;
-	dma_config |= WDSIZE_8 | DMAEN;
-	if (bytes <= 65536) {
-		blackfin_dcache_flush_invalidate_range(buf, buf + bytes);
-		ndsize = NDSIZE_5;
-		dmasg[0].cfg = NDSIZE_0 | dma_config | FLOW_STOP | DI_EN;
-		dmasg[0].x_count = bytes;
-	} else {
-		blackfin_dcache_flush_invalidate_range(buf, buf + 65536 - 1);
-		ndsize = NDSIZE_7;
-		dmasg[0].cfg = NDSIZE_5 | dma_config | FLOW_ARRAY | DMA2D;
-		dmasg[0].x_count = 0;	/* 2^16 */
-		dmasg[0].y_count = bytes >> 16;	/* count / 2^16 */
-		dmasg[0].y_modify = 1;
-		dmasg[1].start_addr = (unsigned long)(buf + (bytes & ~0xFFFF));
-		dmasg[1].cfg = NDSIZE_0 | dma_config | FLOW_STOP | DI_EN;
-		dmasg[1].x_count = bytes & 0xFFFF; /* count % 2^16 */
-		dmasg[1].x_modify = 1;
-	}
-
-	dma->cfg = 0;
-	dma->irq_status = DMA_DONE | DMA_ERR;
-	dma->curr_desc_ptr = dmasg;
-	write_SPI_CTL(bss, (bss->ctl & ~TDBR_CORE));
-	write_SPI_STAT(bss, -1);
-	SSYNC();
-
-	write_SPI_TDBR(bss, CONFIG_BFIN_SPI_IDLE_VAL);
-	dma->cfg = ndsize | FLOW_ARRAY | DMAEN;
-	write_SPI_CTL(bss, (bss->ctl & ~TDBR_CORE) | spi_config);
-	SSYNC();
-
-	/*
-	 * We already invalidated the first 64k,
-	 * now while we just wait invalidate the remaining part.
-	 * Its not likely that the DMA is going to overtake
-	 */
-	if (bytes > 65536)
-		blackfin_dcache_flush_invalidate_range(buf + 65536, buf + bytes);
-
-	while (!(dma->irq_status & DMA_DONE))
-		if (ctrlc())
-			goto done;
-
-	dma->cfg = 0;
-
-	ret = 0;
- done:
-	write_SPI_CTL(bss, bss->ctl);
-	return ret;
-}
-
 static int spi_pio_xfer(struct bfin_spi_slave *bss, const u8 *tx, u8 *rx,
 			uint bytes)
 {
+	/* discard invalid data and clear RXS */
+	read_SPI_RDBR(bss);
 	/* todo: take advantage of hardware fifos  */
 	while (bytes--) {
 		u8 value = (tx ? *tx++ : CONFIG_BFIN_SPI_IDLE_VAL);
@@ -393,11 +298,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 	if (flags & SPI_XFER_BEGIN)
 		spi_cs_activate(slave);
 
-	/* TX DMA doesn't work quite right */
-	if (SPI_DMA && bytes > 6 && (!tx /*|| !rx*/))
-		ret = spi_dma_xfer(bss, tx, rx, bytes);
-	else
-		ret = spi_pio_xfer(bss, tx, rx, bytes);
+	ret = spi_pio_xfer(bss, tx, rx, bytes);
 
  done:
 	if (flags & SPI_XFER_END)
diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c
index fd8f8a76067..685702e8e2b 100644
--- a/drivers/usb/eth/smsc95xx.c
+++ b/drivers/usb/eth/smsc95xx.c
@@ -798,6 +798,7 @@ struct smsc95xx_dongle {
 static const struct smsc95xx_dongle smsc95xx_dongles[] = {
 	{ 0x0424, 0xec00 },	/* LAN9512/LAN9514 Ethernet */
 	{ 0x0424, 0x9500 },	/* LAN9500 Ethernet */
+	{ 0x0424, 0x9730 },	/* LAN9730 Ethernet (HSIC) */
 	{ 0x0000, 0x0000 }	/* END - Do not remove */
 };
 
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index c8168782069..e0f3e4b6c78 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -122,6 +122,31 @@ static struct descriptor {
 #define ehci_is_TDI()	(0)
 #endif
 
+int __ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg)
+{
+	return PORTSC_PSPD(reg);
+}
+
+int ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg)
+	__attribute__((weak, alias("__ehci_get_port_speed")));
+
+void __ehci_set_usbmode(int index)
+{
+	uint32_t tmp;
+	uint32_t *reg_ptr;
+
+	reg_ptr = (uint32_t *)((u8 *)&ehcic[index].hcor->or_usbcmd + USBMODE);
+	tmp = ehci_readl(reg_ptr);
+	tmp |= USBMODE_CM_HC;
+#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
+	tmp |= USBMODE_BE;
+#endif
+	ehci_writel(reg_ptr, tmp);
+}
+
+void ehci_set_usbmode(int index)
+	__attribute__((weak, alias("__ehci_set_usbmode")));
+
 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
 {
 	mdelay(50);
@@ -149,8 +174,6 @@ static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 static int ehci_reset(int index)
 {
 	uint32_t cmd;
-	uint32_t tmp;
-	uint32_t *reg_ptr;
 	int ret = 0;
 
 	cmd = ehci_readl(&ehcic[index].hcor->or_usbcmd);
@@ -163,15 +186,8 @@ static int ehci_reset(int index)
 		goto out;
 	}
 
-	if (ehci_is_TDI()) {
-		reg_ptr = (uint32_t *)((u8 *)ehcic[index].hcor + USBMODE);
-		tmp = ehci_readl(reg_ptr);
-		tmp |= USBMODE_CM_HC;
-#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
-		tmp |= USBMODE_BE;
-#endif
-		ehci_writel(reg_ptr, tmp);
-	}
+	if (ehci_is_TDI())
+		ehci_set_usbmode(index);
 
 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 	cmd = ehci_readl(&ehcic[index].hcor->or_txfilltuning);
@@ -587,16 +603,6 @@ fail:
 	return -1;
 }
 
-static inline int min3(int a, int b, int c)
-{
-
-	if (b < a)
-		a = b;
-	if (c < a)
-		a = c;
-	return a;
-}
-
 int
 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 		 int length, struct devrequest *req)
@@ -607,15 +613,14 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 	int len, srclen;
 	uint32_t reg;
 	uint32_t *status_reg;
+	int port = le16_to_cpu(req->index) & 0xff;
 	struct ehci_ctrl *ctrl = dev->controller;
 
-	if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
-		printf("The request port(%d) is not configured\n",
-			le16_to_cpu(req->index) - 1);
+	if (port > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
+		printf("The request port(%d) is not configured\n", port - 1);
 		return -1;
 	}
-	status_reg = (uint32_t *)&ctrl->hcor->or_portsc[
-						le16_to_cpu(req->index) - 1];
+	status_reg = (uint32_t *)&ctrl->hcor->or_portsc[port - 1];
 	srclen = 0;
 
 	debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
@@ -711,7 +716,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 
 		if (ehci_is_TDI()) {
-			switch (PORTSC_PSPD(reg)) {
+			switch (ehci_get_port_speed(ctrl->hcor, reg)) {
 			case PORTSC_PSPD_FS:
 				break;
 			case PORTSC_PSPD_LS:
@@ -732,7 +737,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 		if (reg & EHCI_PS_OCC)
 			tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
-		if (ctrl->portreset & (1 << le16_to_cpu(req->index)))
+		if (ctrl->portreset & (1 << port))
 			tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 
 		srcptr = tmpbuf;
@@ -758,7 +763,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			    EHCI_PS_IS_LOWSPEED(reg)) {
 				/* Low speed device, give up ownership. */
 				debug("port %d low speed --> companion\n",
-				      req->index - 1);
+				      port - 1);
 				reg |= EHCI_PS_PO;
 				ehci_writel(status_reg, reg);
 				break;
@@ -784,13 +789,17 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 				ret = handshake(status_reg, EHCI_PS_PR, 0,
 						2 * 1000);
 				if (!ret)
-					ctrl->portreset |=
-						1 << le16_to_cpu(req->index);
+					ctrl->portreset |= 1 << port;
 				else
 					printf("port(%d) reset error\n",
-					le16_to_cpu(req->index) - 1);
+					       port - 1);
 			}
 			break;
+		case USB_PORT_FEAT_TEST:
+			reg &= ~(0xf << 16);
+			reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
+			ehci_writel(status_reg, reg);
+			break;
 		default:
 			debug("unknown feature %x\n", le16_to_cpu(req->value));
 			goto unknown;
@@ -817,7 +826,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
 			break;
 		case USB_PORT_FEAT_C_RESET:
-			ctrl->portreset &= ~(1 << le16_to_cpu(req->index));
+			ctrl->portreset &= ~(1 << port);
 			break;
 		default:
 			debug("unknown feature %x\n", le16_to_cpu(req->value));
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 086cd0fe5dc..2060a3eb461 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -60,7 +60,7 @@ int usb_cpu_init(void)
 	writel(1 << ATMEL_ID_UHP, &pmc->pcer);
 #endif
 
-#ifdef CONFIG_AT91SAM9261
+#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 	writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
 #else
 	writel(ATMEL_PMC_UHP, &pmc->scer);
@@ -80,7 +80,7 @@ int usb_cpu_stop(void)
 	writel(1 << ATMEL_ID_UHP, &pmc->pcdr);
 #endif
 
-#ifdef CONFIG_AT91SAM9261
+#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 	writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
 #else
 	writel(ATMEL_PMC_UHP, &pmc->scdr);
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 13e7c376861..d57578df6c2 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -33,6 +33,7 @@ endif
 COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
 COBJS-$(CONFIG_S5P)               += s5p_wdt.o
 COBJS-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
+COBJS-$(CONFIG_BFIN_WATCHDOG)  += bfin_wdt.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
diff --git a/arch/blackfin/cpu/watchdog.c b/drivers/watchdog/bfin_wdt.c
index 1886bda0ae6..7a6756b2e52 100644
--- a/arch/blackfin/cpu/watchdog.c
+++ b/drivers/watchdog/bfin_wdt.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <watchdog.h>
 #include <asm/blackfin.h>
+#include <asm/mach-common/bits/watchdog.h>
 
 void hw_watchdog_reset(void)
 {
@@ -17,7 +18,9 @@ void hw_watchdog_reset(void)
 
 void hw_watchdog_init(void)
 {
-	bfin_write_WDOG_CNT(5 * get_sclk());	/* 5 second timeout */
+	bfin_write_WDOG_CTL(WDDIS);
+	SSYNC();
+	bfin_write_WDOG_CNT(CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000 * get_sclk());
 	hw_watchdog_reset();
-	bfin_write_WDOG_CTL(0x0);
+	bfin_write_WDOG_CTL(WDEN);
 }
diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c
index 464a67d5319..81b7633b59c 100644
--- a/fs/ext4/dev.c
+++ b/fs/ext4/dev.c
@@ -40,6 +40,7 @@
 #include <config.h>
 #include <ext4fs.h>
 #include <ext_common.h>
+#include "ext4_common.h"
 
 unsigned long part_offset;
 
@@ -48,37 +49,41 @@ static disk_partition_t *part_info;
 
 void ext4fs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info)
 {
+	assert(rbdd->blksz == (1 << rbdd->log2blksz));
 	ext4fs_block_dev_desc = rbdd;
+	get_fs()->dev_desc = rbdd;
 	part_info = info;
 	part_offset = info->start;
-	get_fs()->total_sect = (info->size * info->blksz) / SECTOR_SIZE;
-	get_fs()->dev_desc = rbdd;
+	get_fs()->total_sect = (info->size * info->blksz) >>
+		get_fs()->dev_desc->log2blksz;
 }
 
 int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, SECTOR_SIZE);
 	unsigned block_len;
+	int log2blksz = ext4fs_block_dev_desc->log2blksz;
+	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (ext4fs_block_dev_desc ?
+						 ext4fs_block_dev_desc->blksz :
+						 0));
+	if (ext4fs_block_dev_desc == NULL) {
+		printf("** Invalid Block Device Descriptor (NULL)\n");
+		return 0;
+	}
 
 	/* Check partition boundaries */
-	if ((sector < 0)
-	    || ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS)) >=
-		part_info->size)) {
+	if ((sector < 0) ||
+	    ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
+	     >= part_info->size)) {
 		printf("%s read outside partition %d\n", __func__, sector);
 		return 0;
 	}
 
 	/* Get the read to the beginning of a partition */
-	sector += byte_offset >> SECTOR_BITS;
-	byte_offset &= SECTOR_SIZE - 1;
+	sector += byte_offset >> log2blksz;
+	byte_offset &= ext4fs_block_dev_desc->blksz - 1;
 
 	debug(" <%d, %d, %d>\n", sector, byte_offset, byte_len);
 
-	if (ext4fs_block_dev_desc == NULL) {
-		printf("** Invalid Block Device Descriptor (NULL)\n");
-		return 0;
-	}
-
 	if (byte_offset != 0) {
 		/* read first part which isn't aligned with start of sector */
 		if (ext4fs_block_dev_desc->
@@ -89,9 +94,12 @@ int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf)
 			return 0;
 		}
 		memcpy(buf, sec_buf + byte_offset,
-			min(SECTOR_SIZE - byte_offset, byte_len));
-		buf += min(SECTOR_SIZE - byte_offset, byte_len);
-		byte_len -= min(SECTOR_SIZE - byte_offset, byte_len);
+			min(ext4fs_block_dev_desc->blksz
+			    - byte_offset, byte_len));
+		buf += min(ext4fs_block_dev_desc->blksz
+			   - byte_offset, byte_len);
+		byte_len -= min(ext4fs_block_dev_desc->blksz
+				- byte_offset, byte_len);
 		sector++;
 	}
 
@@ -99,12 +107,12 @@ int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf)
 		return 1;
 
 	/* read sector aligned part */
-	block_len = byte_len & ~(SECTOR_SIZE - 1);
+	block_len = byte_len & ~(ext4fs_block_dev_desc->blksz - 1);
 
 	if (block_len == 0) {
-		ALLOC_CACHE_ALIGN_BUFFER(u8, p, SECTOR_SIZE);
+		ALLOC_CACHE_ALIGN_BUFFER(u8, p, ext4fs_block_dev_desc->blksz);
 
-		block_len = SECTOR_SIZE;
+		block_len = ext4fs_block_dev_desc->blksz;
 		ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc->dev,
 						  part_info->start + sector,
 						  1, (unsigned long *)p);
@@ -114,16 +122,16 @@ int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf)
 
 	if (ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc->dev,
 					       part_info->start + sector,
-					       block_len / SECTOR_SIZE,
+					       block_len >> log2blksz,
 					       (unsigned long *) buf) !=
-					       block_len / SECTOR_SIZE) {
+					       block_len >> log2blksz) {
 		printf(" ** %s read error - block\n", __func__);
 		return 0;
 	}
-	block_len = byte_len & ~(SECTOR_SIZE - 1);
+	block_len = byte_len & ~(ext4fs_block_dev_desc->blksz - 1);
 	buf += block_len;
 	byte_len -= block_len;
-	sector += block_len / SECTOR_SIZE;
+	sector += block_len / ext4fs_block_dev_desc->blksz;
 
 	if (byte_len != 0) {
 		/* read rest of data which are not in whole sector */
@@ -138,3 +146,13 @@ int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf)
 	}
 	return 1;
 }
+
+int ext4_read_superblock(char *buffer)
+{
+	struct ext_filesystem *fs = get_fs();
+	int sect = SUPERBLOCK_START >> fs->dev_desc->log2blksz;
+	int off = SUPERBLOCK_START % fs->dev_desc->blksz;
+
+	return ext4fs_devread(sect, off, SUPERBLOCK_SIZE,
+				buffer);
+}
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index f12b8056cc0..58880b467fb 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -71,18 +71,18 @@ void put_ext4(uint64_t off, void *buf, uint32_t size)
 	uint64_t startblock;
 	uint64_t remainder;
 	unsigned char *temp_ptr = NULL;
-	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, sec_buf, SECTOR_SIZE);
 	struct ext_filesystem *fs = get_fs();
+	int log2blksz = fs->dev_desc->log2blksz;
+	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, sec_buf, fs->dev_desc->blksz);
 
-	startblock = off / (uint64_t)SECTOR_SIZE;
+	startblock = off >> log2blksz;
 	startblock += part_offset;
-	remainder = off % (uint64_t)SECTOR_SIZE;
-	remainder &= SECTOR_SIZE - 1;
+	remainder = off & (uint64_t)(fs->dev_desc->blksz - 1);
 
 	if (fs->dev_desc == NULL)
 		return;
 
-	if ((startblock + (size / SECTOR_SIZE)) >
+	if ((startblock + (size >> log2blksz)) >
 	    (part_offset + fs->total_sect)) {
 		printf("part_offset is %lu\n", part_offset);
 		printf("total_sector is %llu\n", fs->total_sect);
@@ -101,10 +101,10 @@ void put_ext4(uint64_t off, void *buf, uint32_t size)
 						  startblock, 1, sec_buf);
 		}
 	} else {
-		if (size / SECTOR_SIZE != 0) {
+		if (size >> log2blksz != 0) {
 			fs->dev_desc->block_write(fs->dev_desc->dev,
 						  startblock,
-						  size / SECTOR_SIZE,
+						  size >> log2blksz,
 						  (unsigned long *)buf);
 		} else {
 			fs->dev_desc->block_read(fs->dev_desc->dev,
@@ -1459,6 +1459,7 @@ static int ext4fs_blockgroup
 {
 	long int blkno;
 	unsigned int blkoff, desc_per_blk;
+	int log2blksz = get_fs()->dev_desc->log2blksz;
 
 	desc_per_blk = EXT2_BLOCK_SIZE(data) / sizeof(struct ext2_block_group);
 
@@ -1469,7 +1470,7 @@ static int ext4fs_blockgroup
 	debug("ext4fs read %d group descriptor (blkno %ld blkoff %u)\n",
 	      group, blkno, blkoff);
 
-	return ext4fs_devread(blkno << LOG2_EXT2_BLOCK_SIZE(data),
+	return ext4fs_devread(blkno << (LOG2_BLOCK_SIZE(data) - log2blksz),
 			      blkoff, sizeof(struct ext2_block_group),
 			      (char *)blkgrp);
 }
@@ -1479,6 +1480,7 @@ int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode)
 	struct ext2_block_group blkgrp;
 	struct ext2_sblock *sblock = &data->sblock;
 	struct ext_filesystem *fs = get_fs();
+	int log2blksz = get_fs()->dev_desc->log2blksz;
 	int inodes_per_block, status;
 	long int blkno;
 	unsigned int blkoff;
@@ -1495,7 +1497,8 @@ int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode)
 	    (ino % __le32_to_cpu(sblock->inodes_per_group)) / inodes_per_block;
 	blkoff = (ino % inodes_per_block) * fs->inodesz;
 	/* Read the inode. */
-	status = ext4fs_devread(blkno << LOG2_EXT2_BLOCK_SIZE(data), blkoff,
+	status = ext4fs_devread(blkno << (LOG2_BLOCK_SIZE(data) - log2blksz),
+				blkoff,
 				sizeof(struct ext2_inode), (char *)inode);
 	if (status == 0)
 		return 0;
@@ -1515,7 +1518,9 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock)
 	unsigned long long start;
 	/* get the blocksize of the filesystem */
 	blksz = EXT2_BLOCK_SIZE(ext4fs_root);
-	log2_blksz = LOG2_EXT2_BLOCK_SIZE(ext4fs_root);
+	log2_blksz = LOG2_BLOCK_SIZE(ext4fs_root)
+		- get_fs()->dev_desc->log2blksz;
+
 	if (le32_to_cpu(inode->flags) & EXT4_EXTENTS_FL) {
 		char *buf = zalloc(blksz);
 		if (!buf)
@@ -1523,11 +1528,11 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock)
 		struct ext4_extent_header *ext_block;
 		struct ext4_extent *extent;
 		int i = -1;
-		ext_block = ext4fs_get_extent_block(ext4fs_root, buf,
-						    (struct ext4_extent_header
-						     *)inode->b.
-						    blocks.dir_blocks,
-						    fileblock, log2_blksz);
+		ext_block =
+			ext4fs_get_extent_block(ext4fs_root, buf,
+						(struct ext4_extent_header *)
+						inode->b.blocks.dir_blocks,
+						fileblock, log2_blksz);
 		if (!ext_block) {
 			printf("invalid extent block\n");
 			free(buf);
@@ -1839,7 +1844,7 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock)
 		blknr = __le32_to_cpu(ext4fs_indir3_block
 				      [rblock % perblock_child]);
 	}
-	debug("ext4fs_read_block %ld\n", blknr);
+	debug("read_allocated_block %ld\n", blknr);
 
 	return blknr;
 }
@@ -2193,13 +2198,12 @@ int ext4fs_mount(unsigned part_length)
 	struct ext2_data *data;
 	int status;
 	struct ext_filesystem *fs = get_fs();
-	data = zalloc(sizeof(struct ext2_data));
+	data = zalloc(SUPERBLOCK_SIZE);
 	if (!data)
 		return 0;
 
 	/* Read the superblock. */
-	status = ext4fs_devread(1 * 2, 0, sizeof(struct ext2_sblock),
-				(char *)&data->sblock);
+	status = ext4_read_superblock((char *)&data->sblock);
 
 	if (status == 0)
 		goto fail;
diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h
index 72cd0207114..6571df62f0c 100644
--- a/fs/ext4/ext4_common.h
+++ b/fs/ext4/ext4_common.h
@@ -49,7 +49,7 @@
 
 #define S_IFLNK		0120000		/* symbolic link */
 #define BLOCK_NO_ONE		1
-#define SUPERBLOCK_SECTOR	2
+#define SUPERBLOCK_START	(2 * 512)
 #define SUPERBLOCK_SIZE	1024
 #define F_FILE			1
 
diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c
index ba4a7bb713d..81aa5fc0f86 100644
--- a/fs/ext4/ext4_journal.c
+++ b/fs/ext4/ext4_journal.c
@@ -534,16 +534,14 @@ end:
 		jsb->s_start = cpu_to_be32(1);
 		jsb->s_sequence = cpu_to_be32(be32_to_cpu(jsb->s_sequence) + 1);
 		/* get the superblock */
-		ext4fs_devread(SUPERBLOCK_SECTOR, 0, SUPERBLOCK_SIZE,
-			       (char *)fs->sb);
+		ext4_read_superblock((char *)fs->sb);
 		fs->sb->feature_incompat |= EXT3_FEATURE_INCOMPAT_RECOVER;
 
 		/* Update the super block */
 		put_ext4((uint64_t) (SUPERBLOCK_SIZE),
 			 (struct ext2_sblock *)fs->sb,
 			 (uint32_t) SUPERBLOCK_SIZE);
-		ext4fs_devread(SUPERBLOCK_SECTOR, 0, SUPERBLOCK_SIZE,
-			       (char *)fs->sb);
+		ext4_read_superblock((char *)fs->sb);
 
 		blknr = read_allocated_block(&inode_journal,
 					 EXT2_JOURNAL_SUPERBLOCK);
diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index c4e399ccfae..0c1f62b60ca 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -614,14 +614,13 @@ int ext4fs_init(void)
 	/* populate fs */
 	fs->blksz = EXT2_BLOCK_SIZE(ext4fs_root);
 	fs->inodesz = INODE_SIZE_FILESYSTEM(ext4fs_root);
-	fs->sect_perblk = fs->blksz / SECTOR_SIZE;
+	fs->sect_perblk = fs->blksz >> fs->dev_desc->log2blksz;
 
 	/* get the superblock */
 	fs->sb = zalloc(SUPERBLOCK_SIZE);
 	if (!fs->sb)
 		return -ENOMEM;
-	if (!ext4fs_devread(SUPERBLOCK_SECTOR, 0, SUPERBLOCK_SIZE,
-			(char *)fs->sb))
+	if (!ext4_read_superblock((char *)fs->sb))
 		goto fail;
 
 	/* init journal */
@@ -722,7 +721,7 @@ void ext4fs_deinit(void)
 	ext4fs_free_journal();
 
 	/* get the superblock */
-	ext4fs_devread(SUPERBLOCK_SECTOR, 0, SUPERBLOCK_SIZE, (char *)fs->sb);
+	ext4_read_superblock((char *)fs->sb);
 	fs->sb->feature_incompat &= ~EXT3_FEATURE_INCOMPAT_RECOVER;
 	put_ext4((uint64_t)(SUPERBLOCK_SIZE),
 		 (struct ext2_sblock *)fs->sb, (uint32_t)SUPERBLOCK_SIZE);
@@ -766,9 +765,10 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
 {
 	int i;
 	int blockcnt;
-	int log2blocksize = LOG2_EXT2_BLOCK_SIZE(ext4fs_root);
 	unsigned int filesize = __le32_to_cpu(file_inode->size);
 	struct ext_filesystem *fs = get_fs();
+	int log2blksz = fs->dev_desc->log2blksz;
+	int log2_fs_blocksize = LOG2_BLOCK_SIZE(ext4fs_root) - log2blksz;
 	int previous_block_number = -1;
 	int delayed_start = 0;
 	int delayed_extent = 0;
@@ -789,16 +789,16 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
 		if (blknr < 0)
 			return -1;
 
-		blknr = blknr << log2blocksize;
+		blknr = blknr << log2_fs_blocksize;
 
 		if (blknr) {
 			if (previous_block_number != -1) {
 				if (delayed_next == blknr) {
 					delayed_extent += blockend;
-					delayed_next += blockend >> SECTOR_BITS;
+					delayed_next += blockend >> log2blksz;
 				} else {	/* spill */
-					put_ext4((uint64_t) (delayed_start *
-							     SECTOR_SIZE),
+					put_ext4((uint64_t)
+						 (delayed_start << log2blksz),
 						 delayed_buf,
 						 (uint32_t) delayed_extent);
 					previous_block_number = blknr;
@@ -806,7 +806,7 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
 					delayed_extent = blockend;
 					delayed_buf = buf;
 					delayed_next = blknr +
-					    (blockend >> SECTOR_BITS);
+					    (blockend >> log2blksz);
 				}
 			} else {
 				previous_block_number = blknr;
@@ -814,13 +814,14 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
 				delayed_extent = blockend;
 				delayed_buf = buf;
 				delayed_next = blknr +
-				    (blockend >> SECTOR_BITS);
+				    (blockend >> log2blksz);
 			}
 		} else {
 			if (previous_block_number != -1) {
 				/* spill */
-				put_ext4((uint64_t) (delayed_start *
-						     SECTOR_SIZE), delayed_buf,
+				put_ext4((uint64_t) (delayed_start <<
+						     log2blksz),
+					 delayed_buf,
 					 (uint32_t) delayed_extent);
 				previous_block_number = -1;
 			}
@@ -830,7 +831,7 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
 	}
 	if (previous_block_number != -1) {
 		/* spill */
-		put_ext4((uint64_t) (delayed_start * SECTOR_SIZE),
+		put_ext4((uint64_t) (delayed_start << log2blksz),
 			 delayed_buf, (uint32_t) delayed_extent);
 		previous_block_number = -1;
 	}
@@ -921,7 +922,8 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
 	/* Allocate data blocks */
 	ext4fs_allocate_blocks(file_inode, blocks_remaining,
 			       &blks_reqd_for_file);
-	file_inode->blockcnt = (blks_reqd_for_file * fs->blksz) / SECTOR_SIZE;
+	file_inode->blockcnt = (blks_reqd_for_file * fs->blksz) >>
+		fs->dev_desc->log2blksz;
 
 	temp_ptr = zalloc(fs->blksz);
 	if (!temp_ptr)
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 4dddde24764..1954afb91d8 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -60,10 +60,12 @@ void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot)
 int ext4fs_read_file(struct ext2fs_node *node, int pos,
 		unsigned int len, char *buf)
 {
+	struct ext_filesystem *fs = get_fs();
 	int i;
 	int blockcnt;
-	int log2blocksize = LOG2_EXT2_BLOCK_SIZE(node->data);
-	int blocksize = 1 << (log2blocksize + DISK_SECTOR_BITS);
+	int log2blksz = fs->dev_desc->log2blksz;
+	int log2_fs_blocksize = LOG2_BLOCK_SIZE(node->data) - log2blksz;
+	int blocksize = (1 << (log2_fs_blocksize + log2blksz));
 	unsigned int filesize = __le32_to_cpu(node->inode.size);
 	int previous_block_number = -1;
 	int delayed_start = 0;
@@ -88,7 +90,7 @@ int ext4fs_read_file(struct ext2fs_node *node, int pos,
 		if (blknr < 0)
 			return -1;
 
-		blknr = blknr << log2blocksize;
+		blknr = blknr << log2_fs_blocksize;
 
 		/* Last block.  */
 		if (i == blockcnt - 1) {
@@ -110,7 +112,7 @@ int ext4fs_read_file(struct ext2fs_node *node, int pos,
 			if (previous_block_number != -1) {
 				if (delayed_next == blknr) {
 					delayed_extent += blockend;
-					delayed_next += blockend >> SECTOR_BITS;
+					delayed_next += blockend >> log2blksz;
 				} else {	/* spill */
 					status = ext4fs_devread(delayed_start,
 							delayed_skipfirst,
@@ -124,7 +126,7 @@ int ext4fs_read_file(struct ext2fs_node *node, int pos,
 					delayed_skipfirst = skipfirst;
 					delayed_buf = buf;
 					delayed_next = blknr +
-						(blockend >> SECTOR_BITS);
+						(blockend >> log2blksz);
 				}
 			} else {
 				previous_block_number = blknr;
@@ -133,7 +135,7 @@ int ext4fs_read_file(struct ext2fs_node *node, int pos,
 				delayed_skipfirst = skipfirst;
 				delayed_buf = buf;
 				delayed_next = blknr +
-					(blockend >> SECTOR_BITS);
+					(blockend >> log2blksz);
 			}
 		} else {
 			if (previous_block_number != -1) {
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index a9aa8baf0dc..a4bfdac18e0 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -61,14 +61,6 @@ typedef struct bd_info {
 #if defined(CONFIG_MPC83xx)
 	unsigned long	bi_immrbar;
 #endif
-#if defined(CONFIG_MPC8220)
-	unsigned long	bi_mbar_base;	/* base of internal registers */
-	unsigned long   bi_inpfreq;     /* Input Freq, In MHz */
-	unsigned long   bi_pcifreq;     /* PCI Freq, in MHz */
-	unsigned long   bi_pevfreq;     /* PEV Freq, in MHz */
-	unsigned long   bi_flbfreq;     /* Flexbus Freq, in MHz */
-	unsigned long   bi_vcofreq;     /* VCO Freq, in MHz */
-#endif
 	unsigned long	bi_bootflags;	/* boot / reboot flag (Unused) */
 	unsigned long	bi_ip_addr;	/* IP Address */
 	unsigned char	bi_enetaddr[6];	/* OLD: see README.enetaddr */
diff --git a/include/bootstage.h b/include/bootstage.h
index 3b2216b8a8c..6dc0422bac4 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -221,7 +221,7 @@ enum bootstage_id {
  */
 ulong timer_get_boot_us(void);
 
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(USE_HOSTCC)
 /*
  * Board code can implement show_boot_progress() if needed.
  *
@@ -233,10 +233,21 @@ void show_boot_progress(int val);
 #define show_boot_progress(val) do {} while (0)
 #endif
 
-#if defined(CONFIG_BOOTSTAGE) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_BOOTSTAGE) && !defined(CONFIG_SPL_BUILD) && \
+	!defined(USE_HOSTCC)
 /* This is the full bootstage implementation */
 
 /**
+ * Relocate existing bootstage records
+ *
+ * Call this after relocation has happened and after malloc has been initted.
+ * We need to copy any pointers in bootstage records that were added pre-
+ * relocation, since memory can be overritten later.
+ * @return Always returns 0, to indicate success
+ */
+int bootstage_relocate(void);
+
+/**
  * Add a new bootstage record
  *
  * @param id	Bootstage ID to use (ignored if flags & BOOTSTAGEF_ALLOC)
@@ -257,6 +268,19 @@ ulong bootstage_error(enum bootstage_id id);
 ulong bootstage_mark_name(enum bootstage_id id, const char *name);
 
 /**
+ * Mark a time stamp in the given function and line number
+ *
+ * See BOOTSTAGE_MARKER() for a convenient macro.
+ *
+ * @param file		Filename to record (NULL if none)
+ * @param func		Function name to record
+ * @param linenum	Line number to record
+ * @return recorded time stamp
+ */
+ulong bootstage_mark_code(const char *file, const char *func,
+			  int linenum);
+
+/**
  * Mark the start of a bootstage activity. The end will be marked later with
  * bootstage_accum() and at that point we accumulate the time taken. Calling
  * this function turns the given id into a accumulator rather than and
@@ -315,11 +339,22 @@ int bootstage_stash(void *base, int size);
 int bootstage_unstash(void *base, int size);
 
 #else
+static inline ulong bootstage_add_record(enum bootstage_id id,
+		const char *name, int flags, ulong mark)
+{
+	return 0;
+}
+
 /*
  * This is a dummy implementation which just calls show_boot_progress(),
  * and won't even do that unless CONFIG_SHOW_BOOT_PROGRESS is defined
  */
 
+static inline int bootstage_relocate(void)
+{
+	return 0;
+}
+
 static inline ulong bootstage_mark(enum bootstage_id id)
 {
 	show_boot_progress(id);
@@ -337,6 +372,22 @@ static inline ulong bootstage_mark_name(enum bootstage_id id, const char *name)
 	return 0;
 }
 
+static inline ulong bootstage_mark_code(const char *file, const char *func,
+					int linenum)
+{
+	return 0;
+}
+
+static inline uint32_t bootstage_start(enum bootstage_id id, const char *name)
+{
+	return 0;
+}
+
+static inline uint32_t bootstage_accum(enum bootstage_id id)
+{
+	return 0;
+}
+
 static inline int bootstage_stash(void *base, int size)
 {
 	return 0;	/* Pretend to succeed */
@@ -348,4 +399,8 @@ static inline int bootstage_unstash(void *base, int size)
 }
 #endif /* CONFIG_BOOTSTAGE */
 
+/* Helper macro for adding a bootstage to a line of code */
+#define BOOTSTAGE_MARKER()	\
+		bootstage_mark_code(__FILE__, __func__, __LINE__)
+
 #endif
diff --git a/include/common.h b/include/common.h
index 8a1f3e406d9..e682bd82377 100644
--- a/include/common.h
+++ b/include/common.h
@@ -71,8 +71,6 @@ typedef volatile unsigned char	vu_char;
 #include <mpc5xxx.h>
 #elif defined(CONFIG_MPC512X)
 #include <asm/immap_512x.h>
-#elif defined(CONFIG_MPC8220)
-#include <asm/immap_8220.h>
 #elif defined(CONFIG_8260)
 #if   defined(CONFIG_MPC8247) \
    || defined(CONFIG_MPC8248) \
@@ -199,18 +197,35 @@ typedef void (interrupt_handler_t)(void *);
  * General Purpose Utilities
  */
 #define min(X, Y)				\
-	({ typeof (X) __x = (X);		\
-		typeof (Y) __y = (Y);		\
+	({ typeof(X) __x = (X);			\
+		typeof(Y) __y = (Y);		\
 		(__x < __y) ? __x : __y; })
 
 #define max(X, Y)				\
-	({ typeof (X) __x = (X);		\
-		typeof (Y) __y = (Y);		\
+	({ typeof(X) __x = (X);			\
+		typeof(Y) __y = (Y);		\
 		(__x > __y) ? __x : __y; })
 
 #define MIN(x, y)  min(x, y)
 #define MAX(x, y)  max(x, y)
 
+#define min3(X, Y, Z)				\
+	({ typeof(X) __x = (X);			\
+		typeof(Y) __y = (Y);		\
+		typeof(Z) __z = (Z);		\
+		__x < __y ? (__x < __z ? __x : __z) :	\
+		(__y < __z ? __y : __z); })
+
+#define max3(X, Y, Z)				\
+	({ typeof(X) __x = (X);			\
+		typeof(Y) __y = (Y);		\
+		typeof(Z) __z = (Z);		\
+		__x > __y ? (__x > __z ? __x : __z) :	\
+		(__y > __z ? __y : __z); })
+
+#define MIN3(x, y, z)  min3(x, y, z)
+#define MAX3(x, y, z)  max3(x, y, z)
+
 /*
  * Return the absolute value of a number.
  *
@@ -323,6 +338,16 @@ int update_flash_size(int flash_size);
  */
 void board_show_dram(ulong size);
 
+/**
+ * arch_fixup_memory_node() - Write arch-specific memory information to fdt
+ *
+ * Defined in arch/$(ARCH)/lib/bootm.c
+ *
+ * @blob:	FDT blob to write to
+ * @return 0 if ok, or -ve FDT_ERR_... on failure
+ */
+int arch_fixup_memory_node(void *blob);
+
 /* common/flash.c */
 void flash_perror (int);
 
@@ -556,7 +581,6 @@ void	trap_init     (ulong);
     defined (CONFIG_74x)	|| \
     defined (CONFIG_75x)	|| \
     defined (CONFIG_74xx)	|| \
-    defined (CONFIG_MPC8220)	|| \
     defined (CONFIG_MPC85xx)	|| \
     defined (CONFIG_MPC86xx)	|| \
     defined (CONFIG_MPC83xx)
@@ -648,9 +672,6 @@ int	prt_8260_clks (void);
 #elif defined(CONFIG_MPC5xxx)
 int	prt_mpc5xxx_clks (void);
 #endif
-#if defined(CONFIG_MPC8220)
-int	prt_mpc8220_clks (void);
-#endif
 #ifdef CONFIG_4xx
 ulong	get_OPB_freq (void);
 ulong	get_PCI_freq (void);
diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h
deleted file mode 100644
index 39c29ecc222..00000000000
--- a/include/configs/Alaska8220.h
+++ /dev/null
@@ -1,334 +0,0 @@
-/*
- * (C) Copyright 2004
- * TsiChung Liew, Freescale Software Engineering, Tsi-Chung.Liew@freescale.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_MPC8220		1
-#define CONFIG_ALASKA8220	1	/* ... on Alaska board	*/
-
-#define	CONFIG_SYS_TEXT_BASE	0xfff00000
-
-#define CONFIG_BAT_RW		1	/* Use common BAT rw code */
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
-/* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to
-   determine the CPU speed. */
-#define CONFIG_SYS_MPC8220_CLKIN	30000000/* ... running at 30MHz */
-#define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */
-
-/*
- * Serial console configuration
- */
-
-/* Define this for PSC console
-#define CONFIG_PSC_CONSOLE	1
-*/
-
-#define CONFIG_EXTUART_CONSOLE	1
-
-#ifdef CONFIG_EXTUART_CONSOLE
-#   define CONFIG_CONS_INDEX	1
-#   define CONFIG_SYS_NS16550_SERIAL
-#   define CONFIG_SYS_NS16550
-#   define CONFIG_SYS_NS16550_REG_SIZE 1
-#   define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_CPLD_BASE + 0x1008)
-#   define CONFIG_SYS_NS16550_CLK	18432000
-#endif
-
-#define CONFIG_BAUDRATE		115200	    /* ... at 115200 bps */
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-#define CONFIG_TIMESTAMP			/* Print image info with timestamp */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BOOTD
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-
-#define CONFIG_MII
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5    /* autoboot after 5 seconds */
-#define CONFIG_BOOTARGS		"root=/dev/ram rw"
-#define CONFIG_ETHADDR		00:e0:0c:bc:e0:60
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR		00:e0:0c:bc:e0:61
-#define CONFIG_IPADDR		192.162.1.2
-#define CONFIG_NETMASK		255.255.255.0
-#define CONFIG_SERVERIP		192.162.1.1
-#define CONFIG_GATEWAYIP	192.162.1.1
-#define CONFIG_HOSTNAME		Alaska
-#define CONFIG_OVERWRITE_ETHADDR_ONCE
-
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1
-#define CONFIG_SYS_I2C_MODULE		1
-
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x52	/* 1011000xb */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	70
-/*
-#define CONFIG_ENV_IS_IN_EEPROM	1
-#define CONFIG_ENV_OFFSET		0
-#define CONFIG_ENV_SIZE		256
-*/
-
-/* If CONFIG_SYS_AMD_BOOT is defined, the the system will boot from AMD.
-   else undefined it will boot from Intel Strata flash */
-#define CONFIG_SYS_AMD_BOOT		1
-
-/*
- * Flexbus Chipselect configuration
- */
-#if defined (CONFIG_SYS_AMD_BOOT)
-#define CONFIG_SYS_CS0_BASE		0xfff0
-#define CONFIG_SYS_CS0_MASK		0x00080000  /* 512 KB */
-#define CONFIG_SYS_CS0_CTRL		0x003f0d40
-
-#define CONFIG_SYS_CS1_BASE		0xfe00
-#define CONFIG_SYS_CS1_MASK		0x01000000  /* 16 MB */
-#define CONFIG_SYS_CS1_CTRL		0x003f1540
-#else
-#define CONFIG_SYS_CS0_BASE		0xff00
-#define CONFIG_SYS_CS0_MASK		0x01000000  /* 16 MB */
-#define CONFIG_SYS_CS0_CTRL		0x003f1540
-
-#define CONFIG_SYS_CS1_BASE		0xfe08
-#define CONFIG_SYS_CS1_MASK		0x00080000  /* 512 KB */
-#define CONFIG_SYS_CS1_CTRL		0x003f0d40
-#endif
-
-#define CONFIG_SYS_CS2_BASE		0xf100
-#define CONFIG_SYS_CS2_MASK		0x00040000
-#define CONFIG_SYS_CS2_CTRL		0x003f1140
-
-#define CONFIG_SYS_CS3_BASE		0xf200
-#define CONFIG_SYS_CS3_MASK		0x00040000
-#define CONFIG_SYS_CS3_CTRL		0x003f1100
-
-
-#define CONFIG_SYS_FLASH0_BASE		(CONFIG_SYS_CS0_BASE << 16)
-#define CONFIG_SYS_FLASH1_BASE		(CONFIG_SYS_CS1_BASE << 16)
-
-#if defined (CONFIG_SYS_AMD_BOOT)
-#define CONFIG_SYS_AMD_BASE		CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_INTEL_BASE		CONFIG_SYS_FLASH1_BASE + 0xf00000
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_AMD_BASE
-#else
-#define CONFIG_SYS_INTEL_BASE		CONFIG_SYS_FLASH0_BASE + 0xf00000
-#define CONFIG_SYS_AMD_BASE		CONFIG_SYS_FLASH1_BASE
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_INTEL_BASE
-#endif
-
-#define CONFIG_SYS_CPLD_BASE		(CONFIG_SYS_CS2_BASE << 16)
-#define CONFIG_SYS_FPGA_BASE		(CONFIG_SYS_CS3_BASE << 16)
-
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	4	/* max num of memory banks	*/
-#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max num of sects on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */
-#define CONFIG_SYS_FLASH_PROTECTION		/* "Real" (hardware) sectors protection */
-
-#define PHYS_AMD_SECT_SIZE	0x00010000 /*  64 KB sectors (x2) */
-#define PHYS_INTEL_SECT_SIZE	0x00020000 /* 128 KB sectors (x2) */
-
-#define CONFIG_SYS_FLASH_CHECKSUM
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#if defined (CONFIG_SYS_AMD_BOOT)
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH0_BASE + CONFIG_SYS_CS0_MASK - PHYS_AMD_SECT_SIZE)
-#define CONFIG_ENV_SIZE		PHYS_AMD_SECT_SIZE
-#define CONFIG_ENV_SECT_SIZE	PHYS_AMD_SECT_SIZE
-#define CONFIG_ENV1_ADDR		(CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_CS1_MASK - PHYS_INTEL_SECT_SIZE)
-#define CONFIG_ENV1_SIZE		PHYS_INTEL_SECT_SIZE
-#define CONFIG_ENV1_SECT_SIZE	PHYS_INTEL_SECT_SIZE
-#else
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH0_BASE + CONFIG_SYS_CS0_MASK - PHYS_INTEL_SECT_SIZE)
-#define CONFIG_ENV_SIZE		PHYS_INTEL_SECT_SIZE
-#define CONFIG_ENV_SECT_SIZE	PHYS_INTEL_SECT_SIZE
-#define CONFIG_ENV1_ADDR		(CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_CS1_MASK - PHYS_AMD_SECT_SIZE)
-#define CONFIG_ENV1_SIZE		PHYS_AMD_SECT_SIZE
-#define CONFIG_ENV1_SECT_SIZE	PHYS_AMD_SECT_SIZE
-#endif
-
-#define CONFIG_ENV_OVERWRITE	1
-
-#if defined CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_EEPROM
-#elif defined CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_EEPROM
-#elif defined CONFIG_ENV_IS_IN_EEPROM
-#undef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#endif
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-#define CONFIG_SYS_SRAM_BASE		(CONFIG_SYS_MBAR + 0x20000)
-#define CONFIG_SYS_SRAM_SIZE		0x8000
-
-/* Use SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	(CONFIG_SYS_MBAR + 0x20000)
-#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* Size of used area in DPRAM */
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10) /* Reserve 256 kB for Monitor   */
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10) /* Reserve 128 kB for malloc()  */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)   /* Initial Memory map for Linux */
-
-/* SDRAM configuration */
-#define CONFIG_SYS_SDRAM_TOTAL_BANKS		2
-#define CONFIG_SYS_SDRAM_SPD_I2C_ADDR		0x51		/* 7bit */
-#define CONFIG_SYS_SDRAM_SPD_SIZE		0x40
-#define CONFIG_SYS_SDRAM_CAS_LATENCY		4		/* (CL=2)x2 */
-
-/* SDRAM drive strength register */
-#define CONFIG_SYS_SDRAM_DRIVE_STRENGTH	((DRIVE_STRENGTH_LOW  << SDRAMDS_SBE_SHIFT) | \
-					 (DRIVE_STRENGTH_HIGH << SDRAMDS_SBC_SHIFT) | \
-					 (DRIVE_STRENGTH_LOW  << SDRAMDS_SBA_SHIFT) | \
-					 (DRIVE_STRENGTH_OFF  << SDRAMDS_SBS_SHIFT) | \
-					 (DRIVE_STRENGTH_LOW  << SDRAMDS_SBD_SHIFT))
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC8220_FEC	1
-#define CONFIG_FEC_10MBIT	1 /* Workaround for FEC 100Mbit problem */
-#define CONFIG_PHY_ADDR		0x18
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			    /* undef to save memory	*/
-#define CONFIG_SYS_PROMPT		"=> "	    /* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	    /* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE		256	    /* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	    /* max number of command args   */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size    */
-
-#define CONFIG_SYS_MEMTEST_START	0x00100000  /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000  /* 1 ... 15 MB in DRAM  */
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000    /* default load address */
-
-#define CONFIG_SYS_HZ			1000	    /* decrementer freq: 1 ms ticks */
-
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC8220 CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5   /* log base 2 of the above value */
-#endif
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-
-/*
- * JFFS2 partitions
- */
-
-/* No command line, one static partition */
-/*
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV		"nor0"
-#define CONFIG_JFFS2_PART_SIZE		0x00400000
-#define CONFIG_JFFS2_PART_OFFSET	0x00000000
-*/
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT		"nor0=alaska-0"
-#define MTDPARTS_DEFAULT	"mtdparts=alaska-0:4m(user)"
-*/
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index b09119a2f24..1c9d08e2564 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -36,7 +36,6 @@
 
 /* High Level Configuration Options */
 #define CONFIG_BOOKE
-#define CONFIG_E6500
 #define CONFIG_E500			/* BOOKE e500 family */
 #define CONFIG_E500MC			/* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
@@ -528,6 +527,15 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SF_DEFAULT_MODE          0
 
 /*
+ * MAPLE
+ */
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_MAPLE_MEM_PHYS      0xFA0000000ull
+#else
+#define CONFIG_SYS_MAPLE_MEM_PHYS      0xA0000000
+#endif
+
+/*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
@@ -623,7 +631,11 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	0x10
 #define CONFIG_SYS_FM1_DTSEC6_PHY_ADDR	0x11
-#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR	4
+
+/*B4860 QDS AMC2PEX-2S default PHY_ADDR */
+#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0x7	 /*SLOT 1*/
+#define CONFIG_SYS_FM1_10GEC2_PHY_ADDR 0x6	 /*SLOT 2*/
+
 
 #define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR    0x1c
 #define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR    0x1d
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 76b3ca68986..6dd5c0d53a9 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -25,7 +25,6 @@
  */
 #define CONFIG_T4240QDS
 #define CONFIG_PHYS_64BIT
-#define CONFIG_PPC_T4240
 
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE4
diff --git a/include/configs/Yukon8220.h b/include/configs/Yukon8220.h
deleted file mode 100644
index 5f925b328c3..00000000000
--- a/include/configs/Yukon8220.h
+++ /dev/null
@@ -1,326 +0,0 @@
-/*
- * (C) Copyright 2004
- * TsiChung Liew, Freescale Software Engineering, Tsi-Chung.Liew@freescale.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_MPC8220		1
-#define CONFIG_YUKON8220	1	/* ... on Yukon board	*/
-
-#define	CONFIG_SYS_TEXT_BASE	0xfff00000
-
-#define CONFIG_BAT_RW		1	/* Use common BAT rw code */
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
-/* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to
-   determine the CPU speed. */
-#define CONFIG_SYS_MPC8220_CLKIN	30000000/* ... running at 30MHz */
-#define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */
-
-/*
- * Serial console configuration
- */
-
-/* Define this for PSC console
-#define CONFIG_PSC_CONSOLE	1
-*/
-
-#define CONFIG_EXTUART_CONSOLE	1
-
-#ifdef CONFIG_EXTUART_CONSOLE
-#   define CONFIG_CONS_INDEX	1
-#   define CONFIG_SYS_NS16550_SERIAL
-#   define CONFIG_SYS_NS16550
-#   define CONFIG_SYS_NS16550_REG_SIZE 1
-#   define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_CPLD_BASE + 0x1008)
-#   define CONFIG_SYS_NS16550_CLK	18432000
-#endif
-
-#define CONFIG_BAUDRATE		115200	    /* ... at 115200 bps */
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-#define CONFIG_TIMESTAMP			/* Print image info with timestamp */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BOOTD
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-
-#define CONFIG_MII
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5    /* autoboot after 5 seconds */
-#define CONFIG_BOOTARGS		"root=/dev/ram rw"
-#define CONFIG_ETHADDR		00:e0:0c:bc:e0:60
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR		00:e0:0c:bc:e0:61
-#define CONFIG_IPADDR		192.162.1.2
-#define CONFIG_NETMASK		255.255.255.0
-#define CONFIG_SERVERIP		192.162.1.1
-#define CONFIG_GATEWAYIP	192.162.1.1
-#define CONFIG_HOSTNAME		yukon
-#define CONFIG_OVERWRITE_ETHADDR_ONCE
-
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1
-#define CONFIG_SYS_I2C_MODULE		1
-
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x52	/* 1011000xb */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	70
-/*
-#define CONFIG_ENV_IS_IN_EEPROM	1
-#define CONFIG_ENV_OFFSET		0
-#define CONFIG_ENV_SIZE		256
-*/
-
-/* If CONFIG_SYS_AMD_BOOT is defined, the the system will boot from AMD.
-   else undefined it will boot from Intel Strata flash */
-#define CONFIG_SYS_AMD_BOOT		1
-
-/*
- * Flexbus Chipselect configuration
- */
-#if defined (CONFIG_SYS_AMD_BOOT)
-#define CONFIG_SYS_CS0_BASE		0xfff0
-#define CONFIG_SYS_CS0_MASK		0x00080000  /* 512 KB */
-#define CONFIG_SYS_CS0_CTRL		0x003f0d40
-
-#define CONFIG_SYS_CS1_BASE		0xfe00
-#define CONFIG_SYS_CS1_MASK		0x01000000  /* 16 MB */
-#define CONFIG_SYS_CS1_CTRL		0x003f1540
-#else
-#define CONFIG_SYS_CS0_BASE		0xff00
-#define CONFIG_SYS_CS0_MASK		0x01000000  /* 16 MB */
-#define CONFIG_SYS_CS0_CTRL		0x003f1540
-
-#define CONFIG_SYS_CS1_BASE		0xfe08
-#define CONFIG_SYS_CS1_MASK		0x00080000  /* 512 KB */
-#define CONFIG_SYS_CS1_CTRL		0x003f0d40
-#endif
-
-#define CONFIG_SYS_CS2_BASE		0xf100
-#define CONFIG_SYS_CS2_MASK		0x00040000
-#define CONFIG_SYS_CS2_CTRL		0x003f1140
-
-#define CONFIG_SYS_CS3_BASE		0xf200
-#define CONFIG_SYS_CS3_MASK		0x00040000
-#define CONFIG_SYS_CS3_CTRL		0x003f1100
-
-
-#define CONFIG_SYS_FLASH0_BASE		(CONFIG_SYS_CS0_BASE << 16)
-#define CONFIG_SYS_FLASH1_BASE		(CONFIG_SYS_CS1_BASE << 16)
-
-#if defined (CONFIG_SYS_AMD_BOOT)
-#define CONFIG_SYS_AMD_BASE		CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_INTEL_BASE		CONFIG_SYS_FLASH1_BASE + 0xf00000
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_AMD_BASE
-#else
-#define CONFIG_SYS_INTEL_BASE		CONFIG_SYS_FLASH0_BASE + 0xf00000
-#define CONFIG_SYS_AMD_BASE		CONFIG_SYS_FLASH1_BASE
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_INTEL_BASE
-#endif
-
-#define CONFIG_SYS_CPLD_BASE		(CONFIG_SYS_CS2_BASE << 16)
-#define CONFIG_SYS_FPGA_BASE		(CONFIG_SYS_CS3_BASE << 16)
-
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	4	/* max num of memory banks	*/
-#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max num of sects on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */
-#define CONFIG_SYS_FLASH_PROTECTION		/* "Real" (hardware) sectors protection */
-
-#define PHYS_AMD_SECT_SIZE	0x00010000 /*  64 KB sectors (x2) */
-#define PHYS_INTEL_SECT_SIZE	0x00020000 /* 128 KB sectors (x2) */
-
-#define CONFIG_SYS_FLASH_CHECKSUM
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#if defined (CONFIG_SYS_AMD_BOOT)
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH0_BASE + CONFIG_SYS_CS0_MASK - PHYS_AMD_SECT_SIZE)
-#define CONFIG_ENV_SIZE		PHYS_AMD_SECT_SIZE
-#define CONFIG_ENV_SECT_SIZE	PHYS_AMD_SECT_SIZE
-#define CONFIG_ENV1_ADDR		(CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_CS1_MASK - PHYS_INTEL_SECT_SIZE)
-#define CONFIG_ENV1_SIZE		PHYS_INTEL_SECT_SIZE
-#define CONFIG_ENV1_SECT_SIZE	PHYS_INTEL_SECT_SIZE
-#else
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH0_BASE + CONFIG_SYS_CS0_MASK - PHYS_INTEL_SECT_SIZE)
-#define CONFIG_ENV_SIZE		PHYS_INTEL_SECT_SIZE
-#define CONFIG_ENV_SECT_SIZE	PHYS_INTEL_SECT_SIZE
-#define CONFIG_ENV1_ADDR		(CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_CS1_MASK - PHYS_AMD_SECT_SIZE)
-#define CONFIG_ENV1_SIZE		PHYS_AMD_SECT_SIZE
-#define CONFIG_ENV1_SECT_SIZE	PHYS_AMD_SECT_SIZE
-#endif
-
-#define CONFIG_ENV_OVERWRITE	1
-
-#if defined CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_EEPROM
-#elif defined CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_EEPROM
-#elif defined CONFIG_ENV_IS_IN_EEPROM
-#undef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#endif
-
-#ifndef CONFIG_SYS_JFFS2_FIRST_SECTOR
-#define CONFIG_SYS_JFFS2_FIRST_SECTOR	0
-#endif
-#ifndef CONFIG_SYS_JFFS2_FIRST_BANK
-#define CONFIG_SYS_JFFS2_FIRST_BANK	0
-#endif
-#ifndef CONFIG_SYS_JFFS2_NUM_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS	1
-#endif
-#define CONFIG_SYS_JFFS2_LAST_BANK (CONFIG_SYS_JFFS2_FIRST_BANK + CONFIG_SYS_JFFS2_NUM_BANKS - 1)
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-#define CONFIG_SYS_SRAM_BASE		(CONFIG_SYS_MBAR + 0x20000)
-#define CONFIG_SYS_SRAM_SIZE		0x8000
-
-/* Use SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	(CONFIG_SYS_MBAR + 0x20000)
-#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* Size of used area in DPRAM */
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10) /* Reserve 256 kB for Monitor   */
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10) /* Reserve 128 kB for malloc()  */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)   /* Initial Memory map for Linux */
-
-/* SDRAM configuration */
-#define CONFIG_SYS_SDRAM_TOTAL_BANKS		2
-#define CONFIG_SYS_SDRAM_SPD_I2C_ADDR		0x51		/* 7bit */
-#define CONFIG_SYS_SDRAM_SPD_SIZE		0x40
-#define CONFIG_SYS_SDRAM_CAS_LATENCY		4		/* (CL=2)x2 */
-
-/* SDRAM drive strength register */
-#define CONFIG_SYS_SDRAM_DRIVE_STRENGTH	((DRIVE_STRENGTH_LOW  << SDRAMDS_SBE_SHIFT) | \
-					 (DRIVE_STRENGTH_HIGH << SDRAMDS_SBC_SHIFT) | \
-					 (DRIVE_STRENGTH_LOW  << SDRAMDS_SBA_SHIFT) | \
-					 (DRIVE_STRENGTH_OFF  << SDRAMDS_SBS_SHIFT) | \
-					 (DRIVE_STRENGTH_LOW  << SDRAMDS_SBD_SHIFT))
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC8220_FEC	1
-#define CONFIG_FEC_10MBIT	1 /* Workaround for FEC 100Mbit problem */
-#define CONFIG_PHY_ADDR		0x18
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			    /* undef to save memory	*/
-#define CONFIG_SYS_PROMPT		"=> "	    /* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	    /* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE		256	    /* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	    /* max number of command args   */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size    */
-
-#define CONFIG_SYS_MEMTEST_START	0x00100000  /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000  /* 1 ... 15 MB in DRAM  */
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000    /* default load address */
-
-#define CONFIG_SYS_HZ			1000	    /* decrementer freq: 1 ms ticks */
-
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC8220 CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5   /* log base 2 of the above value */
-#endif
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h
index 7b51b53dc54..db1b6136f3a 100644
--- a/include/configs/bf527-ezkit.h
+++ b/include/configs/bf527-ezkit.h
@@ -149,10 +149,15 @@
 #define CONFIG_MUSB_TIMEOUT 100000
 #endif
 
+/* Don't waste time transferring a logo over the UART */
+#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
+/*# define CONFIG_VIDEO*/
+#endif
 
 /*
  * Video Settings
  */
+#ifdef CONFIG_VIDEO
 #ifdef CONFIG_BF527_EZKIT_REV_2_1
 # define CONFIG_LQ035Q1_SPI_BUS	0
 # define CONFIG_LQ035Q1_SPI_CS	7
@@ -166,7 +171,7 @@
 #else
 # define EASYLOGO_HEADER <asm/bfin_logo_230x230_lzma.h>
 #endif
-
+#endif /* CONFIG_VIDEO */
 
 /*
  * Misc Settings
@@ -175,11 +180,6 @@
 #define CONFIG_RTC_BFIN
 #define CONFIG_UART_CONSOLE	1
 
-/* Don't waste time transferring a logo over the UART */
-#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
-# define CONFIG_VIDEO
-#endif
-
 
 /*
  * Pull in common ADI header for remaining command/environment setup
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 05029d497bb..25cebf880fa 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -52,7 +52,7 @@
 #define CONFIG_EBIU_AMBCTL0_VAL	0x7BB07BB0
 #define CONFIG_EBIU_AMBCTL1_VAL	0xFFC27BB0
 
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_MONITOR_LEN		(768 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(384 * 1024)
 
 
@@ -135,15 +135,17 @@
 /*
  * SPI_MMC Settings
  */
+#define CONFIG_MMC_SPI
+#ifdef CONFIG_MMC_SPI
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_SPI
-
+#endif
 
 /*
  * NAND Settings
  */
 /* #define CONFIG_NAND_PLAT */
+#ifdef CONFIG_NAND_PLAT
 #define CONFIG_SYS_NAND_BASE		0x20212000
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
@@ -158,7 +160,7 @@
 #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
 #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
 #define NAND_PLAT_GPIO_DEV_READY       GPIO_PF3
-
+#endif /* CONFIG_NAND_PLAT */
 
 /*
  * CF-CARD IDE-HDD Support
diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h
index e6b05db09d7..da5f0294351 100644
--- a/include/configs/bf548-ezkit.h
+++ b/include/configs/bf548-ezkit.h
@@ -120,18 +120,16 @@
 #define CONFIG_ENV_SECT_SIZE	0x8000
 #endif
 
-
 /*
  * NAND Settings
  */
-#define CONFIG_BFIN_NFC_CTL_VAL	0x0033
 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
-# define CONFIG_BFIN_NFC_BOOTROM_ECC
-#endif
+#define CONFIG_BFIN_NFC_CTL_VAL        0x0033
+#define CONFIG_BFIN_NFC_BOOTROM_ECC
 #define CONFIG_DRIVER_NAND_BFIN
-#define CONFIG_SYS_NAND_BASE		0 /* not actually used */
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-
+#define CONFIG_SYS_NAND_BASE           0 /* not actually used */
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#endif
 
 /*
  * I2C Settings
@@ -184,13 +182,12 @@
 #define CONFIG_UART_CONSOLE	1
 #define CONFIG_BFIN_SPI_IMG_SIZE 0x50000
 
-#ifndef __ADSPBF542__
-/* Don't waste time transferring a logo over the UART */
-# if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
-#  define CONFIG_VIDEO
-#  define EASYLOGO_HEADER <asm/bfin_logo_230x230_gzip.h>
-# endif
-# define CONFIG_DEB_DMA_URGENT
+#define CONFIG_ADI_GPIO2
+
+#undef CONFIG_VIDEO
+#ifdef CONFIG_VIDEO
+#define EASYLOGO_HEADER < asm/bfin_logo_230x230_gzip.h >
+#define CONFIG_DEB_DMA_URGENT
 #endif
 
 /* Define if want to do post memory test */
diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h
index 1a9d27ea2a0..6ee1e4c869d 100644
--- a/include/configs/bf561-ezkit.h
+++ b/include/configs/bf561-ezkit.h
@@ -98,6 +98,11 @@
  */
 #define CONFIG_UART_CONSOLE	0
 
+/*
+ * Run core 1 from L1 SRAM start address when init uboot on core 0
+ */
+/* #define CONFIG_CORE1_RUN	1 */
+
 
 /*
  * Pull in common ADI header for remaining command/environment setup
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 02149fa94df..1a43e1b433e 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -144,10 +144,13 @@
 #define CONFIG_UART_CONSOLE	0
 
 #define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_SOFTSWITCH
 
 #define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 20*1024*1024 + 4)
 #define CONFIG_BFIN_SOFT_SWITCH
 
+#define CONFIG_ADI_GPIO2
+
 #if 0
 #define CONFIG_UART_MEM 1024
 #undef CONFIG_UART_CONSOLE
@@ -155,6 +158,13 @@
 #undef CONFIG_UART_CONSOLE_IS_JTAG
 #endif
 
+#define CONFIG_BOARD_SIZE_LIMIT $$((512 * 1024))
+
+/*
+ * Run core 1 from L1 SRAM start address when init uboot on core 0
+ */
+/* #define CONFIG_CORE1_RUN	1 */
+
 /*
  * Pull in common ADI header for remaining command/environment setup
  */
diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h
index d3ae3a71cd7..e1a6fe3056c 100644
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -111,8 +111,8 @@
 #ifndef CONFIG_BAUDRATE
 # define CONFIG_BAUDRATE	57600
 #endif
-#ifndef CONFIG_DEBUG_EARLY_SERIAL
-# define CONFIG_SYS_BFIN_UART
+#ifdef CONFIG_UART_CONSOLE
+# define CONFIG_BFIN_SERIAL
 #endif
 
 /*
@@ -317,5 +317,13 @@
 #define CONFIG_BFIN_SPI_GPIO_CS /* Only matters if BFIN_SPI is enabled */
 #define CONFIG_LZMA
 #define CONFIG_MONITOR_IS_IN_RAM
-
+#ifdef CONFIG_HW_WATCHDOG
+# define CONFIG_BFIN_WATCHDOG
+# ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
+#  define CONFIG_WATCHDOG_TIMEOUT_MSECS 5000
+# endif
+#endif
+#ifndef CONFIG_ADI_GPIO2
+# define CONFIG_ADI_GPIO1
+#endif
 #endif
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 5bacc77bb50..be04a7548a7 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -38,7 +38,6 @@
 #define CONFIG_SHOW_BOOT_PROGRESS
 #define CONFIG_LAST_STAGE_INIT
 #define CONFIG_SYS_VSNPRINTF
-#define CONFIG_INTEL_CORE_ARCH	/* Sandy bridge and ivy bridge chipsets. */
 #define CONFIG_ZBOOT_32
 #define CONFIG_PHYSMEM
 #define CONFIG_SYS_EARLY_PCI_INIT
@@ -49,6 +48,19 @@
 #define CONFIG_OF_SEPARATE
 #define CONFIG_DEFAULT_DEVICE_TREE	link
 
+#define CONFIG_BOOTSTAGE
+#define CONFIG_BOOTSTAGE_REPORT
+#define CONFIG_BOOTSTAGE_FDT
+#define CONFIG_CMD_BOOTSTAGE
+/* Place to stash bootstage data from first-stage U-Boot */
+#define CONFIG_BOOTSTAGE_STASH		0x0110f000
+#define CONFIG_BOOTSTAGE_STASH_SIZE	0x7fc
+#define CONFIG_BOOTSTAGE_USER_COUNT	60
+
+#define CONFIG_LZO
+#undef CONFIG_ZLIB
+#undef CONFIG_GZIP
+
 /*-----------------------------------------------------------------------
  * Watchdog Configuration
  */
@@ -218,7 +230,6 @@
 #define CONFIG_SYS_MEMTEST_END			0x01000000
 #define CONFIG_SYS_LOAD_ADDR			0x100000
 #define CONFIG_SYS_HZ				1000
-#define CONFIG_SYS_X86_ISR_TIMER
 
 /*-----------------------------------------------------------------------
  * SDRAM Configuration
@@ -235,8 +246,9 @@
  * CPU Features
  */
 
-#define CONFIG_SYS_GENERIC_TIMER
+#define CONFIG_SYS_X86_TSC_TIMER
 #define CONFIG_SYS_PCAT_INTERRUPTS
+#define CONFIG_SYS_PCAT_TIMER
 #define CONFIG_SYS_NUM_IRQS			16
 
 /*-----------------------------------------------------------------------
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 5cc9b5ab26e..2e2d439678c 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -38,6 +38,8 @@
 #define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg
 #elif defined(CONFIG_P5020DS)
 #define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg
+#elif defined(CONFIG_P5040DS)
+#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg
 #endif
 #endif
 
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 0c4e7193ba7..17f53baf908 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -104,7 +104,7 @@
 
 /* gpio */
 #ifdef XILINX_GPIO_BASEADDR
-# define CONFIG_SYS_GPIO_0		1
+# define CONFIG_XILINX_GPIO
 # define CONFIG_SYS_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
 #endif
 
@@ -312,6 +312,7 @@
 #define CONFIG_CMD_IRQ
 #define CONFIG_CMD_MFSL
 #define CONFIG_CMD_ECHO
+#define CONFIG_CMD_GPIO
 
 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
 # define CONFIG_CMD_CACHE
diff --git a/include/configs/sorcery.h b/include/configs/sorcery.h
deleted file mode 100644
index f67898e840f..00000000000
--- a/include/configs/sorcery.h
+++ /dev/null
@@ -1,298 +0,0 @@
-/*
- * (C) Copyright 2004
- * TsiChung Liew, Freescale Software Engineering, Tsi-Chung.Liew@freescale.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_MPC8220		1
-#define CONFIG_SORCERY		1	/* Sorcery board */
-
-#define	CONFIG_SYS_TEXT_BASE	0xfff00000
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
-/* Input clock running at 60Mhz, read Hid1 for the CPU multiplier to
-   determine the CPU speed. */
-#define CONFIG_SYS_MPC8220_CLKIN	60000000 /* ... running at 60MHz */
-#define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 8 /* VCO multiplier can't be read from any register */
-
-/*
- * Serial console configuration
- */
-#define CONFIG_PSC_CONSOLE	1	/* console is on PSC */
-
-#define CONFIG_BAUDRATE		115200	    /* ... at 115200 bps */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/* PCI */
-#define CONFIG_PCI              1
-#define CONFIG_PCI_PNP          1
-
-#define CONFIG_PCI_MEM_BUS      0x80000000
-#define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE     0x10000000
-
-#define CONFIG_PCI_IO_BUS	0x71000000
-#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE	0x01000000
-
-#define CONFIG_PCI_CFG_BUS	0x70000000
-#define CONFIG_PCI_CFG_PHYS	CONFIG_PCI_CFG_BUS
-#define CONFIG_PCI_CFG_SIZE	0x01000000
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BOOTD
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-
-/*
- * Default Environment
- */
-#define CONFIG_BOOTDELAY	5    /* autoboot after 5 seconds */
-#define CONFIG_HOSTNAME		sorcery
-
-#define CONFIG_PREBOOT	"echo;"	\
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=$serverip:$rootpath\0"				\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs $bootargs "				\
-		"ip=$ipaddr:$serverip:$gatewayip:$netmask"		\
-		":$hostname:$netdev:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm $kernel_addr\0"					\
-	"flash_self=run ramargs addip;"					\
-		"bootm $kernel_addr $ramdisk_addr\0"			\
-	"net_nfs=tftp 200000 $bootfile;run nfsargs addip;bootm\0"	\
-	"rootpath=/opt/eldk/ppc_82xx\0"					\
-	"bootfile=/tftpboot/sorcery/uImage\0"				\
-	"kernel_addr=FFE00000\0"					\
-	"ramdisk_addr=FFB00000\0"					\
-	""
-#define CONFIG_BOOTCOMMAND	"run flash_self"
-
-#define CONFIG_TIMESTAMP		/* Print image info with timestamp */
-
-#define CONFIG_EEPRO100
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1
-#define CONFIG_SYS_I2C_MODULE		1
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-
-/*
- * Flexbus Chipselect configuration
- * Beware: Some CS# seem to be mandatory (if these CS# are not set,
- * board can hang-up in unpredictable place).
- * Sorcery_Memory_Map v0.3 is possibly wrong with CPLD CS#
- */
-
-/* Flash */
-#define CONFIG_SYS_CS0_BASE		0xf800
-#define CONFIG_SYS_CS0_MASK		0x08000000 /* 128 MB (two chips) */
-#define CONFIG_SYS_CS0_CTRL		0x001019c0
-
-/* NVM */
-#define CONFIG_SYS_CS1_BASE		0xf7e8
-#define CONFIG_SYS_CS1_MASK		0x00040000 /* 256K */
-#define CONFIG_SYS_CS1_CTRL		0x00101940 /* 8bit port size */
-
-/* Atlas2 + Gemini */
-#define CONFIG_SYS_CS2_BASE		0xf7e7
-#define CONFIG_SYS_CS2_MASK		0x00010000 /* 64K*/
-#define CONFIG_SYS_CS2_CTRL		0x001011c0 /* 16bit port size */
-
-/* CAN Controller */
-#define CONFIG_SYS_CS3_BASE		0xf7e6
-#define CONFIG_SYS_CS3_MASK		0x00010000 /* 64K */
-#define CONFIG_SYS_CS3_CTRL		0x00102140 /* 8Bit port size */
-
-/* Foreign interface */
-#define CONFIG_SYS_CS4_BASE		0xf7e5
-#define CONFIG_SYS_CS4_MASK		0x00010000 /* 64K */
-#define CONFIG_SYS_CS4_CTRL		0x00101dc0 /* 16bit port size */
-
-/* CPLD */
-#define CONFIG_SYS_CS5_BASE		0xf7e4
-#define CONFIG_SYS_CS5_MASK		0x00010000 /* 64K */
-#define CONFIG_SYS_CS5_CTRL		0x001000c0 /* 16bit port size */
-
-#define CONFIG_SYS_FLASH0_BASE		(CONFIG_SYS_CS0_BASE << 16)
-#define CONFIG_SYS_FLASH_BASE		(CONFIG_SYS_FLASH0_BASE)
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max num of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT	512	/* max num of sects on one chip */
-
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE,  \
-				CONFIG_SYS_FLASH_BASE+0x04000000 } /* two banks */
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x8000000 - 0x40000)
-#define CONFIG_ENV_SIZE		0x4000                       /* 16K */
-#define CONFIG_ENV_SECT_SIZE	0x20000
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + 0x20000)
-#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
-
-#define CONFIG_ENV_OVERWRITE	1
-
-#if defined CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_EEPROM
-#elif defined CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_EEPROM
-#elif defined CONFIG_ENV_IS_IN_EEPROM
-#undef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#endif
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-#define CONFIG_SYS_SRAM_BASE		(CONFIG_SYS_MBAR + 0x20000)
-#define CONFIG_SYS_SRAM_SIZE		0x8000
-
-/* Use SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	(CONFIG_SYS_MBAR + 0x20000)
-#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* Size of used area in DPRAM */
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10) /* Reserve 256 kB for Monitor   */
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10) /* Reserve 128 kB for malloc()  */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)   /* Initial Memory map for Linux */
-
-/* SDRAM configuration (for SPD) */
-#define CONFIG_SYS_SDRAM_TOTAL_BANKS		1
-#define CONFIG_SYS_SDRAM_SPD_I2C_ADDR		0x50		/* 7bit */
-#define CONFIG_SYS_SDRAM_SPD_SIZE		0x100
-#define CONFIG_SYS_SDRAM_CAS_LATENCY		5		/* (CL=2.5)x2 */
-
-/* SDRAM drive strength register (for SSTL_2 class II)*/
-#define CONFIG_SYS_SDRAM_DRIVE_STRENGTH	((DRIVE_STRENGTH_HIGH << SDRAMDS_SBE_SHIFT) | \
-					 (DRIVE_STRENGTH_HIGH << SDRAMDS_SBC_SHIFT) | \
-					 (DRIVE_STRENGTH_HIGH << SDRAMDS_SBA_SHIFT) | \
-					 (DRIVE_STRENGTH_HIGH << SDRAMDS_SBS_SHIFT) | \
-					 (DRIVE_STRENGTH_HIGH << SDRAMDS_SBD_SHIFT))
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC8220_FEC	1
-#define CONFIG_FEC_10MBIT	1 /* Workaround for FEC 100Mbit problem */
-#define CONFIG_PHY_ADDR		0x1F
-#define CONFIG_MII		1
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			    /* undef to save memory	*/
-#define CONFIG_SYS_PROMPT		"=> "	    /* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	    /* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE		256	    /* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	    /* max number of command args   */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size    */
-
-#define CONFIG_SYS_MEMTEST_START	0x00100000  /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000  /* 1 ... 15 MB in DRAM  */
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000    /* default load address */
-
-#define CONFIG_SYS_HZ			1000	    /* decrementer freq: 1 ms ticks */
-
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC8220 CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-
-/*
-#define CONFIG_SYS_HID0_INIT           HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL          HID0_ICE
-*/
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 2c665b8a9dd..fa1dcc3528c 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -29,13 +29,14 @@
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_RAMBOOT_TEXT_BASE	CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS	0xfffffffc
+#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_pbi.cfg
+#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_rcw.cfg
 #endif
 
 #define CONFIG_CMD_REGINFO
 
 /* High Level Configuration Options */
 #define CONFIG_BOOKE
-#define CONFIG_E6500
 #define CONFIG_E500			/* BOOKE e500 family */
 #define CONFIG_E500MC			/* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
@@ -444,11 +445,19 @@ unsigned long get_board_ddr_clk(void);
 #define I2C_MUX_PCA_ADDR_PRI		0x77 /* I2C bus multiplexer,primary */
 #define I2C_MUX_PCA_ADDR_SEC		0x76 /* I2C bus multiplexer,secondary */
 
-/* VSC Crossbar switches */
-#define CONFIG_VSC_CROSSBAR
 #define I2C_MUX_CH_DEFAULT	0x8
+#define I2C_MUX_CH_VOL_MONITOR	0xa
 #define I2C_MUX_CH_VSC3316_FS	0xc
 #define I2C_MUX_CH_VSC3316_BS	0xd
+
+/* Voltage monitor on channel 2*/
+#define I2C_VOL_MONITOR_ADDR		0x40
+#define I2C_VOL_MONITOR_BUS_V_OFFSET	0x2
+#define I2C_VOL_MONITOR_BUS_V_OVF	0x1
+#define I2C_VOL_MONITOR_BUS_V_SHIFT	3
+
+/* VSC Crossbar switches */
+#define CONFIG_VSC_CROSSBAR
 #define VSC3316_FSM_TX_ADDR	0x70
 #define VSC3316_FSM_RX_ADDR	0x71
 
@@ -504,7 +513,7 @@ unsigned long get_board_ddr_clk(void);
  */
 #define CONFIG_FSL_ESPI
 #define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_SPI_FLASH_SST
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED         10000000
 #define CONFIG_SF_DEFAULT_MODE          0
@@ -641,15 +650,10 @@ unsigned long get_board_ddr_clk(void);
 #define SGMII_CARD_PORT2_PHY_ADDR 0x1D
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
 #define SGMII_CARD_PORT4_PHY_ADDR 0x1F
-#define XFI_CARD_PORT1_PHY_ADDR	0x1 /* tmp, FIXME below addr */
-#define XFI_CARD_PORT2_PHY_ADDR	0x2
-#define XFI_CARD_PORT3_PHY_ADDR	0x3
-#define XFI_CARD_PORT4_PHY_ADDR	0x4
-#define QSGMII_CARD_PHY_ADDR	0x5
-#define FM1_10GEC1_PHY_ADDR	0x6
-#define FM1_10GEC2_PHY_ADDR	0x7
-#define FM2_10GEC1_PHY_ADDR	0x8
-#define FM2_10GEC2_PHY_ADDR	0x9
+#define FM1_10GEC1_PHY_ADDR	0x0
+#define FM1_10GEC2_PHY_ADDR	0x1
+#define FM2_10GEC1_PHY_ADDR	0x2
+#define FM2_10GEC2_PHY_ADDR	0x3
 #endif
 
 #ifdef CONFIG_PCI
@@ -783,8 +787,21 @@ unsigned long get_board_ddr_clk(void);
 
 #define __USB_PHY_TYPE	utmi
 
+/*
+ * T4240 has 3 DDR controllers. Default to 3way_4KB interleaving. It can be
+ * 3way_1KB, 3way_4KB, 3way_8KB. T4160 has 2 DDR controllers. Default to
+ * cacheline interleaving. It can be cacheline, page, bank, superbank.
+ * See doc/README.fsl-ddr for details.
+ */
+#ifdef CONFIG_PPC_T4240
+#define CTRL_INTLV_PREFERED 3way_4KB
+#else
+#define CTRL_INTLV_PREFERED cacheline
+#endif
+
 #define	CONFIG_EXTRA_ENV_SETTINGS				\
-	"hwconfig=fsl_ddr:ctlr_intlv=3way_4KB,"		\
+	"hwconfig=fsl_ddr:"					\
+	"ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) ","	\
 	"bank_intlv=auto;"					\
 	"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
 	"netdev=eth0\0"						\
diff --git a/include/ext4fs.h b/include/ext4fs.h
index 025a2e89c23..379f7eb5e9f 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -141,4 +141,5 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock);
 int ext4fs_probe(block_dev_desc_t *fs_dev_desc,
 		 disk_partition_t *fs_partition);
 int ext4_read_file(const char *filename, void *buf, int offset, int len);
+int ext4_read_superblock(char *buffer);
 #endif
diff --git a/include/ext_common.h b/include/ext_common.h
index 86373a6e501..78a7808aa96 100644
--- a/include/ext_common.h
+++ b/include/ext_common.h
@@ -34,7 +34,6 @@
 #define __EXT_COMMON__
 #include <command.h>
 #define SECTOR_SIZE		0x200
-#define SECTOR_BITS		9
 
 /* Magic value used to identify an ext2 filesystem.  */
 #define	EXT2_MAGIC			0xEF53
@@ -58,18 +57,13 @@
 #define FILETYPE_INO_SYMLINK		0120000
 #define EXT2_ROOT_INO			2 /* Root inode */
 
-/* Bits used as offset in sector */
-#define DISK_SECTOR_BITS		9
 /* The size of an ext2 block in bytes.  */
 #define EXT2_BLOCK_SIZE(data)	   (1 << LOG2_BLOCK_SIZE(data))
 
-/* Log2 size of ext2 block in 512 blocks.  */
-#define LOG2_EXT2_BLOCK_SIZE(data) (__le32_to_cpu \
-				(data->sblock.log2_block_size) + 1)
-
 /* Log2 size of ext2 block in bytes.  */
-#define LOG2_BLOCK_SIZE(data)	   (__le32_to_cpu \
-		(data->sblock.log2_block_size) + 10)
+#define LOG2_BLOCK_SIZE(data)	   (__le32_to_cpu		   \
+				    (data->sblock.log2_block_size) \
+				    + EXT2_MIN_BLOCK_LOG_SIZE)
 #define INODE_SIZE_FILESYSTEM(data)	(__le32_to_cpu \
 			(data->sblock.inode_size))
 
diff --git a/include/faraday/ftsdc010.h b/include/faraday/ftsdc010.h
index c34dde7477e..8284f533488 100644
--- a/include/faraday/ftsdc010.h
+++ b/include/faraday/ftsdc010.h
@@ -23,6 +23,7 @@
 #define __FTSDC010_H
 
 #ifndef __ASSEMBLY__
+
 /* sd controller register */
 struct ftsdc010_mmc {
 	unsigned int	cmd;		/* 0x00 - command reg		*/
@@ -143,6 +144,15 @@ int ftsdc010_mmc_init(int dev_index);
 #define FTSDC010_STATUS_SDIO_IRPT		(1 << 16) /* SDIO card intr */
 #define FTSDC010_STATUS_DATA0_STATUS		(1 << 17)
 #endif /* CONFIG_FTSDC010_SDIO */
+#define FTSDC010_STATUS_RSP_ERROR	\
+	(FTSDC010_STATUS_RSP_CRC_FAIL | FTSDC010_STATUS_RSP_TIMEOUT)
+#define FTSDC010_STATUS_RSP_MASK	\
+	(FTSDC010_STATUS_RSP_ERROR | FTSDC010_STATUS_RSP_CRC_OK)
+#define FTSDC010_STATUS_DATA_ERROR	\
+	(FTSDC010_STATUS_DATA_CRC_FAIL | FTSDC010_STATUS_DATA_TIMEOUT)
+#define FTSDC010_STATUS_DATA_MASK	\
+	(FTSDC010_STATUS_DATA_ERROR | FTSDC010_STATUS_DATA_CRC_OK \
+	| FTSDC010_STATUS_DATA_END)
 
 /* 0x2c - clear register */
 #define FTSDC010_CLR_RSP_CRC_FAIL		(1 << 0)
@@ -192,21 +202,24 @@ int ftsdc010_mmc_init(int dev_index);
 #define FTSDC010_CCR_CLK_DIV(x)			(((x) & 0x7f) << 0)
 #define FTSDC010_CCR_CLK_SD			(1 << 7) /* 0: MMC, 1: SD */
 #define FTSDC010_CCR_CLK_DIS			(1 << 8)
+#define FTSDC010_CCR_CLK_HISPD			(1 << 9) /* high speed */
 
 /* card type */
 #define FTSDC010_CARD_TYPE_SD			FTSDC010_CLOCK_REG_CARD_TYPE
 #define FTSDC010_CARD_TYPE_MMC			0x0
 
 /* 0x3c - bus width register */
-#define FTSDC010_BWR_SINGLE_BUS			(1 << 0)
-#define FTSDC010_BWR_WIDE_8_BUS			(1 << 1)
-#define FTSDC010_BWR_WIDE_4_BUS			(1 << 2)
-#define FTSDC010_BWR_WIDE_BUS_SUPPORT(x)	(((x) >> 3) & 0x3)
-#define FTSDC010_BWR_CARD_DETECT		(1 << 5)
-
-#define FTSDC010_BWR_1_BUS_SUPPORT		0x0
-#define FTSDC010_BWR_4_BUS_SUPPORT		0x1
-#define FTSDC010_BWR_8_BUS_SUPPORT		0x2
+#define FTSDC010_BWR_MODE_1BIT      (1 << 0) /* 1 bit mode enabled */
+#define FTSDC010_BWR_MODE_8BIT      (1 << 1) /* 8 bit mode enabled */
+#define FTSDC010_BWR_MODE_4BIT      (1 << 2) /* 4 bit mode enabled */
+#define FTSDC010_BWR_MODE_MASK      (7 << 0)
+#define FTSDC010_BWR_MODE_SHIFT     (0)
+#define FTSDC010_BWR_CAPS_1BIT      (0 << 3) /* 1 bits mode supported */
+#define FTSDC010_BWR_CAPS_4BIT      (1 << 3) /* 1,4 bits mode supported */
+#define FTSDC010_BWR_CAPS_8BIT      (2 << 3) /* 1,4,8 bits mode supported */
+#define FTSDC010_BWR_CAPS_MASK      (3 << 3)
+#define FTSDC010_BWR_CAPS_SHIFT     (3)
+#define FTSDC010_BWR_CARD_DETECT    (1 << 5)
 
 /* 0x44 or 0x9c - feature register */
 #define FTSDC010_FEATURE_FIFO_DEPTH(x)		(((x) >> 0) & 0xff)
diff --git a/include/fdt.h b/include/fdt.h
index f9612ed8212..526aedb5155 100644
--- a/include/fdt.h
+++ b/include/fdt.h
@@ -1,5 +1,56 @@
 #ifndef _FDT_H
 #define _FDT_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ * Copyright 2012 Kim Phillips, Freescale Semiconductor.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
 
 #ifndef __ASSEMBLY__
 
@@ -57,6 +108,4 @@ struct fdt_property {
 #define FDT_V16_SIZE	FDT_V3_SIZE
 #define FDT_V17_SIZE	(FDT_V16_SIZE + sizeof(fdt32_t))
 
-/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
-#define FDT_RAMDISK_OVERHEAD	0x80
 #endif /* _FDT_H */
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 2cccc3551db..8f07a670db6 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -78,11 +78,9 @@ static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose);
 #endif
 
-#ifdef CONFIG_OF_BOARD_SETUP
 void ft_board_setup(void *blob, bd_t *bd);
 void ft_cpu_setup(void *blob, bd_t *bd);
 void ft_pci_setup(void *blob, bd_t *bd);
-#endif
 
 void set_working_fdt_addr(void *addr);
 int fdt_resize(void *blob);
diff --git a/include/fm_eth.h b/include/fm_eth.h
index 495765b933f..8fcf172105a 100644
--- a/include/fm_eth.h
+++ b/include/fm_eth.h
@@ -88,7 +88,7 @@ enum fm_eth_type {
 
 #define FM_TGEC_INFO_INITIALIZER(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_10G_E,					\
@@ -96,7 +96,7 @@ enum fm_eth_type {
 	.rx_port_id	= RX_PORT_10G_BASE + n - 1,			\
 	.tx_port_id	= TX_PORT_10G_BASE + n - 1,			\
 	.compat_offset	= CONFIG_SYS_FSL_FM##idx##_OFFSET +		\
-				offsetof(struct ccsr_fman, memac[n-1]),\
+				offsetof(struct ccsr_fman, memac[n-1+8]),\
 }
 #else
 #define FM_DTSEC_INFO_INITIALIZER(idx, n) \
diff --git a/include/hash.h b/include/hash.h
index 2dbbd9b7d57..c402067af8a 100644
--- a/include/hash.h
+++ b/include/hash.h
@@ -71,4 +71,26 @@ enum {
 int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
 		 int argc, char * const argv[]);
 
+/**
+ * hash_block() - Hash a block according to the requested algorithm
+ *
+ * The caller probably knows the hash length for the chosen algorithm, but
+ * in order to provide a general interface, and output_size parameter is
+ * provided.
+ *
+ * @algo_name:		Hash algorithm to use
+ * @data:		Data to hash
+ * @len:		Lengh of data to hash in bytes
+ * @output:		Place to put hash value
+ * @output_size:	On entry, pointer to the number of bytes available in
+ *			output. On exit, pointer to the number of bytes used.
+ *			If NULL, then it is assumed that the caller has
+ *			allocated enough space for the hash. This is possible
+ *			since the caller is selecting the algorithm.
+ * @return 0 if ok, -ve on error: -EPROTONOSUPPORT for an unknown algorithm,
+ * -ENOSPC if the output buffer is not large enough.
+ */
+int hash_block(const char *algo_name, const void *data, unsigned int len,
+	       uint8_t *output, int *output_size);
+
 #endif
diff --git a/include/image.h b/include/image.h
index 4ad0e6b21ac..b8cc5236a81 100644
--- a/include/image.h
+++ b/include/image.h
@@ -36,6 +36,9 @@
 #include "compiler.h"
 #include <asm/byteorder.h>
 
+/* Define this to avoid #ifdefs later on */
+struct lmb;
+
 #ifdef USE_HOSTCC
 
 /* new uImage format support enabled on host */
@@ -43,19 +46,79 @@
 #define CONFIG_OF_LIBFDT	1
 #define CONFIG_FIT_VERBOSE	1 /* enable fit_format_{error,warning}() */
 
+#define IMAGE_ENABLE_IGNORE	0
+#define IMAGE_INDENT_STRING	""
+
 #else
 
 #include <lmb.h>
 #include <asm/u-boot.h>
 #include <command.h>
 
+/* Take notice of the 'ignore' property for hashes */
+#define IMAGE_ENABLE_IGNORE	1
+#define IMAGE_INDENT_STRING	"   "
+
 #endif /* USE_HOSTCC */
 
 #if defined(CONFIG_FIT)
 #include <libfdt.h>
 #include <fdt_support.h>
-#define CONFIG_MD5		/* FIT images need MD5 support */
-#define CONFIG_SHA1		/* and SHA1 */
+# ifdef CONFIG_SPL_BUILD
+#  ifdef CONFIG_SPL_CRC32_SUPPORT
+#   define IMAGE_ENABLE_CRC32	1
+#  endif
+#  ifdef CONFIG_SPL_MD5_SUPPORT
+#   define IMAGE_ENABLE_MD5	1
+#  endif
+#  ifdef CONFIG_SPL_SHA1_SUPPORT
+#   define IMAGE_ENABLE_SHA1	1
+#  endif
+# else
+#  define CONFIG_CRC32		/* FIT images need CRC32 support */
+#  define CONFIG_MD5		/* and MD5 */
+#  define CONFIG_SHA1		/* and SHA1 */
+#  define IMAGE_ENABLE_CRC32	1
+#  define IMAGE_ENABLE_MD5	1
+#  define IMAGE_ENABLE_SHA1	1
+# endif
+
+#ifndef IMAGE_ENABLE_CRC32
+#define IMAGE_ENABLE_CRC32	0
+#endif
+
+#ifndef IMAGE_ENABLE_MD5
+#define IMAGE_ENABLE_MD5	0
+#endif
+
+#ifndef IMAGE_ENABLE_SHA1
+#define IMAGE_ENABLE_SHA1	0
+#endif
+
+#endif /* CONFIG_FIT */
+
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
+# define IMAGE_ENABLE_RAMDISK_HIGH	1
+#else
+# define IMAGE_ENABLE_RAMDISK_HIGH	0
+#endif
+
+#ifdef CONFIG_OF_LIBFDT
+# define IMAGE_ENABLE_OF_LIBFDT	1
+#else
+# define IMAGE_ENABLE_OF_LIBFDT	0
+#endif
+
+#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
+# define IMAGE_BOOT_GET_CMDLINE		1
+#else
+# define IMAGE_BOOT_GET_CMDLINE		0
+#endif
+
+#ifdef CONFIG_OF_BOARD_SETUP
+# define IMAAGE_OF_BOARD_SETUP		1
+#else
+# define IMAAGE_OF_BOARD_SETUP		0
 #endif
 
 /*
@@ -244,9 +307,7 @@ typedef struct bootm_headers {
 
 	ulong		rd_start, rd_end;/* ramdisk start/end */
 
-#ifdef CONFIG_OF_LIBFDT
 	char		*ft_addr;	/* flat dev tree address */
-#endif
 	ulong		ft_len;		/* length of flat device tree */
 
 	ulong		initrd_start;
@@ -333,34 +394,35 @@ int genimg_get_type_id(const char *name);
 int genimg_get_comp_id(const char *name);
 void genimg_print_size(uint32_t size);
 
+#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || \
+	defined(USE_HOSTCC)
+#define IMAGE_ENABLE_TIMESTAMP 1
+#else
+#define IMAGE_ENABLE_TIMESTAMP 0
+#endif
+void genimg_print_time(time_t timestamp);
+
 #ifndef USE_HOSTCC
 /* Image format types, returned by _get_format() routine */
 #define IMAGE_FORMAT_INVALID	0x00
 #define IMAGE_FORMAT_LEGACY	0x01	/* legacy image_header based format */
 #define IMAGE_FORMAT_FIT	0x02	/* new, libfdt based format */
 
-int genimg_get_format(void *img_addr);
+int genimg_get_format(const void *img_addr);
 int genimg_has_config(bootm_headers_t *images);
 ulong genimg_get_image(ulong img_addr);
 
 int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 		uint8_t arch, ulong *rd_start, ulong *rd_end);
 
-
-#ifdef CONFIG_OF_LIBFDT
 int boot_get_fdt(int flag, int argc, char * const argv[],
 		bootm_headers_t *images, char **of_flat_tree, ulong *of_size);
 void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob);
 int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size);
-#endif
 
-#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
 int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len,
 		  ulong *initrd_start, ulong *initrd_end);
-#endif /* CONFIG_SYS_BOOT_RAMDISK_HIGH */
-#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
 int boot_get_cmdline(struct lmb *lmb, ulong *cmd_start, ulong *cmd_end);
-#endif /* CONFIG_SYS_BOOT_GET_CMDLINE */
 #ifdef CONFIG_SYS_BOOT_GET_KBD
 int boot_get_kbd(struct lmb *lmb, bd_t **kbd);
 #endif /* CONFIG_SYS_BOOT_GET_KBD */
@@ -502,6 +564,31 @@ static inline int image_check_target_arch(const image_header_t *hdr)
 }
 #endif /* USE_HOSTCC */
 
+/**
+ * Set up properties in the FDT
+ *
+ * This sets up properties in the FDT that is to be passed to linux.
+ *
+ * @images:	Images information
+ * @blob:	FDT to update
+ * @of_size:	Size of the FDT
+ * @lmb:	Points to logical memory block structure
+ * @return 0 if ok, <0 on failure
+ */
+int image_setup_libfdt(bootm_headers_t *images, void *blob,
+		       int of_size, struct lmb *lmb);
+
+/**
+ * Set up the FDT to use for booting a kernel
+ *
+ * This performs ramdisk setup, sets up the FDT if required, and adds
+ * paramters to the FDT if libfdt is available.
+ *
+ * @param images	Images information
+ * @return 0 if ok, <0 on failure
+ */
+int image_setup_linux(bootm_headers_t *images);
+
 /*******************************************************************/
 /* New uImage format specific code (prefixed with fit_) */
 /*******************************************************************/
@@ -543,7 +630,6 @@ int fit_parse_subimage(const char *spec, ulong addr_curr,
 
 void fit_print_contents(const void *fit);
 void fit_image_print(const void *fit, int noffset, const char *p);
-void fit_image_print_hash(const void *fit, int noffset, const char *p);
 
 /**
  * fit_get_end - get FIT image size
@@ -599,18 +685,19 @@ int fit_image_get_data(const void *fit, int noffset,
 int fit_image_hash_get_algo(const void *fit, int noffset, char **algo);
 int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
 				int *value_len);
-#ifndef USE_HOSTCC
-int fit_image_hash_get_ignore(const void *fit, int noffset, int *ignore);
-#endif
 
 int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
-int fit_set_hashes(void *fit);
-int fit_image_set_hashes(void *fit, int image_noffset);
-int fit_image_hash_set_value(void *fit, int noffset, uint8_t *value,
-				int value_len);
 
-int fit_image_check_hashes(const void *fit, int noffset);
-int fit_all_image_check_hashes(const void *fit);
+/**
+ * fit_add_verification_data() - Calculate and add hashes to FIT
+ *
+ * @fit:	Fit image to process
+ * @return 0 if ok, <0 for error
+ */
+int fit_add_verification_data(void *fit);
+
+int fit_image_verify(const void *fit, int noffset);
+int fit_all_image_verify(const void *fit);
 int fit_image_check_os(const void *fit, int noffset, uint8_t os);
 int fit_image_check_arch(const void *fit, int noffset, uint8_t arch);
 int fit_image_check_type(const void *fit, int noffset, uint8_t type);
@@ -623,8 +710,28 @@ int fit_conf_get_kernel_node(const void *fit, int noffset);
 int fit_conf_get_ramdisk_node(const void *fit, int noffset);
 int fit_conf_get_fdt_node(const void *fit, int noffset);
 
+/**
+ * fit_conf_get_prop_node() - Get node refered to by a configuration
+ * @fit:	FIT to check
+ * @noffset:	Offset of conf@xxx node to check
+ * @prop_name:	Property to read from the conf node
+ *
+ * The conf@ nodes contain references to other nodes, using properties
+ * like 'kernel = "kernel@1"'. Given such a property name (e.g. "kernel"),
+ * return the offset of the node referred to (e.g. offset of node
+ * "/images/kernel@1".
+ */
+int fit_conf_get_prop_node(const void *fit, int noffset,
+		const char *prop_name);
+
 void fit_conf_print(const void *fit, int noffset, const char *p);
 
+int fit_check_ramdisk(const void *fit, int os_noffset,
+		uint8_t arch, int verify);
+
+int calculate_hash(const void *data, int data_len, const char *algo,
+			uint8_t *value, int *value_len);
+
 #ifndef USE_HOSTCC
 static inline int fit_image_check_target_arch(const void *fdt, int node)
 {
diff --git a/include/libfdt.h b/include/libfdt.h
index fc7f75b9ffa..c5ec2acfd82 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -136,6 +136,28 @@ uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
 
 int fdt_next_node(const void *fdt, int offset, int *depth);
 
+/**
+ * fdt_first_subnode() - get offset of first direct subnode
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of node to check
+ * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
+ */
+int fdt_first_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_next_subnode() - get offset of next direct subnode
+ *
+ * After first calling fdt_first_subnode(), call this function repeatedly to
+ * get direct subnodes of a parent node.
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of previous subnode
+ * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
+ * subnodes
+ */
+int fdt_next_subnode(const void *fdt, int offset);
+
 /**********************************************************************/
 /* General functions                                                  */
 /**********************************************************************/
@@ -582,7 +604,7 @@ const char *fdt_get_alias_namelen(const void *fdt,
  * value of the property named 'name' in the node /aliases.
  *
  * returns:
- *	a pointer to the expansion of the alias named 'name', of it exists
+ *	a pointer to the expansion of the alias named 'name', if it exists
  *	NULL, if the given alias or the /aliases node does not exist
  */
 const char *fdt_get_alias(const void *fdt, const char *name);
@@ -816,6 +838,20 @@ int fdt_node_check_compatible(const void *fdt, int nodeoffset,
 int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
 				  const char *compatible);
 
+/**
+ * fdt_stringlist_contains - check a string list property for a string
+ * @strlist: Property containing a list of strings to check
+ * @listlen: Length of property
+ * @str: String to search for
+ *
+ * This is a utility function provided for convenience. The list contains
+ * one or more strings, each terminated by \0, as is found in a device tree
+ * "compatible" property.
+ *
+ * @return: 1 if the string is found in the list, 0 not found, or invalid list
+ */
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
+
 /**********************************************************************/
 /* Write-in-place functions                                           */
 /**********************************************************************/
diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index 3e3defc76ca..0821258b053 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -35,4 +35,7 @@ typedef __be64 fdt64_t;
 #define fdt64_to_cpu(x)		be64_to_cpu(x)
 #define cpu_to_fdt64(x)		cpu_to_be64(x)
 
+/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
+#define FDT_RAMDISK_OVERHEAD	0x80
+
 #endif /* _LIBFDT_ENV_H */
diff --git a/include/lmb.h b/include/lmb.h
index 5d1f4b624a2..43082a393fd 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -1,7 +1,6 @@
 #ifndef _LINUX_LMB_H
 #define _LINUX_LMB_H
 #ifdef __KERNEL__
-#ifdef CONFIG_LMB
 
 #include <asm/types.h>
 /*
@@ -57,7 +56,6 @@ lmb_size_bytes(struct lmb_region *type, unsigned long region_nr)
 void board_lmb_reserve(struct lmb *lmb);
 void arch_lmb_reserve(struct lmb *lmb);
 
-#endif /* CONFIG_LMB */
 #endif /* __KERNEL__ */
 
 #endif /* _LINUX_LMB_H */
diff --git a/include/mmc.h b/include/mmc.h
index 8bbc6b6ebec..566db59ac9f 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -68,6 +68,7 @@
 #define UNUSABLE_ERR		-17 /* Unusable Card */
 #define COMM_ERR		-18 /* Communications Error */
 #define TIMEOUT			-19
+#define IN_PROGRESS		-20 /* operation is in progress */
 
 #define MMC_CMD_GO_IDLE_STATE		0
 #define MMC_CMD_SEND_OP_COND		1
@@ -270,6 +271,10 @@ struct mmc {
 	int (*getcd)(struct mmc *mmc);
 	int (*getwp)(struct mmc *mmc);
 	uint b_max;
+	char op_cond_pending;	/* 1 if we are waiting on an op_cond command */
+	char init_in_progress;	/* 1 if we have done mmc_start_init() */
+	char preinit;		/* start init as early as possible */
+	uint op_cond_response;	/* the response byte from the last op_cond */
 };
 
 int mmc_register(struct mmc *mmc);
@@ -287,6 +292,31 @@ int mmc_getcd(struct mmc *mmc);
 int mmc_getwp(struct mmc *mmc);
 void spl_mmc_load(void) __noreturn;
 
+/**
+ * Start device initialization and return immediately; it does not block on
+ * polling OCR (operation condition register) status.  Then you should call
+ * mmc_init, which would block on polling OCR status and complete the device
+ * initializatin.
+ *
+ * @param mmc	Pointer to a MMC device struct
+ * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
+ */
+int mmc_start_init(struct mmc *mmc);
+
+/**
+ * Set preinit flag of mmc device.
+ *
+ * This will cause the device to be pre-inited during mmc_initialize(),
+ * which may save boot time if the device is not accessed until later.
+ * Some eMMC devices take 200-300ms to init, but unfortunately they
+ * must be sent a series of commands to even get them to start preparing
+ * for operation.
+ *
+ * @param mmc		Pointer to a MMC device struct
+ * @param preinit	preinit flag value
+ */
+void mmc_set_preinit(struct mmc *mmc, int preinit);
+
 #ifdef CONFIG_GENERIC_MMC
 #define mmc_host_is_spi(mmc)	((mmc)->host_caps & MMC_MODE_SPI)
 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
diff --git a/include/mpc8220.h b/include/mpc8220.h
deleted file mode 100644
index c4900a0f110..00000000000
--- a/include/mpc8220.h
+++ /dev/null
@@ -1,717 +0,0 @@
-/*
- * include/mpc8220.h
- *
- * Prototypes, etc. for the Motorola MPC8220
- * embedded cpu chips
- *
- * 2004 (c) Freescale, Inc.
- * Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __MPC8220_H__
-#define __MPC8220_H__
-
-/* Processor name */
-#if defined(CONFIG_MPC8220)
-#define CPU_ID_STR	    "MPC8220"
-#endif
-
-/* Exception offsets (PowerPC standard) */
-#define EXC_OFF_SYS_RESET   0x0100
-#define _START_OFFSET	EXC_OFF_SYS_RESET
-
-/* Internal memory map */
-/* MPC8220 Internal Register MMAP */
-#define MMAP_MBAR	(CONFIG_SYS_MBAR + 0x00000000) /* chip selects		     */
-#define MMAP_MEMCTL	(CONFIG_SYS_MBAR + 0x00000100) /* sdram controller	     */
-#define MMAP_XLBARB	(CONFIG_SYS_MBAR + 0x00000200) /* xlb arbitration control   */
-#define MMAP_CDM	(CONFIG_SYS_MBAR + 0x00000300) /* clock distribution module */
-#define MMAP_VDOPLL	(CONFIG_SYS_MBAR + 0x00000400) /* video PLL		     */
-#define MMAP_FB		(CONFIG_SYS_MBAR + 0x00000500) /* flex bus controller	     */
-#define MMAP_PCFG	(CONFIG_SYS_MBAR + 0x00000600) /* port config		     */
-#define MMAP_ICTL	(CONFIG_SYS_MBAR + 0x00000700) /* interrupt controller	     */
-#define MMAP_GPTMR	(CONFIG_SYS_MBAR + 0x00000800) /* general purpose timers    */
-#define MMAP_SLTMR	(CONFIG_SYS_MBAR + 0x00000900) /* slice timers		     */
-#define MMAP_GPIO	(CONFIG_SYS_MBAR + 0x00000A00) /* gpio module		     */
-#define MMAP_XCPCI	(CONFIG_SYS_MBAR + 0x00000B00) /* pci controller	     */
-#define MMAP_PCIARB	(CONFIG_SYS_MBAR + 0x00000C00) /* pci arbiter		     */
-#define MMAP_EXTDMA1	(CONFIG_SYS_MBAR + 0x00000D00) /* external dma1	     */
-#define MMAP_EXTDMA2	(CONFIG_SYS_MBAR + 0x00000E00) /* external dma1	     */
-#define MMAP_USBH	(CONFIG_SYS_MBAR + 0x00001000) /* usb host		     */
-#define MMAP_CMTMR	(CONFIG_SYS_MBAR + 0x00007f00) /* comm timers		     */
-#define MMAP_DMA	(CONFIG_SYS_MBAR + 0x00008000) /* dma			     */
-#define MMAP_USBD	(CONFIG_SYS_MBAR + 0x00008200) /* usb device		     */
-#define MMAP_COMMPCI	(CONFIG_SYS_MBAR + 0x00008400) /* pci comm Bus regs	     */
-#define MMAP_1284	(CONFIG_SYS_MBAR + 0x00008500) /* 1284			     */
-#define MMAP_PEV	(CONFIG_SYS_MBAR + 0x00008600) /* print engine video	     */
-#define MMAP_PSC1	(CONFIG_SYS_MBAR + 0x00008800) /* psc1 block		     */
-#define MMAP_I2C	(CONFIG_SYS_MBAR + 0x00008f00) /* i2c controller	     */
-#define MMAP_FEC1	(CONFIG_SYS_MBAR + 0x00009000) /* fast ethernet 1	     */
-#define MMAP_FEC2	(CONFIG_SYS_MBAR + 0x00009800) /* fast ethernet 2	     */
-#define MMAP_JBIGRAM	(CONFIG_SYS_MBAR + 0x0000a000) /* jbig RAM		     */
-#define MMAP_JBIG	(CONFIG_SYS_MBAR + 0x0000c000) /* jbig			     */
-#define MMAP_PDLA	(CONFIG_SYS_MBAR + 0x00010000) /*			     */
-#define MMAP_SRAMCFG	(CONFIG_SYS_MBAR + 0x0001ff00) /* SRAM config		     */
-#define MMAP_SRAM	(CONFIG_SYS_MBAR + 0x00020000) /* SRAM			     */
-
-#define SRAM_SIZE	0x8000			/* 32 KB */
-
-/* ------------------------------------------------------------------------ */
-/*
- * Macro for Programmable Serial Channel
- */
-/* equates for mode reg. 1 for channel	A or B */
-#define PSC_MR1_RX_RTS		0x80000000    /* receiver RTS enabled */
-#define PSC_MR1_RX_INT		0x40000000    /* receiver intrupt enabled */
-#define PSC_MR1_ERR_MODE	0x20000000    /* block error mode */
-#define PSC_MR1_PAR_MODE_MULTI	0x18000000    /* multi_drop mode */
-#define PSC_MR1_NO_PARITY	0x10000000    /* no parity mode */
-#define PSC_MR1_ALWAYS_0	0x08000000    /* force parity mode */
-#define PSC_MR1_ALWAYS_1	0x0c000000    /* force parity mode */
-#define PSC_MR1_EVEN_PARITY	0x00000000    /* parity mode */
-#define PSC_MR1_ODD_PARITY	0x04000000    /* 0 = even, 1 = odd */
-#define PSC_MR1_BITS_CHAR_8	0x03000000    /* 8 bits */
-#define PSC_MR1_BITS_CHAR_7	0x02000000    /* 7 bits */
-#define PSC_MR1_BITS_CHAR_6	0x01000000    /* 6 bits */
-#define PSC_MR1_BITS_CHAR_5	0x00000000    /* 5 bits */
-
-/* equates for mode reg. 2 for channel	A or B */
-#define PSC_MR2_NORMAL_MODE	0x00000000    /* normal channel mode */
-#define PSC_MR2_AUTO_MODE	0x40000000    /* automatic channel mode */
-#define PSC_MR2_LOOPBACK_LOCL	0x80000000    /* local loopback channel mode */
-#define PSC_MR2_LOOPBACK_REMT	0xc0000000    /* remote loopback channel mode */
-#define PSC_MR2_TX_RTS		0x20000000    /* transmitter RTS enabled */
-#define PSC_MR2_TX_CTS		0x10000000    /* transmitter CTS enabled */
-#define PSC_MR2_STOP_BITS_2	0x0f000000    /* 2 stop bits */
-#define PSC_MR2_STOP_BITS_1	0x07000000    /* 1 stop bit */
-
-/* equates for status reg. A or B */
-#define PSC_SR_BREAK		0x80000000    /* received break */
-#define PSC_SR_NEOF		PSC_SR_BREAK  /* Next byte is EOF - MIR/FIR */
-#define PSC_SR_FRAMING		0x40000000    /* framing error */
-#define PSC_SR_PHYERR		PSC_SR_FRAMING/* Physical Layer error - MIR/FIR */
-#define PSC_SR_PARITY		0x20000000    /* parity error */
-#define PSC_SR_CRCERR		PSC_SR_PARITY /* CRC error */
-#define PSC_SR_OVERRUN		0x10000000    /* overrun error */
-#define PSC_SR_TXEMT		0x08000000    /* transmitter empty */
-#define PSC_SR_TXRDY		0x04000000    /* transmitter ready*/
-#define PSC_SR_FFULL		0x02000000    /* fifo full */
-#define PSC_SR_RXRDY		0x01000000    /* receiver ready */
-#define PSC_SR_DEOF		0x00800000    /* Detect EOF or RX-FIFO contain EOF */
-#define PSC_SR_ERR		0x00400000    /* Error Status including FIFO */
-
-/* equates for clock select reg. */
-#define PSC_CSRX16EXT_CLK	0x1110	/* x 16 ext_clock */
-#define PSC_CSRX1EXT_CLK	0x1111	/* x 1 ext_clock  */
-
-/* equates for command reg. A or B */
-#define PSC_CR_NO_COMMAND	0x00000000    /* no command */
-#define PSC_CR_RST_MR_PTR_CMD	0x10000000    /* reset mr pointer command */
-#define PSC_CR_RST_RX_CMD	0x20000000    /* reset receiver command */
-#define PSC_CR_RST_TX_CMD	0x30000000    /* reset transmitter command */
-#define PSC_CR_RST_ERR_STS_CMD	0x40000000    /* reset error status cmnd */
-#define PSC_CR_RST_BRK_INT_CMD	0x50000000    /* reset break int. command */
-#define PSC_CR_STR_BREAK_CMD	0x60000000    /* start break command */
-#define PSC_CR_STP_BREAK_CMD	0x70000000    /* stop break command */
-#define PSC_CR_RX_ENABLE	0x01000000    /* receiver enabled */
-#define PSC_CR_RX_DISABLE	0x02000000    /* receiver disabled */
-#define PSC_CR_TX_ENABLE	0x04000000    /* transmitter enabled */
-#define PSC_CR_TX_DISABLE	0x08000000    /* transmitter disabled */
-
-/* equates for input port change reg. */
-#define PSC_IPCR_SYNC		0x80000000    /* Sync Detect */
-#define PSC_IPCR_D_CTS		0x10000000    /* Delta CTS */
-#define PSC_IPCR_CTS		0x01000000    /* CTS - current state of PSC_CTS */
-
-/* equates for auxiliary control reg. (timer and counter clock selects) */
-#define PSC_ACR_BRG		0x80000000    /* for 68681 compatibility
-						 baud rate gen select
-						 0 = set 1; 1 = set 2
-						 equates are set 2 ONLY */
-#define PSC_ACR_TMR_EXT_CLK_16	0x70000000    /* xtnl clock divided by 16 */
-#define PSC_ACR_TMR_EXT_CLK	0x60000000    /* external clock */
-#define PSC_ACR_TMR_IP2_16	0x50000000    /* ip2 divided by 16 */
-#define PSC_ACR_TMR_IP2		0x40000000    /* ip2 */
-#define PSC_ACR_CTR_EXT_CLK_16	0x30000000    /* xtnl clock divided by 16 */
-#define PSC_ACR_CTR_TXCB	0x20000000    /* channel B xmitr clock */
-#define PSC_ACR_CTR_TXCA	0x10000000    /* channel A xmitr clock */
-#define PSC_ACR_CTR_IP2		0x00000000    /* ip2 */
-#define PSC_ACR_IEC0		0x01000000    /* interrupt enable ctrl for D_CTS */
-
-/* equates for int. status reg. */
-#define PSC_ISR_IPC		0x80000000    /* input port change*/
-#define PSC_ISR_BREAK		0x04000000    /* delta break */
-#define PSC_ISR_RX_RDY		0x02000000    /* receiver rdy /fifo full */
-#define PSC_ISR_TX_RDY		0x01000000    /* transmitter ready */
-#define PSC_ISR_DEOF		0x00800000    /* Detect EOF / RX-FIFO contains EOF */
-#define PSC_ISR_ERR		0x00400000    /* Error Status including FIFO */
-
-/* equates for int. mask reg. */
-#define PSC_IMR_CLEAR		0xff000000    /* Clear the imr */
-#define PSC_IMR_IPC		0x80000000    /* input port change*/
-#define PSC_IMR_BREAK		0x04000000    /* delta break */
-#define PSC_IMR_RX_RDY		0x02000000    /* rcvr ready / fifo full */
-#define PSC_IMR_TX_RDY		0x01000000    /* transmitter ready */
-#define PSC_IMR_DEOF		0x00800000    /* Detect EOF / RX-FIFO contains EOF */
-#define PSC_IMR_ERR		0x00400000    /* Error Status including FIFO */
-
-/* equates for input port reg. */
-#define PSC_IP_LPWRB		0x80000000    /* Low power mode in Ac97 */
-#define PSC_IP_TGL		0x40000000    /* test usage */
-#define PSC_IP_CTS		0x01000000    /* CTS */
-
-/* equates for output port bit set reg. */
-#define PSC_OPSET_RTS		0x01000000    /* Assert PSC_RTS output */
-
-/* equates for output port bit reset reg. */
-#define PSC_OPRESET_RTS		0x01000000    /* Assert PSC_RTS output */
-
-/* equates for rx FIFO number of data reg. */
-#define PSC_RFNUM(x)		((x&0xff)<<24)/* receive count */
-
-/* equates for tx FIFO number of data reg. */
-#define PSC_TFNUM(x)		((x&0xff)<<24)/* receive count */
-
-/* equates for rx FIFO status reg */
-#define PSC_RFSTAT_TAG(x)	((x&3)<<28)   /* tag */
-#define PSC_RFSTAT_FRAME0	0x08	      /* Frame Indicator 0 */
-#define PSC_RFSTAT_FRAME1	0x04	      /* Frame Indicator 1 */
-#define PSC_RFSTAT_FRAME2	0x02	      /* Frame Indicator 2 */
-#define PSC_RFSTAT_FRAME3	0x01	      /* Frame Indicator 3 */
-#define PSC_RFSTAT_FRAME(x)	((x&0x0f)<<24)/* Frame indicator */
-#define PSC_RFSTAT_ERR		0x00400000    /* Fifo err */
-#define PSC_RFSTAT_UF		0x00200000    /* Underflow */
-#define PSC_RFSTAT_OF		0x00100000    /* overflow */
-#define PSC_RFSTAT_FR		0x00080000    /* frame ready */
-#define PSC_RFSTAT_FULL		0x00040000    /* full */
-#define PSC_RFSTAT_ALARM	0x00020000    /* alarm */
-#define PSC_RFSTAT_EMPTY	0x00010000    /* empty */
-
-/* equates for tx FIFO status reg */
-#define PSC_TFSTAT_TAG(x)	((x&3)<<28)   /* tag */
-#define PSC_TFSTAT_FRAME0	0x08	      /* Frame Indicator 0 */
-#define PSC_TFSTAT_FRAME1	0x04	      /* Frame Indicator 1 */
-#define PSC_TFSTAT_FRAME2	0x02	      /* Frame Indicator 2 */
-#define PSC_TFSTAT_FRAME3	0x01	      /* Frame Indicator 3 */
-#define PSC_TFSTAT_FRAME(x)	((x&0x0f)<<24)/* Frame indicator */
-#define PSC_TFSTAT_ERR		0x00400000    /* Fifo err */
-#define PSC_TFSTAT_UF		0x00200000    /* Underflow */
-#define PSC_TFSTAT_OF		0x00100000    /* overflow */
-#define PSC_TFSTAT_FR		0x00080000    /* frame ready */
-#define PSC_TFSTAT_FULL		0x00040000    /* full */
-#define PSC_TFSTAT_ALARM	0x00020000    /* alarm */
-#define PSC_TFSTAT_EMPTY	0x00010000    /* empty */
-
-/* equates for rx FIFO control reg. */
-#define PSC_RFCNTL_WTAG(x)	((x&3)<<29)   /* Write tag */
-#define PSC_RFCNTL_FRAME	0x08000000    /* Frame mode enable */
-#define PSC_RFCNTL_GR(x)	((x&7)<<24)   /* Granularity */
-
-/* equates for tx FIFO control reg. */
-#define PSC_TFCNTL_WTAG(x)	((x&3)<<29)   /* Write tag */
-#define PSC_TFCNTL_FRAME	0x08000000    /* Frame mode enable */
-#define PSC_TFCNTL_GR(x)	((x&7)<<24)   /* Granularity */
-
-/* equates for rx FIFO alarm reg */
-#define PSC_RFALARM(x)		(x&0x1ff)     /* Alarm */
-
-/* equates for tx FIFO alarm reg */
-#define PSC_TFALARM(x)		(x&0x1ff)     /* Alarm */
-
-/* equates for rx FIFO read pointer */
-#define PSC_RFRPTR(x)		(x&0x1ff)     /* read pointer */
-
-/* equates for tx FIFO read pointer */
-#define PSC_TFRPTR(x)		(x&0x1ff)     /* read pointer */
-
-/* equates for rx FIFO write pointer */
-#define PSC_RFWPTR(x)		(x&0x1ff)     /* write pointer */
-
-/* equates for rx FIFO write pointer */
-#define PSC_TFWPTR(x)		(x&0x1ff)     /* write pointer */
-
-/* equates for rx FIFO last read frame pointer reg */
-#define PSC_RFLRFPTR(x)		(x&0x1ff)     /* last read frame pointer */
-
-/* equates for tx FIFO last read frame pointer reg */
-#define PSC_TFLRFPTR(x)		(x&0x1ff)     /* last read frame pointer */
-
-/* equates for rx FIFO last write frame pointer reg */
-#define PSC_RFLWFPTR(x)		(x&0x1ff)     /* last write frame pointer */
-
-/* equates for tx FIFO last write frame pointer reg */
-#define PSC_TFLWFPTR(x)		(x&0x1ff)     /* last write frame pointer */
-
-/* PCI configuration (only for PLL determination)*/
-#define PCI_REG_PCIGSCR		(MMAP_XCPCI + 0x60) /* Global status/control register */
-#define PCI_REG_PCIGSCR_PCI2XLB_CLK_MASK	0x07000000
-#define PCI_REG_PCIGSCR_PCI2XLB_CLK_BIT		24
-
-#define PCI_REG_PCICAR		(MMAP_XCPCI + 0xF8) /* Configuration Address Register */
-
-/* ------------------------------------------------------------------------ */
-/*
- * Macro for General Purpose Timer
- */
-/* Enable and Mode Select */
-#define GPT_OCT(x)	    (x & 0x3)<<4/* Output Compare Type */
-#define GPT_ICT(x)	    (x & 0x3)	/* Input Capture Type */
-#define GPT_CTRL_WDEN	    0x80	/* Watchdog Enable */
-#define GPT_CTRL_CE	    0x10	/* Counter Enable */
-#define GPT_CTRL_STPCNT	    0x04	/* Stop continous */
-#define GPT_CTRL_ODRAIN	    0x02	/* Open Drain */
-#define GPT_CTRL_INTEN	    0x01	/* Interrupt Enable */
-#define GPT_MODE_GPIO(x)    (x & 0x3)<<4/* Gpio Mode Type */
-#define GPT_TMS_ICT	    0x01	/* Input Capture Enable */
-#define GPT_TMS_OCT	    0x02	/* Output Capture Enable */
-#define GPT_TMS_PWM	    0x03	/* PWM Capture Enable */
-#define GPT_TMS_SGPIO	    0x04	/* PWM Capture Enable */
-
-#define GPT_PWM_WIDTH(x)    (x & 0xffff)
-
-/* Status */
-#define GPT_STA_CAPTURE(x)  (x & 0xffff)/* Read of internal counter */
-
-#define GPT_OVFPIN_OVF(x)   (x & 0x70)	/* Internal counter roll over */
-#define GPT_OVFPIN_PIN	    0x01	/* Input pin - Timer 0 and 1 */
-
-#define GPT_INT_TEXP	    0x08	/* Timer Expired in Internal Timer mode */
-#define GPT_INT_PWMP	    0x04	/* PWM end of period occurred */
-#define GPT_INT_COMP	    0x02	/* OC reference event occurred */
-#define GPT_INT_CAPT	    0x01	/* IC reference event occurred */
-
-/* ------------------------------------------------------------------------ */
-/*
- * Port configuration
- */
-#define CONFIG_SYS_FEC1_PORT0_CONFIG	0x00000000
-#define CONFIG_SYS_FEC1_PORT1_CONFIG	0x00000000
-#define CONFIG_SYS_1284_PORT0_CONFIG  0x00000000
-#define CONFIG_SYS_1284_PORT1_CONFIG  0x00000000
-#define CONFIG_SYS_FEC2_PORT2_CONFIG	0x00000000
-#define CONFIG_SYS_PEV_PORT2_CONFIG   0x00000000
-#define CONFIG_SYS_GP0_PORT0_CONFIG   0x00000000
-#define CONFIG_SYS_GP1_PORT2_CONFIG   0xaaaaaac0
-#define CONFIG_SYS_PSC_PORT3_CONFIG   0x00020000
-#define CONFIG_SYS_CS1_PORT3_CONFIG   0x00000000
-#define CONFIG_SYS_CS2_PORT3_CONFIG	0x10000000
-#define CONFIG_SYS_CS3_PORT3_CONFIG	0x40000000
-#define CONFIG_SYS_CS4_PORT3_CONFIG	0x00000400
-#define CONFIG_SYS_CS5_PORT3_CONFIG	0x00000200
-#define CONFIG_SYS_PCI_PORT3_CONFIG   0x01400180
-#define CONFIG_SYS_I2C_PORT3_CONFIG   0x00000000
-#define CONFIG_SYS_GP2_PORT3_CONFIG   0x000200a0
-
-/* ------------------------------------------------------------------------ */
-/*
- * DRAM configuration
- */
-
-/* Field definitions for the control register */
-#define CTL_MODE_ENABLE_SHIFT	    31
-#define CTL_CKE_SHIFT		    30
-#define CTL_DDR_SHIFT		    29
-#define CTL_REFRESH_SHIFT	    28
-#define CTL_ADDRMUX_SHIFT	    24
-#define CTL_PRECHARGE_SHIFT	    23
-#define CTL_DRIVE_RULE_SHIFT	    22
-#define CTL_REFRESH_INTERVAL_SHIFT  16
-#define CTL_DQSOEN_SHIFT	    8
-#define CTL_BUFFERED_SHIFT	    4
-#define CTL_REFRESH_CMD_SHIFT	    2
-#define CTL_PRECHARGE_CMD_SHIFT	    1
-
-#define CTL_MODE_ENABLE		    (1<<CTL_MODE_ENABLE_SHIFT)
-#define CTL_CKE_HIGH		    (1<<CTL_CKE_SHIFT)
-#define CTL_DDR_MODE		    (1<<CTL_DDR_SHIFT)
-#define CTL_REFRESH_ENABLE	    (1<<CTL_REFRESH_SHIFT)
-#define CTL_ADDRMUX(value)	    ((value)<<CTL_ADDRMUX_SHIFT)
-#define CTL_A8PRECHARGE		    (1<<CTL_PRECHARGE_SHIFT)
-#define CTL_REFRESH_INTERVAL(value) ((value)<<CTL_REFRESH_INTERVAL_SHIFT)
-#define CTL_DQSOEN(value)	    ((value)<<CTL_DQSOEN_SHIFT)
-#define CTL_BUFFERED		    (1<<CTL_BUFFERED_SHIFT)
-#define CTL_REFRESH_CMD		    (1<<CTL_REFRESH_CMD_SHIFT)
-#define CTL_PRECHARGE_CMD	    (1<<CTL_PRECHARGE_CMD_SHIFT)
-
-/* Field definitions for config register 1 */
-
-#define CFG1_SRD2RWP_SHIFT	    28
-#define CFG1_SWT2RWP_SHIFT	    24
-#define CFG1_RLATENCY_SHIFT	    20
-#define CFG1_ACT2WR_SHIFT	    16
-#define CFG1_PRE2ACT_SHIFT	    12
-#define CFG1_REF2ACT_SHIFT	    8
-#define CFG1_WLATENCY_SHIFT	    4
-
-#define CFG1_SRD2RWP(value)	    ((value)<<CFG1_SRD2RWP_SHIFT)
-#define CFG1_SWT2RWP(value)	    ((value)<<CFG1_SWT2RWP_SHIFT)
-#define CFG1_RLATENCY(value)	    ((value)<<CFG1_RLATENCY_SHIFT)
-#define CFG1_ACT2WR(value)	    ((value)<<CFG1_ACT2WR_SHIFT)
-#define CFG1_PRE2ACT(value)	    ((value)<<CFG1_PRE2ACT_SHIFT)
-#define CFG1_REF2ACT(value)	    ((value)<<CFG1_REF2ACT_SHIFT)
-#define CFG1_WLATENCY(value)	    ((value)<<CFG1_WLATENCY_SHIFT)
-
-/* Field definitions for config register 2 */
-#define CFG2_BRD2RP_SHIFT	    28
-#define CFG2_BWT2RWP_SHIFT	    24
-#define CFG2_BRD2WT_SHIFT	    20
-#define CFG2_BURSTLEN_SHIFT	    16
-
-#define CFG2_BRD2RP(value)	    ((value)<<CFG2_BRD2RP_SHIFT)
-#define CFG2_BWT2RWP(value)	    ((value)<<CFG2_BWT2RWP_SHIFT)
-#define CFG2_BRD2WT(value)	    ((value)<<CFG2_BRD2WT_SHIFT)
-#define CFG2_BURSTLEN(value)	    ((value)<<CFG2_BURSTLEN_SHIFT)
-
-/* Field definitions for the mode/extended mode register - mode
- * register access
- */
-#define MODE_REG_SHIFT		    30
-#define MODE_OPMODE_SHIFT	    25
-#define MODE_CL_SHIFT		    22
-#define MODE_BT_SHIFT		    21
-#define MODE_BURSTLEN_SHIFT	    18
-#define MODE_CMD_SHIFT		    16
-
-#define MODE_MODE		    0
-#define MODE_OPMODE(value)	    ((value)<<MODE_OPMODE_SHIFT)
-#define MODE_CL(value)		    ((value)<<MODE_CL_SHIFT)
-#define MODE_BT_INTERLEAVED	    (1<<MODE_BT_SHIFT)
-#define MODE_BT_SEQUENTIAL	    (0<<MODE_BT_SHIFT)
-#define MODE_BURSTLEN(value)	    ((value)<<MODE_BURSTLEN_SHIFT)
-#define MODE_CMD		    (1<<MODE_CMD_SHIFT)
-
-#define MODE_BURSTLEN_8		    3
-#define MODE_BURSTLEN_4		    2
-#define MODE_BURSTLEN_2		    1
-
-#define MODE_CL_2		    2
-#define MODE_CL_2p5		    6
-#define MODE_OPMODE_NORMAL	    0
-#define MODE_OPMODE_RESETDLL	    2
-
-
-/* Field definitions for the mode/extended mode register - extended
- * mode register access
- */
-#define MODE_X_DLL_SHIFT	    18 /* DLL enable/disable */
-#define MODE_X_DS_SHIFT		    19 /* Drive strength normal/reduced */
-#define MODE_X_QFC_SHIFT	    20 /* QFC function (whatever that is) */
-#define MODE_X_OPMODE_SHIFT	    21
-
-#define MODE_EXTENDED		    (1<<MODE_REG_SHIFT)
-#define MODE_X_DLL_ENABLE	    0
-#define MODE_X_DLL_DISABLE	    (1<<MODE_X_DLL_SHIFT)
-#define MODE_X_DS_NORMAL	    0
-#define MODE_X_DS_REDUCED	    (1<<MODE_X_DS_SHIFT)
-#define MODE_X_QFC_DISABLED	    0
-#define MODE_X_OPMODE(value)	    ((value)<<MODE_X_OPMODE_SHIFT)
-
-#ifndef __ASSEMBLY__
-/*
- * DMA control/status registers.
- */
-struct mpc8220_dma {
-    u32 taskBar;	/* DMA + 0x00 */
-    u32 currentPointer; /* DMA + 0x04 */
-    u32 endPointer;	/* DMA + 0x08 */
-    u32 variablePointer;/* DMA + 0x0c */
-
-    u8 IntVect1;	/* DMA + 0x10 */
-    u8 IntVect2;	/* DMA + 0x11 */
-    u16 PtdCntrl;	/* DMA + 0x12 */
-
-    u32 IntPend;	/* DMA + 0x14 */
-    u32 IntMask;	/* DMA + 0x18 */
-
-    u16 tcr_0;		/* DMA + 0x1c */
-    u16 tcr_1;		/* DMA + 0x1e */
-    u16 tcr_2;		/* DMA + 0x20 */
-    u16 tcr_3;		/* DMA + 0x22 */
-    u16 tcr_4;		/* DMA + 0x24 */
-    u16 tcr_5;		/* DMA + 0x26 */
-    u16 tcr_6;		/* DMA + 0x28 */
-    u16 tcr_7;		/* DMA + 0x2a */
-    u16 tcr_8;		/* DMA + 0x2c */
-    u16 tcr_9;		/* DMA + 0x2e */
-    u16 tcr_a;		/* DMA + 0x30 */
-    u16 tcr_b;		/* DMA + 0x32 */
-    u16 tcr_c;		/* DMA + 0x34 */
-    u16 tcr_d;		/* DMA + 0x36 */
-    u16 tcr_e;		/* DMA + 0x38 */
-    u16 tcr_f;		/* DMA + 0x3a */
-
-    u8 IPR0;		/* DMA + 0x3c */
-    u8 IPR1;		/* DMA + 0x3d */
-    u8 IPR2;		/* DMA + 0x3e */
-    u8 IPR3;		/* DMA + 0x3f */
-    u8 IPR4;		/* DMA + 0x40 */
-    u8 IPR5;		/* DMA + 0x41 */
-    u8 IPR6;		/* DMA + 0x42 */
-    u8 IPR7;		/* DMA + 0x43 */
-    u8 IPR8;		/* DMA + 0x44 */
-    u8 IPR9;		/* DMA + 0x45 */
-    u8 IPR10;		/* DMA + 0x46 */
-    u8 IPR11;		/* DMA + 0x47 */
-    u8 IPR12;		/* DMA + 0x48 */
-    u8 IPR13;		/* DMA + 0x49 */
-    u8 IPR14;		/* DMA + 0x4a */
-    u8 IPR15;		/* DMA + 0x4b */
-    u8 IPR16;		/* DMA + 0x4c */
-    u8 IPR17;		/* DMA + 0x4d */
-    u8 IPR18;		/* DMA + 0x4e */
-    u8 IPR19;		/* DMA + 0x4f */
-    u8 IPR20;		/* DMA + 0x50 */
-    u8 IPR21;		/* DMA + 0x51 */
-    u8 IPR22;		/* DMA + 0x52 */
-    u8 IPR23;		/* DMA + 0x53 */
-    u8 IPR24;		/* DMA + 0x54 */
-    u8 IPR25;		/* DMA + 0x55 */
-    u8 IPR26;		/* DMA + 0x56 */
-    u8 IPR27;		/* DMA + 0x57 */
-    u8 IPR28;		/* DMA + 0x58 */
-    u8 IPR29;		/* DMA + 0x59 */
-    u8 IPR30;		/* DMA + 0x5a */
-    u8 IPR31;		/* DMA + 0x5b */
-
-    u32 res1;		/* DMA + 0x5c */
-    u32 res2;		/* DMA + 0x60 */
-    u32 res3;		/* DMA + 0x64 */
-    u32 MDEDebug;	/* DMA + 0x68 */
-    u32 ADSDebug;	/* DMA + 0x6c */
-    u32 Value1;		/* DMA + 0x70 */
-    u32 Value2;		/* DMA + 0x74 */
-    u32 Control;	/* DMA + 0x78 */
-    u32 Status;		/* DMA + 0x7c */
-    u32 EU00;		/* DMA + 0x80 */
-    u32 EU01;		/* DMA + 0x84 */
-    u32 EU02;		/* DMA + 0x88 */
-    u32 EU03;		/* DMA + 0x8c */
-    u32 EU04;		/* DMA + 0x90 */
-    u32 EU05;		/* DMA + 0x94 */
-    u32 EU06;		/* DMA + 0x98 */
-    u32 EU07;		/* DMA + 0x9c */
-    u32 EU10;		/* DMA + 0xa0 */
-    u32 EU11;		/* DMA + 0xa4 */
-    u32 EU12;		/* DMA + 0xa8 */
-    u32 EU13;		/* DMA + 0xac */
-    u32 EU14;		/* DMA + 0xb0 */
-    u32 EU15;		/* DMA + 0xb4 */
-    u32 EU16;		/* DMA + 0xb8 */
-    u32 EU17;		/* DMA + 0xbc */
-    u32 EU20;		/* DMA + 0xc0 */
-    u32 EU21;		/* DMA + 0xc4 */
-    u32 EU22;		/* DMA + 0xc8 */
-    u32 EU23;		/* DMA + 0xcc */
-    u32 EU24;		/* DMA + 0xd0 */
-    u32 EU25;		/* DMA + 0xd4 */
-    u32 EU26;		/* DMA + 0xd8 */
-    u32 EU27;		/* DMA + 0xdc */
-    u32 EU30;		/* DMA + 0xe0 */
-    u32 EU31;		/* DMA + 0xe4 */
-    u32 EU32;		/* DMA + 0xe8 */
-    u32 EU33;		/* DMA + 0xec */
-    u32 EU34;		/* DMA + 0xf0 */
-    u32 EU35;		/* DMA + 0xf4 */
-    u32 EU36;		/* DMA + 0xf8 */
-    u32 EU37;		/* DMA + 0xfc */
-};
-
-/*
- * PCI Header Registers
- */
-typedef struct mpc8220_xcpci {
-	u32	dev_ven_id;		/* 0xb00 - device/vendor ID */
-	u32	stat_cmd_reg;		/* 0xb04 - status command register */
-	u32	class_code_rev_id;	/* 0xb08 - class code / revision ID */
-	u32	bist_htyp_lat_cshl;	/* 0xb0c - BIST/HeaderType/Latency/cache line */
-	u32	base0;			/* 0xb10 - base address 0 */
-	u32	base1;			/* 0xb14 - base address 1 */
-	u32	reserved1[4];		/* 0xb18->0xd27 - base address 2 - 5 */
-	u32	cis;			/* 0xb28 - cardBus CIS pointer */
-	u32	sub_sys_ven_id;		/* 0xb2c - sub system ID/ subsystem vendor ID */
-	u32	reserved2;		/* 0xb30 - expansion ROM base address */
-	u32	reserved3;		/* 0xb00 - reserved */
-	u32	reserved4;		/* 0xb00 - reserved */
-	u32	mlat_mgnt_ipl;		/* 0xb3c - MaxLat/MinGnt/ int pin/int line */
-	u32	reserved5[8];
-	/* MPC8220 specific - not accessible in PCI header space externally */
-	u32	glb_stat_ctl;		/* 0xb60 - Global Status Control */
-	u32	target_bar0;		/* 0xb64 - Target Base Address 0 */
-	u32	target_bar1;		/* 0xb68 - Target Base Address 1 */
-	u32	target_ctrl;		/* 0xb6c - Target Control */
-	u32	init_win0;		/* 0xb70 - Initiator Window 0 Base/Translation */
-	u32	init_win1;		/* 0xb74 - Initiator Window 1 Base/Translation */
-	u32	init_win2;		/* 0xb78 - Initiator Window 2 Base/Translation */
-	u32	reserved6;		/* 0xb7c - reserved  */
-	u32	init_win_cfg;		/* 0xb80 */
-	u32	init_ctrl;		/* 0xb84 */
-	u32	init_stat;		/* 0xb88 */
-	u32	reserved7[27];
-	u32	cfg_adr;		/* 0xbf8 */
-	u32	reserved8;
-} mpc8220_xcpci_t;
-
-/* PCI->XLB space translation (MPC8220 target), reg0 can address max 256MB,
-   reg1 - 1GB */
-#define PCI_BASE_ADDR_REG0			0x40000000
-#define PCI_BASE_ADDR_REG1			(CONFIG_SYS_SDRAM_BASE)
-#define PCI_TARGET_BASE_ADDR_REG0		(CONFIG_SYS_MBAR)
-#define PCI_TARGET_BASE_ADDR_REG1		(CONFIG_SYS_SDRAM_BASE)
-#define PCI_TARGET_BASE_ADDR_EN			1<<0
-
-
-/* PCI Global Status/Control Register (PCIGSCR) */
-#define PCI_GLB_STAT_CTRL_PE_SHIFT		29
-#define PCI_GLB_STAT_CTRL_SE_SHIFT		28
-#define PCI_GLB_STAT_CTRL_XLB_TO_PCI_CLK_SHIFT	24
-#define PCI_GLB_STAT_CTRL_XLB_TO_PCI_CLK_MASK	0x7
-#define PCI_GLB_STAT_CTRL_IPG_TO_PCI_CLK_SHIFT	16
-#define PCI_GLB_STAT_CTRL_IPG_TO_PCI_CLK_MASK	0x7
-#define PCI_GLB_STAT_CTRL_PEE_SHIFT		13
-#define PCI_GLB_STAT_CTRL_SEE_SHIFT		12
-#define PCI_GLB_STAT_CTRL_PR_SHIFT		0
-
-#define PCI_GLB_STAT_CTRL_PE			(1<<PCI_GLB_STAT_CTRL_PE_SHIFT)
-#define PCI_GLB_STAT_CTRL_SE			(1<<PCI_GLB_STAT_CTRL_SE_SHIFT)
-#define PCI_GLB_STAT_CTRL_PEE			(1<<PCI_GLB_STAT_CTRL_PEE_SHIFT)
-#define PCI_GLB_STAT_CTRL_SEE			(1<<PCI_GLB_STAT_CTRL_SEE_SHIFT)
-#define PCI_GLB_STAT_CTRL_PR			(1<<PCI_GLB_STAT_CTRL_PR_SHIFT)
-
-/* PCI Target Control Register (PCITCR) */
-#define PCI_TARGET_CTRL_LD_SHIFT		24
-#define PCI_TARGET_CTRL_P_SHIFT			16
-
-#define PCI_TARGET_CTRL_LD			(1<<PCI_TARGET_CTRL_LD_SHIFT)
-#define PCI_TARGET_CTRL_P			(1<<PCI_TARGET_CTRL_P_SHIFT)
-
-/* PCI Initiator Window Configuration Register (PCIIWCR) */
-#define PCI_INIT_WIN_CFG_WIN0_CTRL_IO_SHIFT	27
-#define PCI_INIT_WIN_CFG_WIN0_CTRL_PRC_SHIFT	25
-#define PCI_INIT_WIN_CFG_WIN0_CTRL_PRC_MASK	0x3
-#define PCI_INIT_WIN_CFG_WIN0_CTRL_EN_SHIFT	24
-#define PCI_INIT_WIN_CFG_WIN1_CTRL_IO_SHIFT	19
-#define PCI_INIT_WIN_CFG_WIN1_CTRL_PRC_SHIFT	17
-#define PCI_INIT_WIN_CFG_WIN1_CTRL_PRC_MASK	0x3
-#define PCI_INIT_WIN_CFG_WIN1_CTRL_EN_SHIFT	16
-#define PCI_INIT_WIN_CFG_WIN2_CTRL_IO_SHIFT	11
-#define PCI_INIT_WIN_CFG_WIN2_CTRL_PRC_SHIFT	9
-#define PCI_INIT_WIN_CFG_WIN2_CTRL_PRC_MASK	0x3
-#define PCI_INIT_WIN_CFG_WIN2_CTRL_EN_SHIFT	8
-
-#define PCI_INIT_WIN_CFG_WIN_MEM_READ		0x0
-#define PCI_INIT_WIN_CFG_WIN_MEM_READ_LINE	0x1
-#define PCI_INIT_WIN_CFG_WIN_MEM_READ_MULTIPLE	0x2
-
-#define PCI_INIT_WIN_CFG_WIN0_CTRL_IO		(1<<PCI_INIT_WIN_CFG_WIN0_CTRL_IO_SHIFT)
-#define PCI_INIT_WIN_CFG_WIN0_CTRL_EN		(1<<PCI_INIT_WIN_CFG_WIN0_CTRL_EN_SHIFT)
-#define PCI_INIT_WIN_CFG_WIN1_CTRL_IO		(1<<PCI_INIT_WIN_CFG_WIN1_CTRL_IO_SHIFT)
-#define PCI_INIT_WIN_CFG_WIN1_CTRL_EN		(1<<PCI_INIT_WIN_CFG_WIN1_CTRL_EN_SHIFT)
-#define PCI_INIT_WIN_CFG_WIN2_CTRL_IO		(1<<PCI_INIT_WIN_CFG_WIN2_CTRL_IO_SHIFT)
-#define PCI_INIT_WIN_CFG_WIN2_CTRL_EN		(1<<PCI_INIT_WIN_CFG_WIN2_CTRL_EN_SHIFT)
-
-/* PCI Initiator Control Register (PCIICR) */
-#define PCI_INIT_CTRL_REE_SHIFT			26
-#define PCI_INIT_CTRL_IAE_SHIFT			25
-#define PCI_INIT_CTRL_TAE_SHIFT			24
-#define PCI_INIT_CTRL_MAX_RETRIES_SHIFT		0
-#define PCI_INIT_CTRL_MAX_RETRIES_MASK		0xff
-
-#define PCI_INIT_CTRL_REE			(1<<PCI_INIT_CTRL_REE_SHIFT)
-#define PCI_INIT_CTRL_IAE			(1<<PCI_INIT_CTRL_IAE_SHIFT)
-#define PCI_INIT_CTRL_TAE			(1<<PCI_INIT_CTRL_TAE_SHIFT)
-
-/* PCI Status/Command Register (PCISCR) - PCI Dword 1 */
-#define PCI_STAT_CMD_PE_SHIFT			31
-#define PCI_STAT_CMD_SE_SHIFT			30
-#define PCI_STAT_CMD_MA_SHIFT			29
-#define PCI_STAT_CMD_TR_SHIFT			28
-#define PCI_STAT_CMD_TS_SHIFT			27
-#define PCI_STAT_CMD_DT_SHIFT			25
-#define PCI_STAT_CMD_DT_MASK			0x3
-#define PCI_STAT_CMD_DP_SHIFT			24
-#define PCI_STAT_CMD_FC_SHIFT			23
-#define PCI_STAT_CMD_R_SHIFT			22
-#define PCI_STAT_CMD_66M_SHIFT			21
-#define PCI_STAT_CMD_C_SHIFT			20
-#define PCI_STAT_CMD_F_SHIFT			9
-#define PCI_STAT_CMD_S_SHIFT			8
-#define PCI_STAT_CMD_ST_SHIFT			7
-#define PCI_STAT_CMD_PER_SHIFT			6
-#define PCI_STAT_CMD_V_SHIFT			5
-#define PCI_STAT_CMD_MW_SHIFT			4
-#define PCI_STAT_CMD_SP_SHIFT			3
-#define PCI_STAT_CMD_B_SHIFT			2
-#define PCI_STAT_CMD_M_SHIFT			1
-#define PCI_STAT_CMD_IO_SHIFT			0
-
-#define PCI_STAT_CMD_PE			(1<<PCI_STAT_CMD_PE_SHIFT)
-#define PCI_STAT_CMD_SE			(1<<PCI_STAT_CMD_SE_SHIFT)
-#define PCI_STAT_CMD_MA			(1<<PCI_STAT_CMD_MA_SHIFT)
-#define PCI_STAT_CMD_TR			(1<<PCI_STAT_CMD_TR_SHIFT)
-#define PCI_STAT_CMD_TS			(1<<PCI_STAT_CMD_TS_SHIFT)
-#define PCI_STAT_CMD_DP			(1<<PCI_STAT_CMD_DP_SHIFT)
-#define PCI_STAT_CMD_FC			(1<<PCI_STAT_CMD_FC_SHIFT)
-#define PCI_STAT_CMD_R				(1<<PCI_STAT_CMD_R_SHIFT)
-#define PCI_STAT_CMD_66M			(1<<PCI_STAT_CMD_66M_SHIFT)
-#define PCI_STAT_CMD_C				(1<<PCI_STAT_CMD_C_SHIFT)
-#define PCI_STAT_CMD_F				(1<<PCI_STAT_CMD_F_SHIFT)
-#define PCI_STAT_CMD_S				(1<<PCI_STAT_CMD_S_SHIFT)
-#define PCI_STAT_CMD_ST			(1<<PCI_STAT_CMD_ST_SHIFT)
-#define PCI_STAT_CMD_PER			(1<<PCI_STAT_CMD_PER_SHIFT)
-#define PCI_STAT_CMD_V				(1<<PCI_STAT_CMD_V_SHIFT)
-#define PCI_STAT_CMD_MW			(1<<PCI_STAT_CMD_MW_SHIFT)
-#define PCI_STAT_CMD_SP			(1<<PCI_STAT_CMD_SP_SHIFT)
-#define PCI_STAT_CMD_B				(1<<PCI_STAT_CMD_B_SHIFT)
-#define PCI_STAT_CMD_M				(1<<PCI_STAT_CMD_M_SHIFT)
-#define PCI_STAT_CMD_IO			(1<<PCI_STAT_CMD_IO_SHIFT)
-
-/* PCI Configuration 1 Register (PCICR1) - PCI Dword 3 */
-#define PCI_CFG1_HT_SHIFT			16
-#define PCI_CFG1_HT_MASK			0xff
-#define PCI_CFG1_LT_SHIFT			8
-#define PCI_CFG1_LT_MASK			0xff
-#define PCI_CFG1_CLS_SHIFT			0
-#define PCI_CFG1_CLS_MASK			0xf
-
-/* function prototypes */
-void loadtask(int basetask, int tasks);
-u32 dramSetup(void);
-
-#if defined(CONFIG_PSC_CONSOLE)
-int psc_serial_init (void);
-void psc_serial_putc(const char c);
-void psc_serial_puts (const char *s);
-int psc_serial_getc(void);
-int psc_serial_tstc(void);
-void psc_serial_setbrg(void);
-#endif
-
-#if defined (CONFIG_EXTUART_CONSOLE)
-int ext_serial_init (void);
-void ext_serial_putc(const char c);
-void ext_serial_puts (const char *s);
-int ext_serial_getc(void);
-int ext_serial_tstc(void);
-void ext_serial_setbrg(void);
-#endif
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __MPC8220_H__ */
diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
index 966b5e00cac..b644b91773f 100644
--- a/include/mtd/cfi_flash.h
+++ b/include/mtd/cfi_flash.h
@@ -129,12 +129,16 @@ typedef union {
 } cfiword_t;
 
 /* CFI standard query structure */
+/* The offsets and sizes of this packed structure members correspond
+ * to the actual layout in CFI Flash chips. Some 16- and 32-bit members
+ * are unaligned and must be accessed with explicit unaligned access macros.
+ */
 struct cfi_qry {
 	u8	qry[3];
-	u16	p_id;
-	u16	p_adr;
-	u16	a_id;
-	u16	a_adr;
+	u16	p_id;			/* unaligned */
+	u16	p_adr;			/* unaligned */
+	u16	a_id;			/* unaligned */
+	u16	a_adr;			/* unaligned */
 	u8	vcc_min;
 	u8	vcc_max;
 	u8	vpp_min;
@@ -148,10 +152,10 @@ struct cfi_qry {
 	u8	block_erase_timeout_max;
 	u8	chip_erase_timeout_max;
 	u8	dev_size;
-	u16	interface_desc;
-	u16	max_buf_write_size;
+	u16	interface_desc;		/* aligned */
+	u16	max_buf_write_size;	/* aligned */
 	u8	num_erase_regions;
-	u32	erase_region_info[NUM_ERASE_REGIONS];
+	u32	erase_region_info[NUM_ERASE_REGIONS];	/* unaligned */
 } __attribute__((packed));
 
 struct cfi_pri_hdr {
diff --git a/include/netdev.h b/include/netdev.h
index 516b351ebeb..df454b50c3b 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -77,7 +77,6 @@ int mcdmafec_initialize(bd_t *bis);
 int mcffec_initialize(bd_t *bis);
 int mpc512x_fec_initialize(bd_t *bis);
 int mpc5xxx_fec_initialize(bd_t *bis);
-int mpc8220_fec_initialize(bd_t *bis);
 int mpc82xx_scc_enet_initialize(bd_t *bis);
 int mvgbe_initialize(bd_t *bis);
 int natsemi_initialize(bd_t *bis);
diff --git a/include/phy.h b/include/phy.h
index 7b4ce744e11..75bf3b4728d 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -52,6 +52,7 @@ typedef enum {
 	PHY_INTERFACE_MODE_MII,
 	PHY_INTERFACE_MODE_GMII,
 	PHY_INTERFACE_MODE_SGMII,
+	PHY_INTERFACE_MODE_QSGMII,
 	PHY_INTERFACE_MODE_TBI,
 	PHY_INTERFACE_MODE_RMII,
 	PHY_INTERFACE_MODE_RGMII,
@@ -67,6 +68,7 @@ static const char *phy_interface_strings[] = {
 	[PHY_INTERFACE_MODE_MII]		= "mii",
 	[PHY_INTERFACE_MODE_GMII]		= "gmii",
 	[PHY_INTERFACE_MODE_SGMII]		= "sgmii",
+	[PHY_INTERFACE_MODE_QSGMII]		= "qsgmii",
 	[PHY_INTERFACE_MODE_TBI]		= "tbi",
 	[PHY_INTERFACE_MODE_RMII]		= "rmii",
 	[PHY_INTERFACE_MODE_RGMII]		= "rgmii",
diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl
index 2db4784d3b1..c0f8cc85677 100644
--- a/include/ppc_asm.tmpl
+++ b/include/ppc_asm.tmpl
@@ -175,7 +175,7 @@
 #define IM_IMMR		(IM_REGBASE+0x01a8)
 #define IM_SCCR		(IM_REGBASE+0x0c80)
 
-#elif defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC8220)
+#elif defined(CONFIG_MPC5xxx)
 
 #define HID0_ICE_BITPOS	16
 #define HID0_DCE_BITPOS	17
diff --git a/include/usb.h b/include/usb.h
index d79c8658840..d7b082d9f46 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -76,6 +76,12 @@ struct usb_interface {
 	unsigned char	act_altsetting;
 
 	struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
+	/*
+	 * Super Speed Device will have Super Speed Endpoint
+	 * Companion Descriptor  (section 9.6.7 of usb 3.0 spec)
+	 * Revision 1.0 June 6th 2011
+	 */
+	struct usb_ss_ep_comp_descriptor ss_ep_comp_desc[USB_MAXENDPOINTS];
 } __attribute__ ((packed));
 
 /* Configuration information.. */
diff --git a/include/usb_defs.h b/include/usb_defs.h
index 9502544b21b..4f3601a16c3 100644
--- a/include/usb_defs.h
+++ b/include/usb_defs.h
@@ -150,6 +150,18 @@
 #define USB_REQ_SET_IDLE            0x0A
 #define USB_REQ_SET_PROTOCOL        0x0B
 
+/* Device features */
+#define USB_FEAT_HALT               0x00
+#define USB_FEAT_WAKEUP             0x01
+#define USB_FEAT_TEST               0x02
+
+/* Test modes */
+#define USB_TEST_MODE_J             0x01
+#define USB_TEST_MODE_K             0x02
+#define USB_TEST_MODE_SE0_NAK       0x03
+#define USB_TEST_MODE_PACKET        0x04
+#define USB_TEST_MODE_FORCE_ENABLE  0x05
+
 
 /* "pipe" definitions */
 
@@ -208,6 +220,18 @@
 #define USB_PORT_FEAT_C_SUSPEND      18
 #define USB_PORT_FEAT_C_OVER_CURRENT 19
 #define USB_PORT_FEAT_C_RESET        20
+#define USB_PORT_FEAT_TEST           21
+
+/*
+ * Changes to Port feature numbers for Super speed,
+ * from USB 3.0 spec Table 10-8
+ */
+#define USB_SS_PORT_FEAT_U1_TIMEOUT	23
+#define USB_SS_PORT_FEAT_U2_TIMEOUT	24
+#define USB_SS_PORT_FEAT_C_LINK_STATE	25
+#define USB_SS_PORT_FEAT_C_CONFIG_ERROR	26
+#define USB_SS_PORT_FEAT_BH_RESET	28
+#define USB_SS_PORT_FEAT_C_BH_RESET	29
 
 /* wPortStatus bits */
 #define USB_PORT_STAT_CONNECTION    0x0001
@@ -218,9 +242,19 @@
 #define USB_PORT_STAT_POWER         0x0100
 #define USB_PORT_STAT_LOW_SPEED     0x0200
 #define USB_PORT_STAT_HIGH_SPEED    0x0400	/* support for EHCI */
-#define USB_PORT_STAT_SPEED	\
+#define USB_PORT_STAT_SUPER_SPEED   0x0600	/* faking support to XHCI */
+#define USB_PORT_STAT_SPEED_MASK	\
 	(USB_PORT_STAT_LOW_SPEED | USB_PORT_STAT_HIGH_SPEED)
 
+/*
+ * Changes to wPortStatus bit field in USB 3.0
+ * See USB 3.0 spec Table 10-11
+ */
+#define USB_SS_PORT_STAT_LINK_STATE	0x01e0
+#define USB_SS_PORT_STAT_POWER		0x0200
+#define USB_SS_PORT_STAT_SPEED		0x1c00
+#define USB_SS_PORT_STAT_SPEED_5GBPS	0x0000
+
 /* wPortChange bits */
 #define USB_PORT_STAT_C_CONNECTION  0x0001
 #define USB_PORT_STAT_C_ENABLE      0x0002
@@ -228,13 +262,21 @@
 #define USB_PORT_STAT_C_OVERCURRENT 0x0008
 #define USB_PORT_STAT_C_RESET       0x0010
 
+/*
+ * Changes to wPortChange bit fields in USB 3.0
+ * See USB 3.0 spec Table 10-12
+ */
+#define USB_SS_PORT_STAT_C_BH_RESET	0x0020
+#define USB_SS_PORT_STAT_C_LINK_STATE	0x0040
+#define USB_SS_PORT_STAT_C_CONFIG_ERROR	0x0080
+
 /* wHubCharacteristics (masks) */
 #define HUB_CHAR_LPSM               0x0003
 #define HUB_CHAR_COMPOUND           0x0004
 #define HUB_CHAR_OCPM               0x0018
 
 /*
- *Hub Status & Hub Change bit masks
+ * Hub Status & Hub Change bit masks
  */
 #define HUB_STATUS_LOCAL_POWER	0x0001
 #define HUB_STATUS_OVERCURRENT	0x0002
diff --git a/include/watchdog.h b/include/watchdog.h
index 97ec186be32..d95e4b164d8 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -108,8 +108,7 @@ int init_func_watchdog_reset(void);
 	void reset_4xx_watchdog(void);
 #endif
 
-/* Freescale i.MX */
-#if defined(CONFIG_IMX_WATCHDOG) && !defined(__ASSEMBLY__)
+#if defined(CONFIG_HW_WATCHDOG) && !defined(__ASSEMBLY__)
 	void hw_watchdog_init(void);
 #endif
 #endif /* _WATCHDOG_H_ */
diff --git a/lib/hashtable.c b/lib/hashtable.c
index 6050dd0829f..4cdbc95329c 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -901,6 +901,12 @@ int himport_r(struct hsearch_data *htab,
 		*sp++ = '\0';	/* terminate value */
 		++dp;
 
+		if (*name == 0) {
+			debug("INSERT: unable to use an empty key\n");
+			__set_errno(EINVAL);
+			return 0;
+		}
+
 		/* Skip variables which are not supposed to be processed */
 		if (!drop_var_from_set(name, nvars, localvars))
 			continue;
diff --git a/lib/libfdt/fdt.c b/lib/libfdt/fdt.c
index 387e3544b7e..154e9a44617 100644
--- a/lib/libfdt/fdt.c
+++ b/lib/libfdt/fdt.c
@@ -202,6 +202,34 @@ int fdt_next_node(const void *fdt, int offset, int *depth)
 	return offset;
 }
 
+int fdt_first_subnode(const void *fdt, int offset)
+{
+	int depth = 0;
+
+	offset = fdt_next_node(fdt, offset, &depth);
+	if (offset < 0 || depth != 1)
+		return -FDT_ERR_NOTFOUND;
+
+	return offset;
+}
+
+int fdt_next_subnode(const void *fdt, int offset)
+{
+	int depth = 1;
+
+	/*
+	 * With respect to the parent, the depth of the next subnode will be
+	 * the same as the last.
+	 */
+	do {
+		offset = fdt_next_node(fdt, offset, &depth);
+		if (offset < 0 || depth < 1)
+			return -FDT_ERR_NOTFOUND;
+	} while (depth > 1);
+
+	return offset;
+}
+
 const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
 {
 	int len = strlen(s) + 1;
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 1a461c3e979..b65f4e23ad7 100644
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -519,8 +519,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
 	return offset; /* error from fdt_next_node() */
 }
 
-static int _fdt_stringlist_contains(const char *strlist, int listlen,
-				    const char *str)
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)
 {
 	int len = strlen(str);
 	const char *p;
@@ -546,7 +545,7 @@ int fdt_node_check_compatible(const void *fdt, int nodeoffset,
 	prop = fdt_getprop(fdt, nodeoffset, "compatible", &len);
 	if (!prop)
 		return len;
-	if (_fdt_stringlist_contains(prop, len, compatible))
+	if (fdt_stringlist_contains(prop, len, compatible))
 		return 0;
 	else
 		return 1;
diff --git a/tools/Makefile b/tools/Makefile
index 889c89798d3..26eb50082f7 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -78,6 +78,7 @@ BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
 # Source files which exist outside the tools directory
 EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
 EXT_OBJ_FILES-y += common/image.o
+EXT_OBJ_FILES-$(CONFIG_FIT) += common/image-fit.o
 EXT_OBJ_FILES-y += lib/crc32.o
 EXT_OBJ_FILES-y += lib/md5.o
 EXT_OBJ_FILES-y += lib/sha1.o
@@ -95,6 +96,7 @@ NOPED_OBJ_FILES-y += aisimage.o
 NOPED_OBJ_FILES-y += kwbimage.o
 NOPED_OBJ_FILES-y += pblimage.o
 NOPED_OBJ_FILES-y += imximage.o
+NOPED_OBJ_FILES-y += image-host.o
 NOPED_OBJ_FILES-y += omapimage.o
 NOPED_OBJ_FILES-y += mkenvimage.o
 NOPED_OBJ_FILES-y += mkimage.o
@@ -209,7 +211,9 @@ $(obj)mkimage$(SFX):	$(obj)aisimage.o \
 			$(obj)crc32.o \
 			$(obj)default_image.o \
 			$(obj)fit_image.o \
+			$(obj)image-fit.o \
 			$(obj)image.o \
+			$(obj)image-host.o \
 			$(obj)imximage.o \
 			$(obj)kwbimage.o \
 			$(obj)pblimage.o \
diff --git a/tools/aisimage.c b/tools/aisimage.c
index c645708da59..659df8c0ee7 100644
--- a/tools/aisimage.c
+++ b/tools/aisimage.c
@@ -32,7 +32,6 @@
 #define WORD_ALIGN0	4
 #define WORD_ALIGN(len) (((len)+WORD_ALIGN0-1) & ~(WORD_ALIGN0-1))
 #define MAX_CMD_BUFFER	4096
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
 
 static uint32_t ais_img_size;
 
diff --git a/tools/buildman/control.py b/tools/buildman/control.py
index 8d7b9b54734..4319ce77d31 100644
--- a/tools/buildman/control.py
+++ b/tools/buildman/control.py
@@ -111,6 +111,10 @@ def DoBuildman(options, args):
             print col.Color(col.RED, str)
             sys.exit(1)
         count = gitutil.CountCommitsInBranch(options.git_dir, options.branch)
+        if count is None:
+            str = "Branch '%s' not found or has no upstream" % options.branch
+            print col.Color(col.RED, str)
+            sys.exit(1)
         count += 1   # Build upstream commit also
 
     if not count:
@@ -137,6 +141,11 @@ def DoBuildman(options, args):
     upstream_commit = gitutil.GetUpstream(options.git_dir, options.branch)
     series = patchstream.GetMetaDataForList(upstream_commit, options.git_dir,
             1)
+    # Conflicting tags are not a problem for buildman, since it does not use
+    # them. For example, Series-version is not useful for buildman. On the
+    # other hand conflicting tags will cause an error. So allow later tags
+    # to overwrite earlier ones.
+    series.allow_overwrite = True
     series = patchstream.GetMetaDataForList(range_expr, options.git_dir, None,
             series)
 
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 76bbba125a8..cc123dd37ad 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -47,6 +47,48 @@ static int fit_check_image_types (uint8_t type)
 		return EXIT_FAILURE;
 }
 
+int mmap_fdt(struct mkimage_params *params, const char *fname, void **blobp,
+		struct stat *sbuf)
+{
+	void *ptr;
+	int fd;
+
+	/* Load FIT blob into memory (we need to write hashes/signatures) */
+	fd = open(fname, O_RDWR | O_BINARY);
+
+	if (fd < 0) {
+		fprintf(stderr, "%s: Can't open %s: %s\n",
+			params->cmdname, fname, strerror(errno));
+		unlink(fname);
+		return -1;
+	}
+
+	if (fstat(fd, sbuf) < 0) {
+		fprintf(stderr, "%s: Can't stat %s: %s\n",
+			params->cmdname, fname, strerror(errno));
+		unlink(fname);
+		return -1;
+	}
+
+	ptr = mmap(0, sbuf->st_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
+	if (ptr == MAP_FAILED) {
+		fprintf(stderr, "%s: Can't read %s: %s\n",
+			params->cmdname, fname, strerror(errno));
+		unlink(fname);
+		return -1;
+	}
+
+	/* check if ptr has a valid blob */
+	if (fdt_check_header(ptr)) {
+		fprintf(stderr, "%s: Invalid FIT blob\n", params->cmdname);
+		unlink(fname);
+		return -1;
+	}
+
+	*blobp = ptr;
+	return fd;
+}
+
 /**
  * fit_handle_file - main FIT file processing function
  *
@@ -65,7 +107,7 @@ static int fit_handle_file (struct mkimage_params *params)
 	char cmd[MKIMAGE_MAX_DTC_CMDLINE_LEN];
 	int tfd;
 	struct stat sbuf;
-	unsigned char *ptr;
+	void *ptr;
 
 	/* Flattened Image Tree (FIT) format  handling */
 	debug ("FIT format handling\n");
@@ -87,57 +129,25 @@ static int fit_handle_file (struct mkimage_params *params)
 	if (system (cmd) == -1) {
 		fprintf (stderr, "%s: system(%s) failed: %s\n",
 				params->cmdname, cmd, strerror(errno));
-		unlink (tmpfile);
-		return (EXIT_FAILURE);
-	}
-
-	/* load FIT blob into memory */
-	tfd = open (tmpfile, O_RDWR|O_BINARY);
-
-	if (tfd < 0) {
-		fprintf (stderr, "%s: Can't open %s: %s\n",
-				params->cmdname, tmpfile, strerror(errno));
-		unlink (tmpfile);
-		return (EXIT_FAILURE);
-	}
-
-	if (fstat (tfd, &sbuf) < 0) {
-		fprintf (stderr, "%s: Can't stat %s: %s\n",
-				params->cmdname, tmpfile, strerror(errno));
-		unlink (tmpfile);
-		return (EXIT_FAILURE);
-	}
-
-	ptr = mmap (0, sbuf.st_size, PROT_READ|PROT_WRITE, MAP_SHARED,
-				tfd, 0);
-	if (ptr == MAP_FAILED) {
-		fprintf (stderr, "%s: Can't read %s: %s\n",
-				params->cmdname, tmpfile, strerror(errno));
-		unlink (tmpfile);
-		return (EXIT_FAILURE);
+		goto err_system;
 	}
 
-	/* check if ptr has a valid blob */
-	if (fdt_check_header (ptr)) {
-		fprintf (stderr, "%s: Invalid FIT blob\n", params->cmdname);
-		unlink (tmpfile);
-		return (EXIT_FAILURE);
-	}
+	tfd = mmap_fdt(params, tmpfile, &ptr, &sbuf);
+	if (tfd < 0)
+		goto err_mmap;
 
 	/* set hashes for images in the blob */
-	if (fit_set_hashes (ptr)) {
+	if (fit_add_verification_data(ptr)) {
 		fprintf (stderr, "%s Can't add hashes to FIT blob",
 				params->cmdname);
-		unlink (tmpfile);
-		return (EXIT_FAILURE);
+		goto err_add_hashes;
 	}
 
 	/* add a timestamp at offset 0 i.e., root  */
 	if (fit_set_timestamp (ptr, 0, sbuf.st_mtime)) {
 		fprintf (stderr, "%s: Can't add image timestamp\n",
 				params->cmdname);
-		unlink (tmpfile);
-		return (EXIT_FAILURE);
+		goto err_add_timestamp;
 	}
 	debug ("Added timestamp successfully\n");
 
@@ -153,6 +163,14 @@ static int fit_handle_file (struct mkimage_params *params)
 		return (EXIT_FAILURE);
 	}
 	return (EXIT_SUCCESS);
+
+err_add_timestamp:
+err_add_hashes:
+	munmap(ptr, sbuf.st_size);
+err_mmap:
+err_system:
+	unlink(tmpfile);
+	return -1;
 }
 
 static int fit_check_params (struct mkimage_params *params)
diff --git a/tools/image-host.c b/tools/image-host.c
new file mode 100644
index 00000000000..d944d0ff4e3
--- /dev/null
+++ b/tools/image-host.c
@@ -0,0 +1,208 @@
+/*
+ * Copyright (c) 2013, Google Inc.
+ *
+ * (C) Copyright 2008 Semihalf
+ *
+ * (C) Copyright 2000-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include "mkimage.h"
+#include <bootstage.h>
+#include <image.h>
+#include <sha1.h>
+#include <time.h>
+#include <u-boot/crc.h>
+#include <u-boot/md5.h>
+
+/**
+ * fit_set_hash_value - set hash value in requested has node
+ * @fit: pointer to the FIT format image header
+ * @noffset: hash node offset
+ * @value: hash value to be set
+ * @value_len: hash value length
+ *
+ * fit_set_hash_value() attempts to set hash value in a node at offset
+ * given and returns operation status to the caller.
+ *
+ * returns
+ *     0, on success
+ *     -1, on failure
+ */
+static int fit_set_hash_value(void *fit, int noffset, uint8_t *value,
+				int value_len)
+{
+	int ret;
+
+	ret = fdt_setprop(fit, noffset, FIT_VALUE_PROP, value, value_len);
+	if (ret) {
+		printf("Can't set hash '%s' property for '%s' node(%s)\n",
+		       FIT_VALUE_PROP, fit_get_name(fit, noffset, NULL),
+		       fdt_strerror(ret));
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * fit_image_process_hash - Process a single subnode of the images/ node
+ *
+ * Check each subnode and process accordingly. For hash nodes we generate
+ * a hash of the supplised data and store it in the node.
+ *
+ * @fit:	pointer to the FIT format image header
+ * @image_name:	name of image being processes (used to display errors)
+ * @noffset:	subnode offset
+ * @data:	data to process
+ * @size:	size of data in bytes
+ * @return 0 if ok, -1 on error
+ */
+static int fit_image_process_hash(void *fit, const char *image_name,
+		int noffset, const void *data, size_t size)
+{
+	uint8_t value[FIT_MAX_HASH_LEN];
+	const char *node_name;
+	int value_len;
+	char *algo;
+
+	node_name = fit_get_name(fit, noffset, NULL);
+
+	if (fit_image_hash_get_algo(fit, noffset, &algo)) {
+		printf("Can't get hash algo property for '%s' hash node in '%s' image node\n",
+		       node_name, image_name);
+		return -1;
+	}
+
+	if (calculate_hash(data, size, algo, value, &value_len)) {
+		printf("Unsupported hash algorithm (%s) for '%s' hash node in '%s' image node\n",
+		       algo, node_name, image_name);
+		return -1;
+	}
+
+	if (fit_set_hash_value(fit, noffset, value, value_len)) {
+		printf("Can't set hash value for '%s' hash node in '%s' image node\n",
+		       node_name, image_name);
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * fit_image_add_verification_data() - calculate/set hash data for image node
+ *
+ * This adds hash values for a component image node.
+ *
+ * All existing hash subnodes are checked, if algorithm property is set to
+ * one of the supported hash algorithms, hash value is computed and
+ * corresponding hash node property is set, for example:
+ *
+ * Input component image node structure:
+ *
+ * o image@1 (at image_noffset)
+ *   | - data = [binary data]
+ *   o hash@1
+ *     |- algo = "sha1"
+ *
+ * Output component image node structure:
+ *
+ * o image@1 (at image_noffset)
+ *   | - data = [binary data]
+ *   o hash@1
+ *     |- algo = "sha1"
+ *     |- value = sha1(data)
+ *
+ * For signature details, please see doc/uImage.FIT/signature.txt
+ *
+ * @fit:	Pointer to the FIT format image header
+ * @image_noffset: Requested component image node
+ * @return: 0 on success, <0 on failure
+ */
+int fit_image_add_verification_data(void *fit, int image_noffset)
+{
+	const char *image_name;
+	const void *data;
+	size_t size;
+	int noffset;
+
+	/* Get image data and data length */
+	if (fit_image_get_data(fit, image_noffset, &data, &size)) {
+		printf("Can't get image data/size\n");
+		return -1;
+	}
+
+	image_name = fit_get_name(fit, image_noffset, NULL);
+
+	/* Process all hash subnodes of the component image node */
+	for (noffset = fdt_first_subnode(fit, image_noffset);
+	     noffset >= 0;
+	     noffset = fdt_next_subnode(fit, noffset)) {
+		const char *node_name;
+		int ret = 0;
+
+		/*
+		 * Check subnode name, must be equal to "hash" or "signature".
+		 * Multiple hash nodes require unique unit node
+		 * names, e.g. hash@1, hash@2, signature@1, etc.
+		 */
+		node_name = fit_get_name(fit, noffset, NULL);
+		if (!strncmp(node_name, FIT_HASH_NODENAME,
+			     strlen(FIT_HASH_NODENAME))) {
+			ret = fit_image_process_hash(fit, image_name, noffset,
+						data, size);
+		}
+		if (ret)
+			return -1;
+	}
+
+	return 0;
+}
+
+int fit_add_verification_data(void *fit)
+{
+	int images_noffset;
+	int noffset;
+	int ret;
+
+	/* Find images parent node offset */
+	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images_noffset < 0) {
+		printf("Can't find images parent node '%s' (%s)\n",
+		       FIT_IMAGES_PATH, fdt_strerror(images_noffset));
+		return images_noffset;
+	}
+
+	/* Process its subnodes, print out component images details */
+	for (noffset = fdt_first_subnode(fit, images_noffset);
+	     noffset >= 0;
+	     noffset = fdt_next_subnode(fit, noffset)) {
+		/*
+		 * Direct child node of the images parent node,
+		 * i.e. component image node.
+		 */
+		ret = fit_image_add_verification_data(fit, noffset);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
diff --git a/tools/mkimage.h b/tools/mkimage.h
index ea45f5c8349..e07a6157ebc 100644
--- a/tools/mkimage.h
+++ b/tools/mkimage.h
@@ -42,6 +42,8 @@
 #define debug(fmt,args...)
 #endif /* MKIMAGE_DEBUG */
 
+#define ARRAY_SIZE(x)		(sizeof(x) / sizeof((x)[0]))
+
 #define MKIMAGE_TMPFILE_SUFFIX		".tmp"
 #define MKIMAGE_MAX_TMPFILE_LEN		256
 #define MKIMAGE_DEFAULT_DTC_OPTIONS	"-I dts -O dtb -p 500"
diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index e31da1548dc..b7f67395521 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -56,10 +56,14 @@ def GetUpstream(git_dir, branch):
     Returns:
         Name of upstream branch (e.g. 'upstream/master') or None if none
     """
-    remote = command.OutputOneLine('git', '--git-dir', git_dir, 'config',
-            'branch.%s.remote' % branch)
-    merge = command.OutputOneLine('git', '--git-dir', git_dir, 'config',
-            'branch.%s.merge' % branch)
+    try:
+        remote = command.OutputOneLine('git', '--git-dir', git_dir, 'config',
+                                       'branch.%s.remote' % branch)
+        merge = command.OutputOneLine('git', '--git-dir', git_dir, 'config',
+                                      'branch.%s.merge' % branch)
+    except:
+        return None
+
     if remote == '.':
         return merge
     elif remote and merge:
@@ -78,9 +82,11 @@ def GetRangeInBranch(git_dir, branch, include_upstream=False):
         branch: Name of branch
     Return:
         Expression in the form 'upstream..branch' which can be used to
-        access the commits.
+        access the commits. If the branch does not exist, returns None.
     """
     upstream = GetUpstream(git_dir, branch)
+    if not upstream:
+        return None
     return '%s%s..%s' % (upstream, '~' if include_upstream else '', branch)
 
 def CountCommitsInBranch(git_dir, branch, include_upstream=False):
@@ -90,9 +96,12 @@ def CountCommitsInBranch(git_dir, branch, include_upstream=False):
         git_dir: Directory containing git repo
         branch: Name of branch
     Return:
-        Number of patches that exist on top of the branch
+        Number of patches that exist on top of the branch, or None if the
+        branch does not exist.
     """
     range_expr = GetRangeInBranch(git_dir, branch, include_upstream)
+    if not range_expr:
+        return None
     pipe = [['git', '--git-dir', git_dir, 'log', '--oneline', '--no-decorate',
              range_expr],
             ['wc', '-l']]
diff --git a/tools/patman/patman.py b/tools/patman/patman.py
index a8061a93721..7a317c5c25d 100755
--- a/tools/patman/patman.py
+++ b/tools/patman/patman.py
@@ -1,4 +1,4 @@
-#!/usr/bin/python
+#!/usr/bin/env python
 #
 # Copyright (c) 2011 The Chromium OS Authors.
 #
diff --git a/tools/patman/series.py b/tools/patman/series.py
index 783b3dd1338..85ed31688a1 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -40,6 +40,7 @@ class Series(dict):
         notes: List of lines in the notes
         changes: (dict) List of changes for each version, The key is
             the integer version number
+        allow_overwrite: Allow tags to overwrite an existing tag
     """
     def __init__(self):
         self.cc = []
@@ -49,6 +50,7 @@ class Series(dict):
         self.cover = None
         self.notes = []
         self.changes = {}
+        self.allow_overwrite = False
 
         # Written in MakeCcFile()
         #  key: name of patch file
@@ -72,7 +74,7 @@ class Series(dict):
         """
         # If we already have it, then add to our list
         name = name.replace('-', '_')
-        if name in self:
+        if name in self and not self.allow_overwrite:
             values = value.split(',')
             values = [str.strip() for str in values]
             if type(self[name]) != type([]):