summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMax Krummenacher <max.krummenacher@toradex.com>2021-10-18 14:51:45 +0200
committerAndrejs Cainikovs <andrejs.cainikovs@toradex.com>2023-03-07 16:25:25 +0100
commit2cfe1f256d8343067d61227c36ac0dd81eeb587f (patch)
treef3934dade5453b6b939392bb0537f0a4016f017e
parentcabe533b45d17e2bee8a2d148d14f61814e08bda (diff)
colibri-imx8x: extract is_imx8dx() from ram detection
Refactor the detection of QXP vs. DX SoC into its own helper function. Upstream-Status: Submitted [https://lore.kernel.org/all/20230303132642.15574-8-andrejs.cainikovs@toradex.com/] Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
-rw-r--r--board/toradex/colibri-imx8x/colibri-imx8x.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
index 169d4d04b1..88eddbddae 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -40,21 +40,25 @@ static void setup_iomux_uart(void)
imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
}
-void board_mem_get_layout(u64 *phys_sdram_1_start,
- u64 *phys_sdram_1_size,
- u64 *phys_sdram_2_start,
- u64 *phys_sdram_2_size)
+static int is_imx8dx(void)
{
- u32 is_dualx = 0, val = 0;
- sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val);
+ u32 val = 0;
+ sc_err_t sc_err = sc_misc_otp_fuse_read(-1, 6, &val);
- if (scierr == SC_ERR_NONE) {
+ if (sc_err == SC_ERR_NONE) {
/* DX has two A35 cores disabled */
- is_dualx = (val & 0xf) != 0x0;
+ return (val & 0xf) != 0x0;
}
+ return false;
+}
+void board_mem_get_layout(u64 *phys_sdram_1_start,
+ u64 *phys_sdram_1_size,
+ u64 *phys_sdram_2_start,
+ u64 *phys_sdram_2_size)
+{
*phys_sdram_1_start = PHYS_SDRAM_1;
- if (is_dualx)
+ if (is_imx8dx())
/* Our DX based SKUs only have 1 GB RAM */
*phys_sdram_1_size = SZ_1G;
else