diff options
author | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2021-07-16 10:10:55 +0200 |
---|---|---|
committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2021-08-16 09:33:43 +0200 |
commit | 28e5acef72fb04cd7a2f9ecb63894b603a65b8b5 (patch) | |
tree | fd11ac5e653e6f8b7cd4b365fc5e9944a2a1edf0 | |
parent | fdc4fda33051bcb9eb782001afe2bdd3c0d09eae (diff) |
clk: stm32mp1: add support of BSEC clock
Add the support of the BSEC clock used by the STM32MP misc driver
since the commit 622c956cada0 ("stm32mp: bsec: manage clock when present
in device tree") even if this clock is not yet defined in kernel device
tree stm32mp151.dtsi.
This patch avoids issue for basic boot when this secure clock are not
provided by secure world with SCMI.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
-rw-r--r-- | drivers/clk/clk_stm32mp1.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index da95b1ac2f2..114192bb321 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -560,6 +560,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5), + STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 16, BSEC, _UNKNOWN_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 20, STGEN_K, _STGEN_SEL), STM32MP1_CLK_SET_CLR_F(RCC_MP_AHB2ENSETR, 5, ADC12, _HCLK2), |