diff options
| author | Patrice Chotard <patrice.chotard@st.com> | 2018-01-18 14:10:05 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-28 09:39:15 -0500 |
| commit | 20fe38e75abcf67488b88dd04d3febf13c9d0715 (patch) | |
| tree | 3464baa7bb585da850cb900b37bd23441bb605d1 | |
| parent | 68a69ed2a41551063f012e1ef5f18f2eb4d07f34 (diff) | |
clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()
Move SYSCFG clock setup into configure_clocks() instead of calling
clock_setup() from board file.
As this clock is only needed in case of ethernet enabled and as
both stm32f4 and stm32f7 are using the Designware ethernet IP,
we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed.
Move the RMII setup from board_early_init_f() to board_init()
to insure that RMII bit is set only when clock driver is initialized.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| -rw-r--r-- | arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 1 | ||||
| -rw-r--r-- | board/st/stm32f746-disco/stm32f746-disco.c | 19 | ||||
| -rw-r--r-- | drivers/clk/clk_stm32f.c | 12 |
3 files changed, 12 insertions, 20 deletions
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h index 13f9c9be1c..7b8f66a034 100644 --- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h +++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h @@ -21,7 +21,6 @@ enum periph_id { }; enum periph_clock { - SYSCFG_CLOCK_CFG, TIMER2_CLOCK_CFG, }; diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c index 58a5ef04c4..8da70281f9 100644 --- a/board/st/stm32f746-disco/stm32f746-disco.c +++ b/board/st/stm32f746-disco/stm32f746-disco.c @@ -69,23 +69,10 @@ int dram_init_banksize(void) return 0; } -#ifdef CONFIG_ETH_DESIGNWARE -static int stmmac_setup(void) -{ - clock_setup(SYSCFG_CLOCK_CFG); - /* Set >RMII mode */ - STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL; - - return 0; -} - int board_early_init_f(void) { - stmmac_setup(); - return 0; } -#endif #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_OS_BOOT @@ -162,5 +149,11 @@ int board_late_init(void) int board_init(void) { gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; + +#ifdef CONFIG_ETH_DESIGNWARE + /* Set >RMII mode */ + STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL; +#endif + return 0; } diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c index 2187be8cc8..8d0f9d4266 100644 --- a/drivers/clk/clk_stm32f.c +++ b/drivers/clk/clk_stm32f.c @@ -67,8 +67,6 @@ #define RCC_DCKCFGRX_SDMMC1SEL BIT(28) #define RCC_DCKCFGR2_SDMMC2SEL BIT(29) -#define RCC_APB2ENR_SAI1EN BIT(22) - /* * RCC AHB1ENR specific definitions */ @@ -86,9 +84,9 @@ * RCC APB2ENR specific definitions */ #define RCC_APB2ENR_SYSCFGEN BIT(14) +#define RCC_APB2ENR_SAI1EN BIT(22) enum periph_clock { - SYSCFG_CLOCK_CFG, TIMER2_CLOCK_CFG, }; @@ -226,6 +224,11 @@ static int configure_clocks(struct udevice *dev) /* gate the SAI clock, needed for MMC 1&2 clocks */ setbits_le32(®s->apb2enr, RCC_APB2ENR_SAI1EN); +#ifdef CONFIG_ETH_DESIGNWARE + /* gate the SYSCFG clock, needed to set RMII ethernet interface */ + setbits_le32(®s->apb2enr, RCC_APB2ENR_SYSCFGEN); +#endif + return 0; } @@ -351,9 +354,6 @@ static int stm32_clk_enable(struct clk *clk) void clock_setup(int peripheral) { switch (peripheral) { - case SYSCFG_CLOCK_CFG: - setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_SYSCFGEN); - break; case TIMER2_CLOCK_CFG: setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN); break; |