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authorGabe Black <gabeblack@chromium.org>2011-10-05 03:32:43 -0700
committerGabe Black (Do Not Use) <gabeblack@google.com>2011-10-06 02:46:20 -0700
commit12275b8f02a482d0bc8477a0f53363204e6c4afd (patch)
tree1d175b25b4ebb43335daca389fce38131b76b00b
parent0da36642921b0000a6e8555c00f7d3f47a339107 (diff)
Revert "Add support for a bios-base device tree/flashmap setting"
This reverts commit 8e93aec313c2807704b14fbd21123a9ffc86a087. The bios-base setting has been deprecated. BUG=None TEST=Built and booted on Stumpy. Change-Id: I792761ac44763b06bf1d3abb4db8e9e1a3f113c5 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/8823 Reviewed-by: Stefan Reinauer <reinauer@google.com>
-rw-r--r--common/cmd_vbexport_test.c2
-rw-r--r--common/cmd_vboot_test.c2
-rw-r--r--common/cmd_vboot_twostop.c2
-rw-r--r--include/chromeos/firmware_storage.h5
-rw-r--r--include/chromeos/fmap.h2
-rw-r--r--lib/chromeos/fdt_decode.c26
-rw-r--r--lib/chromeos/firmware_storage_spi.c10
7 files changed, 13 insertions, 36 deletions
diff --git a/common/cmd_vbexport_test.c b/common/cmd_vbexport_test.c
index 6a63f11091..c267e12f47 100644
--- a/common/cmd_vbexport_test.c
+++ b/common/cmd_vbexport_test.c
@@ -418,7 +418,7 @@ static uint8_t *read_gbb_from_firmware(void)
}
/* Open firmware storage device. */
- if (firmware_storage_open_spi(&file, fmap.firmware_base)) {
+ if (firmware_storage_open_spi(&file)) {
VbExDebug("Failed to open firmware device!\n");
return NULL;
}
diff --git a/common/cmd_vboot_test.c b/common/cmd_vboot_test.c
index 5682134f7e..8521a62e03 100644
--- a/common/cmd_vboot_test.c
+++ b/common/cmd_vboot_test.c
@@ -61,7 +61,7 @@ static int do_vboot_test_fwrw(cmd_tbl_t *cmdtp,
target_buf[i] = i & 0xff;
/* Open firmware storage device. */
- if (firmware_storage_open_spi(&file, 0)) {
+ if (firmware_storage_open_spi(&file)) {
VbExDebug("Failed to open firmware device!\n");
return 1;
}
diff --git a/common/cmd_vboot_twostop.c b/common/cmd_vboot_twostop.c
index 0088e72fef..d56b627141 100644
--- a/common/cmd_vboot_twostop.c
+++ b/common/cmd_vboot_twostop.c
@@ -467,7 +467,7 @@ twostop_init(struct twostop_fmap *fmap, firmware_storage_t *file,
dump_fmap(fmap);
/* We revert the decision of using firmware_storage_open_twostop() */
- if (firmware_storage_open_spi(file, fmap->firmware_base)) {
+ if (firmware_storage_open_spi(file)) {
VBDEBUG(PREFIX "failed to open firmware storage\n");
return -1;
}
diff --git a/include/chromeos/firmware_storage.h b/include/chromeos/firmware_storage.h
index 5f13bb36bd..2ef6e2b034 100644
--- a/include/chromeos/firmware_storage.h
+++ b/include/chromeos/firmware_storage.h
@@ -26,8 +26,6 @@
* @return 0 if it succeeds, non-zero if it fails
*/
typedef struct firmware_storage_t {
- /* The offset of the firmware image inside the ROM. */
- uint32_t firmware_base;
int (*read)(struct firmware_storage_t *file,
uint32_t offset, uint32_t count, void *buf);
int (*write)(struct firmware_storage_t *file,
@@ -41,10 +39,9 @@ typedef struct firmware_storage_t {
* This opens SPI flash device
*
* @param file - the opened SPI flash device
- * @param firmware_base - the offset of the firmware in the ROM
* @return 0 if it succeeds, non-zero if it fails
*/
-int firmware_storage_open_spi(firmware_storage_t *file, uint64_t firmware_base);
+int firmware_storage_open_spi(firmware_storage_t *file);
int firmware_storage_open_twostop(firmware_storage_t *file,
struct twostop_fmap *fmap);
diff --git a/include/chromeos/fmap.h b/include/chromeos/fmap.h
index 3c9db3e604..13eb3d80bb 100644
--- a/include/chromeos/fmap.h
+++ b/include/chromeos/fmap.h
@@ -40,8 +40,6 @@ struct twostop_fmap {
struct fmap_firmware_entry readwrite_a;
struct fmap_firmware_entry readwrite_b;
-
- uint64_t firmware_base;
};
void dump_fmap(struct twostop_fmap *config);
diff --git a/lib/chromeos/fdt_decode.c b/lib/chromeos/fdt_decode.c
index 203b10605e..5c93dcdf89 100644
--- a/lib/chromeos/fdt_decode.c
+++ b/lib/chromeos/fdt_decode.c
@@ -72,29 +72,23 @@ static int decode_fmap_entry(const void *blob, int offset, const char *base,
return 0;
}
-static int decode_int_property(const void *blob, int offset, const char *name,
+static int decode_block_lba(const void *blob, int offset, const char *path,
uint64_t *out)
{
int length;
uint32_t *property;
- property = (uint32_t *)fdt_getprop(blob, offset, name, &length);
- if (!property || length < 1) {
- VBDEBUG(PREFIX "failed to load int %s\n", name);
- return -FDT_ERR_MISSING;
- }
- *out = fdt32_to_cpu(*property);
- return 0;
-}
-
-static int decode_block_lba(const void *blob, int offset, const char *path,
- uint64_t *out)
-{
offset = relpath_offset(blob, offset, path);
if (offset < 0)
return offset;
- return decode_int_property(blob, offset, "block-lba", out);
+ property = (uint32_t *)fdt_getprop(blob, offset, "block-lba", &length);
+ if (!property) {
+ VBDEBUG(PREFIX "failed to load LBA '%s/block-lba'\n", path);
+ return -FDT_ERR_MISSING;
+ }
+ *out = fdt32_to_cpu(*property);
+ return 0;
}
int decode_firmware_entry(const char *blob, int fmap_offset, const char *name,
@@ -122,10 +116,6 @@ int fdt_decode_twostop_fmap(const void *blob, struct twostop_fmap *config)
VBDEBUG(PREFIX "chromeos,flashmap node is missing\n");
return fmap_offset;
}
- if (decode_int_property(blob, fmap_offset, "bios-base",
- &config->firmware_base)) {
- config->firmware_base = 0;
- }
err = decode_firmware_entry(blob, fmap_offset, "rw-a",
&config->readwrite_a);
err |= decode_firmware_entry(blob, fmap_offset, "rw-b",
diff --git a/lib/chromeos/firmware_storage_spi.c b/lib/chromeos/firmware_storage_spi.c
index e1a34c0cbc..26e01046db 100644
--- a/lib/chromeos/firmware_storage_spi.c
+++ b/lib/chromeos/firmware_storage_spi.c
@@ -11,7 +11,6 @@
/* Implementation of firmware storage access interface for SPI */
#include <common.h>
-#include <libfdt.h>
#include <malloc.h>
#include <spi_flash.h>
#include <chromeos/common.h>
@@ -26,8 +25,6 @@
# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
#endif
-DECLARE_GLOBAL_DATA_PTR;
-
/*
* Check the right-exclusive range [offset:offset+*count_ptr), and adjust
* value pointed by <count_ptr> to form a valid range when needed.
@@ -55,8 +52,6 @@ static int read_spi(firmware_storage_t *file, uint32_t offset, uint32_t count,
{
struct spi_flash *flash = file->context;
- offset += file->firmware_base;
-
if (border_check(flash, offset, count))
return -1;
@@ -113,8 +108,6 @@ static int write_spi(firmware_storage_t *file, uint32_t offset, uint32_t count,
uint32_t k, n;
int status, ret = -1;
- offset += file->firmware_base;
-
/* We will erase <n> bytes starting from <k> */
k = offset;
n = count;
@@ -166,7 +159,7 @@ static int close_spi(firmware_storage_t *file)
return 0;
}
-int firmware_storage_open_spi(firmware_storage_t *file, uint64_t firmware_base)
+int firmware_storage_open_spi(firmware_storage_t *file)
{
const unsigned int bus = 0;
const unsigned int cs = 0;
@@ -179,7 +172,6 @@ int firmware_storage_open_spi(firmware_storage_t *file, uint64_t firmware_base)
return -1;
}
- file->firmware_base = firmware_base;
file->read = read_spi;
file->write = write_spi;
file->close = close_spi;