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authorKever Yang <kever.yang@rock-chips.com>2018-12-28 09:56:48 +0800
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2019-01-02 21:15:59 +0100
commit3119ecc4accceb99cf931683567cc26148b7f99c (patch)
treea511d480f21fab91212e595d0f89ae910979d363
parentf97c49d6a2f504d0f0a8aab37c67aa314e006250 (diff)
rockchip: sdram-common: fix wrong size for 4GB in 32bit SoC
This is workaround for issue we can't get correct size for 4GB ram in 32bit system and available before we really need ram space out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram). The size of 4GB is '0x1 00000000', and this value will be truncated to 0 in 32bit system, and system can not get correct ram size. Rockchip SoCs reserve a blob of space for peripheral near 4GB, and we are now setting SDRAM_MAX_SIZE as max available space for ram in 4GB, so we can use this directly to workaround the issue. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/mach-rockchip/sdram_common.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 650d53e4d98..a27138083ab 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -48,6 +48,24 @@ size_t rockchip_sdram_size(phys_addr_t reg)
rank, col, bk, cs0_row, bw, row_3_4);
}
+ /*
+ * This is workaround for issue we can't get correct size for 4GB ram
+ * in 32bit system and available before we really need ram space
+ * out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram).
+ * The size of 4GB is '0x1 00000000', and this value will be truncated
+ * to 0 in 32bit system, and system can not get correct ram size.
+ * Rockchip SoCs reserve a blob of space for peripheral near 4GB,
+ * and we are now setting SDRAM_MAX_SIZE as max available space for
+ * ram in 4GB, so we can use this directly to workaround the issue.
+ * TODO:
+ * 1. update correct value for SDRAM_MAX_SIZE as what dram
+ * controller sees.
+ * 2. update board_get_usable_ram_top() and dram_init_banksize()
+ * to reserve memory for peripheral space after previous update.
+ */
+ if (size_mb > (SDRAM_MAX_SIZE >> 20))
+ size_mb = (SDRAM_MAX_SIZE >> 20);
+
return (size_t)size_mb << 20;
}